Abstract: An embodiment includes an impedance calibration circuit having a calibrator configured to compare voltage levels at an external node and an internal node of the impedance calibration circuit and to generate an output based on the comparison. The calibrator further includes respective filters coupled between the external node and a first input of the comparator, and between the internal node and a second input of the comparator. The filters are configured for symmetric noise injection into the comparator from a chip ground line to which a programmable resistor at the internal node is coupled.

Abstract: An electronic device includes an analog-to-digital converter adapted to receive a radio-frequency signal and adapted to provide therefrom a digital signal, wherein the radio-frequency signal may include an interference signal. The electronic device has a controller adapted to perform a digital measure on the digital signal and adapted to generate therefrom a selection signal having a first value indicating a non-interference condition in the radio-frequency signal and having a second value indicating an interference-condition in the radio-frequency signal. A selector is adapted to transmit the digital signal in case the selection signal has the first value and to transmit a signal replacing the digital signal in case the selection signal has the second value.

Abstract: A common-mode filter including two input terminals and two output terminals and, in series between each input or output terminal and the ground, a capacitive element and a first inductive element.

Abstract: A method for forming gate, source, and drain contacts on a MOS transistor having an insulated gate including polysilicon covered with a metal gate silicide, this gate being surrounded with at least one spacer made of a first insulating material, the method including the steps of a) covering the structure with a second insulating material and leveling the second insulating material to reach the gate silicide; b) oxidizing the gate so that the gate silicide buries and covers the a silicon oxide; c) selectively removing the second insulating material; and d) covering the structure with a first conductive material and leveling the first conductive material all the way to a lower level at the top of the spacer.

Abstract: A stack of a first and second semiconductor structures is formed. Each semiconductor structure includes: a semiconductor bulk, an overlying insulating layer with metal interconnection levels, and a first surface including a conductive area. The first surfaces of semiconductor structures face each other. A first interconnection pillar extends from the first surface of the first semiconductor structure. A housing opens into the first surface of the second semiconductor structure. The housing is configured to receive the first interconnection pillar. A second interconnection pillar protrudes from a second surface of the second semiconductor structure which is opposite the first surface. The second interconnection pillar is in electric contact with the first interconnection pillar.

Abstract: A differential or pseudo-differential TIA includes an auxiliary differential amplifier input transistor pair cross-coupled to the output nodes to cancel undesired output signal components. The advantages of a classical differential topology are retained while performance at a high data rate is significantly improved.

Abstract: A method for testing an analog-to-digital converter (ADC) includes applying ramps to the input of the converter, and classifying the digital codes produced by the converter according to a histogram. The converter is declared operational as soon as all the classes of the histogram have reached a minimum count. The minimum count may be equal to 1 in practice. The converter is declared defective if any class does not reach the minimum count before expiry of a time interval.

Abstract: A chip provided with through vias wherein the vias are formed of an opening with insulated walls coated with a conductive material and filled with an easily deformable insulating material, elements of connection to another chip being arranged in front of the easily deformable insulating material.

Abstract: A control device of a switching circuit of a resonant apparatus is described. The switching circuit comprises at least one half-bridge having a high-side transistor and a low-side transistor connected between an input voltage and a reference voltage; the resonant apparatus comprises a resonant load. The control device is configured to determine the on time period and the off time period of the transistors alternatively and a dead time of both the transistors so that a periodic square-wave voltage is applied to the resonant load. The control device comprises a detector adapted to detect the current sign flowing through the resonant load and a correction circuit configured to extend the current operating time period of said two transistors in response to at least the current sign detected from the detection means.

Abstract: A device for converting thermal energy into electric energy intended to be used in combination with a hot source including: a capacitor of variable capacitance, including two electrodes separated by an electrically-insulating material, one of these electrodes being deformable and being associated with an element forming a bimetallic strip, said bimetallic strip including at least two layers of materials having different thermal expansion coefficients, said bimetallic strip being free to deform when it is submitted to the heat of said hot source; a second capacitor having a first electrode connected to a first electrode of said capacitor of variable capacitance; a harvesting circuit electrically connected between the second electrode of the capacitor of variable capacitance and the second electrode of the second capacitor, said harvesting circuit being capable of conducting the current flowing between said second electrodes.

Abstract: A process is described for integrating, on an inert substrate, a device having at least one passive component and one active component. The process comprises: deposition of a protection dielectric layer on the inert substrate; formation of a polysilicon island on the protection dielectric layer; integration of the active component on the polysilicon island; deposition of the covering dielectric layer on the protection dielectric layer and on the active component; integration of the passive component on the covering dielectric layer; formation of first contact structures in openings realised in the covering dielectric layer in correspondence with active regions of the active component; and formation of second contact structures in correspondence with the passive component. An integrated device obtained through this process is also described.

Abstract: An array of functional cells includes a subset of cells powered by at least one supply rail. That supply rail is formed of first segments located on a first metallization level and second segments located on a second metallization level with at least one conductor element extending between the first and second segments to electrically connect successive segments of the supply rail.

Abstract: A semiconductive device is fabricated by forming, within a semiconductive substrate, at least one continuous region formed of a material having a non-uniform composition in a direction substantially perpendicular to the thickness of the substrate.

Abstract: An image processing arrangement includes an input to receive an indicator of a power characteristic related to an image processing arrangement and an image processor to process an image based on the indicator of the power characteristic.

Abstract: An embodiment of an array of Geiger-mode avalanche photodiodes, wherein each photodiode is formed by a body of semiconductor material, having a first conductivity type, housing a first cathode region, of the second conductivity type, and facing a surface of the body, an anode region, having the first conductivity type and a higher doping level than the body, extending inside the body, and facing the surface laterally to the first cathode region and at a distance therefrom, and an insulation region extending through the body and insulating an active area from the rest of the body, the active area housing the first cathode region and the anode region. The insulation region is formed by a mirror region of metal material, a channel-stopper region having the second conductivity type, surrounding the mirror region, and a coating region, of dielectric material, arranged between the mirror region and the channel-stopper region.

Abstract: A clock source is configured to provide an oscillating signal to be divided into a clock signal. A temperature sensor senses a first temperature of the clock source. The clock source is subjected to at least one second temperature implemented by a temperature alteration module. A calibration module calibrates the clock signal based on the at least one second temperature, the first temperature, a reference signal, and the oscillating signal at the at least one second temperature.

Abstract: A communication system for transmitting data, for example, within a System-in-Package. The system includes a first circuit configured for: a) dividing the data into a plurality of packets having a determined size; and b) creating for each of the packets a transmission segment including a segment header and the respective packet as payload. The system also includes a second circuit configured for: a) separating the transmission segments into a plurality of physical units, where the physical units have a determined size; and b) transmitting the physical units over a physical communication channel. In particular, the segment header includes at least one field that identifies the number of physical units that are to be transmitted.

Abstract: A capacitive semiconductor pressure sensor, comprising: a bulk region of semiconductor material; a buried cavity overlying a first part of the bulk region; and a membrane suspended above said buried cavity, wherein, said bulk region and said membrane are formed in a monolithic substrate, and in that said monolithic substrate carries structures for transducing the deflection of said membrane into electrical signals, wherein said bulk region and said membrane form electrodes of a capacitive sensing element, and said transducer structures comprise contact structures in electrical contact with said membrane and with said bulk region.

Abstract: A DC-DC voltage down-converter for an electronic device supplied by a battery and having a bus interface for the interconnection with another electronic device capable of supplying electric power is provided. The DC-DC voltage down-converter includes a terminal coupled to a voltage supply line of the bus interface and operable to receive a input current from the another electronic device. The DC-DC voltage down-converter further includes an electric energy storage element coupled between the battery and the terminal, the electric energy storage element being operable to storage/release electric energy and a drive circuit arranged to control the storage/release of the electric energy storage element, so as to cause an electric power generated by the input current supplied by the another electronic device through the voltage supply line to re-charge the battery.

Abstract: Data are converted between an unencrypted and an encrypted format according to the Rijndael algorithm, including a plurality of rounds. Each round is comprised of a fixed set of transformations applied to a two-dimensional array, designating states, of rows and columns of bit words. At least a part of the transformations are applied on a transposed version of the state, wherein rows and columns are transposed for the columns and rows, respectively.