Abstract: A DC-DC voltage down-converter for an electronic device supplied by a battery and having a bus interface for the interconnection with another electronic device capable of supplying electric power is provided. The DC-DC voltage down-converter includes a terminal coupled to a voltage supply line of the bus interface and operable to receive a input current from the another electronic device. The DC-DC voltage down-converter further includes an electric energy storage element coupled between the battery and the terminal, the electric energy storage element being operable to storage/release electric energy and a drive circuit arranged to control the storage/release of the electric energy storage element, so as to cause an electric power generated by the input current supplied by the another electronic device through the voltage supply line to re-charge the battery.

Abstract: A conductive paint electromagnetic interference (EMI) shield for an electronic module or device. The conductive paint is composed of metal particles suspended in a fluidic carrier. In one embodiment, the conductive paint is sprayed onto exterior surfaces of an electronic module or device from a spray gun. The sprayed conductive paint is cured to remove the fluidic carrier, leaving a metal film coated to the outside of the module or device. In one embodiment used with electronic packages in array form, grooves are cut into an encapsulation material of a module so that the shield protection includes sidewalls of the package. In another embodiment used with camera modules, masking is used to selectively shield portions of the module. In a further embodiment, the shield is electrically connected to a ground conductor of a circuit of the electronic module.

Abstract: An analog input signal is sampled, and the sampled analog input signal is converted to a digital value. A calibration value is also sampled, and a single bit of an N bit offset value is calculated from the sampled calibration value. The sampling operations are alternatively performed so that one bit of the offset value is generated for each generated digital value. For example, the process is repeated N times to calculate all N bits of the offset value while generating N digital values.

Abstract: A passive cable adaptor for connecting a data source device with a display device is described. The adaptor has a packet-based interface connector at one end, the connector having a positive main link pin, a negative main link pin, a positive auxiliary channel pin, and a negative auxiliary channel pin. At the other end is a micro serial interface connector, wherein multimedia content is transmitted over the cable adaptor and electrical power is supplied over the cable adaptor simultaneously. The cable adaptor has an auxiliary and hot plug detect (HPD) controller utilized to map the auxiliary channel and HPD signals of the packet-based digital display to the micro serial interface ID signal.

Abstract: A method for writing and reading data memory cells, comprising: defining in a first memory zone erasable data pages and programmable data blocks; and, in response to write commands of data, writing data in erased blocks of the first memory zone, and writing, in a second memory zone, metadata structures associated with data pages and comprising, for each data page, a wear counter containing a value representative of the number of times that the page has been erased.

Abstract: A camera module includes a sensor die, a glass plate, peripheral spacer, an optical element, an outer surface having a shoulder extending in a direction substantially parallel to the sensor die, and a metal layer at least partially covering the outer surface. A method of manufacturing a camera module includes providing an assembly including a sensor dice wafer, a spacer wafer in front of the sensor dice wafer, and an optical element wafer in front of the spacer wafer. The method includes sawing a top cut, using a first saw blade of a first thickness, proceeding in a direction from the optical element wafer toward the sensor dice wafer, stopping before the sensor dice wafer is reached, and sawing a bottom cut, using a second saw blade of a second thickness, proceeding in a direction from the sensor dice wafer toward the optical element wafer.

Abstract: In one embodiment of the present invention, motion compensated interpolation is performed by locating full frame conceal and reveal areas, determining intermediate frame occlusion areas of an interpolated frame of the displayable output by locating intermediate frame conceal areas based on projected locations of pixels within the full frame conceal areas using forward motion vectors and information about a time slot for the interpolated frame, and by locating intermediate frame reveal areas based on projected locations of pixels within the full frame reveal areas using backward motion vectors and information about the time slot for the interpolated frame; for any pixels in the interpolated frame to which there is neither a forward vector nor a backward vector projecting: including the pixel in an intermediate frame conceal area if it is not located within the full frame reveal area; including the pixel in an intermediate frame reveal area if it is not located within the full frame conceal area; and using the

Abstract: A mesa-type bidirectional Shockley diode including a substrate of a first conductivity type; a layer of the second conductivity type on each side of the substrate; a region of the first conductivity type in each of the layers of the second conductivity type; a buried region of the first conductivity type under each of said regions of the first conductivity type, each buried region being complementary in projection with the other; and a groove arranged in the vicinity of the periphery of the component on each of its surfaces, the component portion external to the groove comprising, under the external portion of the upper and lower regions of the second conductivity type, regions of the first conductivity type of same doping profile as said buried regions.

Abstract: A method of manufacturing an electronic device on a plastic substrate includes: providing a carrier as a rigid support for the electronic device; providing a metallic layer on the carrier; forming the plastic substrate on the metallic layer, the metallic layer guaranteeing a temporary bonding of the plastic substrate to the carrier; forming the electronic device on the plastic substrate; and releasing the carrier from the plastic substrate. Releasing the carrier comprises immersing the electronic device bonded to the carrier in a oxygenated water solution that breaks the bonds between the plastic substrate and the metallic layer.

Abstract: A method for controlling a loss of reliability of a non-volatile memory (NVM) included in an integrated circuit card (ICC) may include determining whether the NVM is reliable at the operating system (OS) side of the ICC, and generating an event associated with the reliability of the NVM at the OS side for an application of the ICC, if the NVM is determined to be unreliable.

Abstract: A semiconductor structure includes at least a semiconductor body, a delimiting structure delimiting a cup-shaped recess in the body and a conductive region in the recess. The conductive region is made of a low-melting-temperature material, having a melting temperature lower than that of the materials forming the delimiting structure.

Abstract: An electronic device includes a first chip and a second chip, where each chip has a first conduction terminal on a first surface and a second conduction terminal on a second surface. An insulating body surrounds the first and second chip, a first heat-sink coupled with the first conduction terminals of the first and second chip, and a second heat-sink coupled with the second conduction terminals of the first and second chip. A portion of the first heat-sink and/or the second heat-sink being exposed from the insulating body. The electronic device includes a first conductive lead and a second conductive lead exposed from the insulating body for through-hole mounting of the electronic device on an electronic board, the first conductive lead being coupled with the first heat-sink and the second conductive lead being coupled with the second heat-sink.

Abstract: A support structure includes a support cell with a support substrate, junction sacrificial portions surrounding the support substrate, and pin blocks extending from the junction sacrificial portion toward the support substrate. A semiconductor chip is mounted to the support substrate and electrically wire bonded to the pin blocks. An encapsulating body covers the chip, with the pin blocks extending from the body. A transversal groove is formed in each pin block. Surfaces of the pin block and groove are electroplated with solder material. Each pin block is sectioned at the groove to define a pin having a first end corresponding to a portion of the groove surface of the groove and a second end corresponding to the sectioned portion of the pin block that is not electroplated with solder material. Sectioning causes the separation of the chip-insulating body assembly from the junction sacrificial portions.

Abstract: An output driver circuit includes first, second, third, and fourth transistors having a common current path, wherein a gate of the first transistor receives a first switching signal, a gate of the second transistor receives a first reference voltage, a gate of the third transistor receives a second reference voltage, and a gate of the fourth transistor receives a second switching signal, and wherein a first capacitor is coupled between the gate of the first transistor and the gate of the third transistor, a second capacitor is coupled between the gate of the second transistor and the gate of the fourth transistor, and an output signal is provided at a node coupling the second and third transistors.

Abstract: A power device includes a chip of semiconductor material and a further chip of semiconductor material on each of which at least one power transistor is integrated; each chip comprises a first conduction terminal on a first surface, and a second conduction terminal and a control terminal on a second surface opposite the first surface, and an insulating body embedding said chip and said further chip. In the solution according to one or more embodiments of the present disclosure, the first surface of said chip faces the second surface of said further chip, and the power device further comprises a first heat-sink arranged between said chip and said further chip and electrically coupled with the first conduction terminal of said chip and with the second conduction terminal of said further chip, the control terminal of said further chip being electrically insulated from the first heat-sink.

Abstract: A device for assigning a geographical position to a picture may include a photo camera module for taking the picture, a satellite positioning system receiver module for identifying geographical coordinates when the picture is taken, and a cryptographic module to sign the picture and the corresponding geographical coordinates. The device may store the signed picture and the corresponding geographical coordinates as certified geographical position of the picture.

Abstract: A system and method transcodes an input video bit stream having a first encoding profile into an output video bit stream having a second encoding profile. The system includes a first module (302) and a second module (306). The system further includes a memory module (304). The first module (302) decodes the input video bit stream for generating pixel data and macroblock specifications. The second module (306) encodes the pixel data and the macroblock specifications for constructing the output video bit stream. The memory module (304) includes a first buffer module and a second buffer module. The first buffer module stores the pixel data and the second buffer module stores the macroblock specifications.

Abstract: A method for detecting at least one object in an image including a pixel array, by means of an image processing device, including searching out the silhouette of the object in the image only if pixels of the image are at the minimum or maximum level.

Abstract: A method for forming a trench filled with an insulator crossing a single-crystal silicon layer and a first SiO2 layer and penetrating into a silicon support, this method including the steps of forming on the silicon layer a second SiO2 layer and a first silicon nitride layer, forming the trench, and performing a first oxidizing processing to form a third SiO2 layer; performing a second oxidizing processing to form, on the exposed surfaces of the first silicon nitride layer a fourth SiO2 layer; depositing a second silicon nitride layer and filling the trench with SiO2; and removing the upper portion of the structure until the upper surface of the silicon layer is exposed.

Abstract: A clock gate includes a first Muller gate that receives at its inputs a clock signal and an enable signal. The output of the first Muller gate is applied, with a delayed version of the clock signal, to a second Muller gate. A logic circuit operates to logically combine the output of the second Muller gate with a delayed version of the clock signal. The output of the logic circuit provides a gated clock output.