Patents Assigned to STMicroelectronics
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Publication number: 20130235156Abstract: The present disclosure relates to a method for transmitting two consecutive pairs of images. The method may include decimating each image with a ratio of 2, assembling the two decimated images of each pair in a composite image, transmitting the composite images, and reconstructing complete images from the composite images. In decimation, the information removed from the images of the first pair may be kept in the images of the second pair, from the spatial point of view, and the complete images may be reconstructed by de-interlacing processing from the composite images.Type: ApplicationFiled: September 15, 2011Publication date: September 12, 2013Applicant: STMICROELECTRONICS (GRENOBLE 2) SASInventors: Frankie Eymard, Jean-Louis Labyre
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Patent number: 8531261Abstract: Method for improving the symmetry of the differential output signals of an integrated transformer of the symmetric-asymmetric type comprising an inductive primary circuit and an inductive secondary circuit, characterized in that the capacitive coupling between the primary and secondary circuits is reduced.Type: GrantFiled: December 20, 2010Date of Patent: September 10, 2013Assignee: STMicroelectronics, S.A.Inventors: Denis Pache, Nejdat Demirel
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Patent number: 8531567Abstract: An image sensor including a first pixel positioned between second and third pixels, each of the first, second and third pixels comprising a photodiode region surrounded by an isolation trench; a first charge transfer gate comprising a first column electrode surrounded by an insulating layer and positioned in an opening of the isolation trench between the first and second pixels, the first column electrode being configured to receive a first transfer voltage signal; and a second charge transfer gate including a second column electrode surrounded by an insulating layer and positioned in an opening of the isolation trench between the first and third pixels, the second column electrode being configured to receive a second transfer voltage signal.Type: GrantFiled: October 22, 2010Date of Patent: September 10, 2013Assignee: STMicroelectronics (Crolles 2) SASInventors: François Roy, Frédéric Barbier
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Patent number: 8530292Abstract: A method for manufacturing a strained channel MOS transistor including the steps of: forming, at the surface of a semiconductor substrate, a MOS transistor comprising source and drain regions and an insulated sacrificial gate which partly extends over insulation areas surrounding the transistor; forming a layer of a dielectric material having its upper surface level with the upper surface of the sacrificial gate; removing the sacrificial gate; etching at least an upper portion of the exposed insulation areas to form trenches therein; filling the trenches with a material capable of applying a strain to the substrate; and forming, in the space left free by the sacrificial gate, an insulated MOS transistor gate.Type: GrantFiled: September 9, 2011Date of Patent: September 10, 2013Assignees: STMicroelectronics (Grenoble 2) SAS, Commissariat à l'Énergie Atomique et aux Énergies AlternativesInventors: Yves Morand, Thierry Poiroux, Jean-Charles Barbe
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Patent number: 8532204Abstract: In an embodiment, a transmitter includes first and second processing blocks, which may each include hardware, software, or a combination of hardware and software. The first processing block is operable to generate a first peak-reducing vector. And the a second first processing block is operable to receive a first data vector, the data vector comprising a plurality of samples, the first data vector having a first peak with a first index and a first magnitude, a second peak with a second index and a second magnitude that is less than the first magnitude, and a first peak-to-average power ratio, and to generate a second data vector having a second peak-to-average power ratio that is lower than the first peak-to-average power ratio by using the first peak-reducing vector.Type: GrantFiled: August 20, 2010Date of Patent: September 10, 2013Assignee: STMicroelectronics (Beijing) R&D Co., Ltd.Inventor: Sen Jiang
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Patent number: 8532305Abstract: When two loudspeakers play the same signal, a “phantom center” image is produced between the speakers. However, this image differs from one produced by a real center speaker. In particular, acoustical crosstalk produces a comb-filtering effect, with cancellations that may be in the frequency range needed for the intelligibility of speech. Methods for using phase decorrelation to fill in these gaps and produce a flatter magnitude response are described, reducing coloration and potentially enhancing dialogue clarity. These methods also improve headphone compatibility and reduce the tendency of the phantom image to move toward the nearest speaker.Type: GrantFiled: February 21, 2012Date of Patent: September 10, 2013Assignee: STMicroelectronics, Inc.Inventor: Earl C. Vickers
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Patent number: 8531227Abstract: A level shifter includes an output stage transistor and a level controller. The level controller receives a selection signal and provides a reference voltage at a gate terminal of the output stage transistor based on the selection signal. The output stage transistor, on being enabled by the reference voltage, provides a first level shifted output based on a first output reference voltage.Type: GrantFiled: December 3, 2010Date of Patent: September 10, 2013Assignee: STMicroelectronics International N.V.Inventors: Vinod Kumar, Saiyid Mohammad Irshad Rizvi
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Patent number: 8532947Abstract: An integrated circuit includes non-volatile storage configured to secretly store a digital word, the value of which forms an identification code. The integrated circuit also includes control circuitry configured to receive the digital word and to generate transient electrical currents or transient voltages, the characteristics of which depend on the value of the digital word. There is an electrically conductive network configured to be passed through by the electrical currents or receive the transient voltages so as to generate an electromagnetic field that identifies the integrated circuit.Type: GrantFiled: December 15, 2010Date of Patent: September 10, 2013Assignee: STMicroelectronics (Rousset) SASInventors: Pascal Fornara, Mathieu Lisart
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Patent number: 8532578Abstract: Spectrum usage in a radio cognitive transmission system may be monitored in a distributed manner in space and time through a first set of monitoring apparatuses and a second set of monitoring apparatuses. The first set of monitoring apparatuses may be associated to apparatuses, such as base stations, having a monitoring precision level, for example, linked to the spectrum sampling frequency, greater with respect to the monitoring precision of the monitoring apparatus of the second set. The later may be suitable to be represented by a low-cost “sniffer” associated to consumer electronics devices.Type: GrantFiled: March 17, 2010Date of Patent: September 10, 2013Assignee: STMicroelectronics S.r.l.Inventors: Petri Mähönen, Matthias Wellens, Marina Petrova, Diego Melpignano
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Patent number: 8532369Abstract: The present disclosure relates to a method for reordering data organized according to a matrix configuration, comprising steps of reading line by line input data having a matrix configuration to obtain an input data flow, and of processing a line of the input data involving: transferring into an output data flow a datum of the input data flow, belonging to the processed line, and transferring into the output data flow at least one datum of the input data flow stored beforehand, belonging to a previous line and having a same rank in the matrix configuration as the datum transferred from the processed line, and storing a datum of the input data flow belonging to the processed line and not transferred into the output data flow, to replace the transferred datum, belonging to a previous line.Type: GrantFiled: March 15, 2010Date of Patent: September 10, 2013Assignee: STMicroelectronics (Grenoble 2) SASInventor: Ludovic Chotard
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Publication number: 20130229863Abstract: A driving stage for a phase change non-volatile memory device may have an output driving unit which supplies an output driving current during an operation of programming of at least one memory cell. A driving-control unit receives an input current and generates at output a first control signal that controls supply of the output driving current by the output driving unit in such a way that a value of this current has a desired relation with the input current. A level-shifter element, set between the output of the driving-control unit and a control input of the output driving unit, determines a level shift of the voltage of the first control signal so as to supply to the control input of the output driving unit a second control signal, having a voltage value that is increased with respect to, and is a function of, the first control signal.Type: ApplicationFiled: February 20, 2013Publication date: September 5, 2013Applicant: STMicroelectronics S.r.l.Inventors: Antonino CONTE, Maria GIAQUINTA, Loredana CHIARAMONTE
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Publication number: 20130229540Abstract: In one embodiment, a light sensor includes four cell arrays, one for each color of the Bayer pattern, and four lenses each focusing the light coming from the scene to be captured on a respective cell array. The lenses are oriented such that at least a second green image, commonly provided by the fourth cell array, is both horizontally and vertically shifted (spaced) apart by half a pixel pitch from a first (reference) green image. In a second embodiment, the four lenses are oriented such that the red and blue images are respectively shifted (spaced) apart by half a pixel pitch from the first or reference green image, one horizontally and the other vertically, and the second green image is shifted (spaced) apart by half a pixel pitch from the reference green image both horizontally and vertically.Type: ApplicationFiled: April 22, 2013Publication date: September 5, 2013Applicant: STMicroelectronics S.r.lInventors: Marco Farina, Mirko Ignazio Guarnera, Massimo Mancuso, Giuseppe Messina, Alessandro Capra
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Publication number: 20130228881Abstract: A method that includes forming an opening between at least one first electrode and a second electrode by forming a recess in a first electrode layer, the recess having sidewalls that correspond to a surface of the at least one first electrode, forming a first sacrificial layer on the sidewalls of the recess, the first sacrificial layer having a first width that corresponds to a second width of the opening, forming a second electrode layer in the recess that corresponds to the second electrode, and removing the first sacrificial layer to form the opening between the second electrode and the at least one first electrode.Type: ApplicationFiled: April 12, 2013Publication date: September 5, 2013Applicant: STMicroelectronics, Inc.Inventors: Venkatesh Mohanakrishnaswamy, Loi N. Nguyen
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Publication number: 20130228846Abstract: The disclosure relates to an integrated circuit comprising at least two memory cells formed in a semiconductor substrate, and a buried gate common to the selection transistors of the memory cells. The buried gate has a first section of a first depth extending in front of vertical channel regions of the selection transistors, and at least a second section of a second depth greater than the first depth penetrating into a buried source line. The lower side of the buried gate is bordered by a doped region forming a source region of the selection transistors and reaching the buried source line at the level where the second section of the buried gate penetrates into the buried source line, whereby the source region is coupled to the buried source line.Type: ApplicationFiled: March 5, 2013Publication date: September 5, 2013Applicant: STMICROELECTRONICS (ROUSSET) SASInventors: Francesco LA ROSA, Yoann GOASDUFF, Stephan NIEL, Arnaud REGNIER
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Publication number: 20130229864Abstract: A driving stage for a phase change non-volatile memory device may include an output driving unit, which supplies an output driving current during programming of a memory cell, a driving-control unit, which receives an input current and generates a first control signal for controlling supply of the output driving current in such a way that a value thereof has a desired relation with the input current, and a level-shifter element, which carries out a level shift of a voltage of the first control signal for supplying to the output driving unit a second control signal, having a voltage value that is increased with respect to, and is a function of, the first control signal. A calibration unit may carry out an operation of updating of the value of a shift voltage across the level-shifter element, as the value of the input current varies.Type: ApplicationFiled: February 22, 2013Publication date: September 5, 2013Applicant: STMICROELECTRONICS S.R.L.Inventors: Antonino Conte, Kailash Khairnar, FrancescoNino Mammoliti
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Publication number: 20130229875Abstract: The disclosure relates to a method of reading and writing memory cells, each including a charge accumulation transistor in series with selection transistor, including applying a selection voltage to a gate of the selection transistor of the memory cell; applying a read voltage to a control gate of the charge accumulation transistor of the memory cell; applying the selection voltage to a gate of the selection transistor of a second memory cell coupled to the same bitline; and applying an inhibition voltage to a control gate of the charge accumulation transistor of the second memory cell, to maintain the transistor in a blocked state.Type: ApplicationFiled: March 5, 2013Publication date: September 5, 2013Applicant: STMICROELECTRONICS (ROUSSET) SASInventors: Francesco La Rosa, Olivier Pizzuto, Stephan Niel, Philippe Boivin, Pascal Fornara, Laurent Lopez, Arnaud Regnier
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Publication number: 20130229146Abstract: A battery charger which includes an input supply terminal configured to receive a supply signal, a battery terminal configured to be connected to a battery, at least one output terminal and an electrical path between the battery terminal and the output terminal, at least one device for the detection of one alarm condition of the battery or the battery charger. The battery charger includes circuitry configured to enable the at least one detection device at timing intervals when the battery supplies the at least one output terminal.Type: ApplicationFiled: February 22, 2013Publication date: September 5, 2013Applicant: STMicroelectronics S.r.l.Inventors: Giuliana Demilato, Agatino Antonino Alessandro, Santi Carlo Adamo, Liliana Arcidiacono
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Publication number: 20130229145Abstract: A battery charger includes an input supply terminal configured to receive a supply signal, a battery terminal configured to be connected to a battery and at least one output terminal, a switch arranged in the electrical path between the battery terminal and at least one output terminal, an element configured to store an information representative of an alarm condition of the battery and to open the switch when the alarm condition occurs, with the supply signal being absent and the battery supplying the at least one output terminal, and to close the switch when the supply signal is received at the input supply terminal.Type: ApplicationFiled: February 22, 2013Publication date: September 5, 2013Applicant: STMicroelectronics S.r.I.Inventors: Agatino Antonino Alessandro, Giuliana Demilato, Liliana Arcidiacono, Santi Carlo Adamo
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Publication number: 20130230076Abstract: A method is for decoding a pulse signal modulated through a transmitted reference modulation scheme. The modulated pulse signal may include, repetitively, a reference pulse followed by an information pulse delayed with a delay. The method may include subtracting or adding from the modulated pulse signal, a version of the modulated pulse signal delayed with the delay for obtaining a processed signal, and performing a non-coherent detection on the processed signal.Type: ApplicationFiled: April 17, 2013Publication date: September 5, 2013Applicant: STMICROELECTRONICS N.V.Inventors: GIAN MARIO MAGGIO, CHIARA CATTANEO, PHILIPPE ROUZET
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Publication number: 20130227827Abstract: A method of generating electrical energy in an integrated circuit that may include setting into motion a (3D) three-dimensional enclosed space in the integrated circuit. The 3D enclosed space may include a piezoelectric element and a free moving object therein. The method may also include producing the electrical energy from impact between the free moving object and the piezoelectric element during the motion.Type: ApplicationFiled: March 29, 2013Publication date: September 5, 2013Applicants: UNIVERSITE AIX-MARSEILLE 1 PROVENCE, STMICROELECTRONICS (ROUSSET) SASInventors: CHRISTIAN SCHWARZ, CHRISTOPHE MONSERIE, JULIEN DELALLEAU
