Abstract: A wireless, specifically VHT, system that includes APs and STAs can power save during the TXOP. The AP in the system announces whether STAs in the system do SU or MU TXOP power save in a Beacon/Probe Response, and the STAs in the system transmit to the AP whether the STA is capable and willing to save power during a SU, MU, or SU+MU TXOP. For the AP, the process further involves buffering data frames for STAs that have entered doze mode until the end of TXOP. The AP further transmits to STAs a duration of TXOP in the Duration field of a RTS frame. The STA can inform the AP to enter TXOP PM mode in a bit in the HT Control field.

Abstract: Disclosed is a programmable pulse width discriminator circuit operable to receive a set of parameters from a user and indicate when an input signal satisfies conditions set by the user-defined parameters. The input signal is sampled by the pulse width discriminator circuit to detect a desired state of the input signal. The user may set the parameters such that the pulse width discriminator indicates the condition wherein the number of consecutive samples for which the input signal is the desired state is (i) greater than a first threshold value, (ii) less than a second threshold value, or (iii) between the first and second threshold values. In these embodiments, the user sets the first and second threshold values and selects which set of conditions are indicated by the output of the circuit.

Abstract: A SIM module includes a SIM and a plastic support on which the SIM is attached. A discontinuity channel between the plastic support and the SIM is formed all around the SIM, the discontinuity channel being interrupted in at least two points of the plastic support attaching the SIM to the plastic support. The points are on a short side and on a long side of the SIM.

Abstract: The disclosure relates to a method for detecting the presence of an object near a detection device, comprising: emitting pulses of an incident photon beam, detecting photodiodes which trigger avalanche after the reception by the photodiode of at least one photon of a reflected photon beam produced by a reflection of the incident beam on an object near the detection device, determining a distance between the photodiodes and an object in a detection area, as a function of the time between a transmit time of the incident beam and avalanche triggering times of the photodiodes, and correcting the distance determined as a function of a calibration measurement obtained in the absence of object in the detection area, to compensate for photon reflections on a transparent plate arranged between the photodiodes and the detection area.

Abstract: The component, fully integrated onto a monolithic substrate, includes a tuner, a demodulator, and a channel decoder. The overall filtering is carried out in two parts, a baseband analog filtering and a digital Nyquist filtering removing the information of adjacent channels. It outputs a stream of MPEG data.

Abstract: An embodiment of a circuit includes first and second branches, an amplifier, a compensation circuit, and a bias unit. The first and second branches are respectively operable to generate first and second currents. The amplifier has a first amplifier input node coupled to the first branch, a second amplifier input node coupled to the second branch, an amplifier output node coupled to the first and second branches, and a first compensation node. The compensation unit is operable to provide a first offset-compensation signal to the first compensation node. And the first bias unit is operable to provide first and second bias signals to the first and second input nodes, respectively, such that the amplifier is operable to cause the first current to approximately equal the second current.

Abstract: A method of authentication of a terminal generating a magnetic field by a transponder including an oscillating circuit from which a D.C. voltage is generated, wherein at least one quantity depending on the coupling between the transponder and the terminal is compared with at least one reference value.

Abstract: The method for detecting an attack by fault injection into memory positions includes a generation of an initial value of a reference indication including an application of a reversible mathematical operator to the values of the information stored in the memory positions. An updating of the value of this reference indication is performed on each write in at least one memory position by using the operator, the reverse operator and the values of the stored information before and after each write in the at least one memory position. And, in the presence of a request, a check is performed as to whether a criterion involving the values of the information stored in the memory positions at the time of the request and the operator or its reverse is or is not satisfied by the value of the reference indication at the time of the request.

Abstract: System for generating a pulsed signal of the ultra wideband type, comprising a device for direct digital frequency synthesis (DDS) comprising a phase accumulator (ACCP) able to deliver at a first frequency (Fclk) phases coded on i bits and spaced apart by a phase increment (?p) differing by a power of two and situated in the vicinity of 2i-1, processing means (MT) able to receive said phases and arranged so as to deliver an amplitude-modulated output signal (SG) whose envelope exhibits a succession of regions respectively delimited by zones of zero amplitude (ZA, ZB), each amplitude-modulated signal part situated in one of said regions forming a pulse of the ultra wideband type (IMP) whose central frequency is equal to said first frequency and whose width depends on the value of the phase increment, and control means (MC) able to regulate the operation of the digital synthesis device so as to selectively deliver one or more pulses of the ultra wideband type.

Abstract: An IC has cells placed in a cell row having a UTBOX-FDSOI pMOSFET including a ground beneath the pMOS, and an n-doped well beneath it and configured to apply a potential thereto, and a UTBOX-FDSOI nMOSFET including a ground beneath the nMOS, and a p-doped well beneath the ground and configured to apply a potential thereto, and cells, each including a UTBOX-FDSOI pMOSFET including a ground beneath the pMOS, and a p-doped well beneath the ground and configured to apply an electrical potential to the ground, and a UTBOX-FDSOI nMOSFET including a ground beneath the nMOS, and an n-doped well beneath the ground and configured to apply a potential thereto. The cells are placed so that pMOS's of standard cells belonging to a row align along it and a transition cell including a another well and contiguous with first row standard cells thus ensuring continuity with wells of those cells.

Abstract: A method for testing the operating conditions of an electric network, including at least one operating state, including the steps of providing a voltage signal (v(t)) to a network load and measuring the instantaneous current signal (i(t)) circulating in the load, delaying the instantaneous current signal (i(t)) to generate an instantaneous current signal delayed ((i(t+?)) by a predetermined amount of time (?), the predetermined amount of time (?) being a function of the operating state of said load, the method including the steps of calculating, within a predetermined measurement time (Tm), an admittance ratio (G?(?)) between the mean of the product of the voltage signal (v(t)) and the delayed instantaneous current signal (i(t+?)), and the mean of the square of the voltage signal (v(t)), and to compare the value of the admittance ratio (G?(?)) with a range of predetermined values (Gmin,Gmax) to determine the operating state of the electric network.

Abstract: A semiconductor device includes at least one first component (5) (for example, a first integrated circuit), having a front face provided with electrical connection pads. The first component is embedded in a support layer (2) is a position such that the front face of the first component is not covered and lies parallel to a first face of the support layer. An intermediate layer (8) is formed on the front face of the first component and on the first face of the support layer. An electrical connection network (9) within the intermediate layer selectively connects to the electrical connection pads of the first component. The device further includes at least one second component (11) (for example, a second integrate circuit, having one face placed above the intermediate layer and provided with electrical connection pads selectively connected to the electrical connection network.

Abstract: A method for selective deposition of Si or SiGe on a Si or SiGe surface exploits differences in physico-chemical surface behavior according to a difference in doping of first and second surface regions. By providing at least one first surface region with a Boron doping of a suitable concentration range and exposing the substrate surface to a cleaning and passivating ambient atmosphere in a prebake at a temperature lower or equal to 800° C., a subsequent deposition step will prevent deposition in the first surface region. This allows selective deposition in the second surface region, which is not doped with the Boron (or doped with another dopant or not doped). Several devices are, thus, provided. The method saves a usual photolithography sequence, which according to prior art is required for selective deposition of Si or SiGe in the second surface region.

Abstract: A six field address scheme identifies both the originating point and the endpoint of a data frame enabling multiple hop forwarding through a plurality of intermediate mesh points in a wireless mesh network. Data frames originating or ending at a point outside of the wireless mesh network access the wireless network at a mesh access point using a legacy address scheme. The legacy address schemes are converted to a six address scheme using a proxy address table at the access point. Each mesh access point includes not only a routing table but a proxy address table as well as enabling the mesh access point, and/or mesh portal points, to convert address schemes having less than six address fields to the six field format. Subsequent to the conversion, mesh points within the wireless mesh network need only the routing table to facilitate the forwarding of the data frame.

Abstract: Power MOS device of the type comprising a plurality of elementary power MOS transistors having respective gate structures and comprising a gate oxide with double thickness having a thick central part and lateral portions of reduced thickness. Such device exhibiting gate structures comprising first gate conductive portions overlapped onto said lateral portions of reduced thickness to define, for the elementary MOS transistors, the gate electrodes, as well as a conductive structure or mesh. Such conductive structure comprising a plurality of second conductive portions overlapped onto the thick central part of gate oxide and interconnected to each other and to the first gate conductive portions by means of a plurality of conducive bridges.

Abstract: An SRAM having two capacitors connected in series between respective bit storage nodes of each memory cell. The two inverters of the memory cell are powered by a positive voltage and a low voltage. The two capacitors are connected to each other at a common node. A leakage current generator is coupled to the common node. The leakage current generator supplies to the common node a leakage current to maintain a voltage which is approximately halfway between the voltages of the high and low SRAM supplies.

Abstract: A system and method for adjusting the perceived depth of stereoscopic images are provided. The system includes a disparity estimator, a disparity processor and a warping engine. The disparity estimator is configured to receive a stereoscopic image, to estimate disparities in the stereoscopic image, and to generate an estimator signal comprising the estimated disparities. The disparity processor is configured to receive the estimator signal from the disparity estimator and a depth control signal that is generated based on a user input. The disparity processor is also configured to generate a processor signal based on the estimator signal and the depth control signal. The warping engine is configured to receive the processor signal and to generate an adjusted stereoscopic image by warping the processor signal based on a model.

Abstract: Circuitry is described for compensating leakage currents in capacitive sensing circuits. A single active leakage compensation circuit may sense a representative leakage current and drive a plurality of output transistors, each of which provides a compensating current to a respective capacitive sensing circuit. The leakage compensation circuit may sense current flow through a device substantially equivalent to a device exhibiting leakage current in a capacitive sensing circuit, and in response, provide a signal to drive one or more output transistors to supply approximately equivalent currents to a plurality of circuit nodes. For embodiments having multiple similar capacitive sensors and capacitive sensing circuits, only one transistor need be added to each capacitive sensing circuit to compensate for leakage current.

Abstract: A high side driver circuit includes a driver stage having an input, an output, a first power terminal and a second power terminal, a transistor having a first power terminal, a second power terminal, and a control terminal coupled to the output of the driver stage, and a switch coupled between the second power terminal of the driver stage and the second power terminal of the transistor.

Abstract: High precision connectivity for a device under test (DUT) in an electronic test system at reduced cost and superior performance characteristics is provided by incorporating an appropriate contact structure into a printed circuit board (PCB) of the electronic test system. Alternatively, a superior adapter that is formed on the basis of highly precise volume production techniques, for example using well-established semiconductor materials and related manufacturing techniques, is provided to support high precision connectivity.