Abstract: TDLS support in VHT devices is enabled through the use of added VHT fields in the TDLS frames. A VHT TDLS direct link can be setup through a respective TDLS Setup Request/Response with added field announcing VHT Capabilities of the VHT device and the peer device. Added VHT Operation field in the TDLS Setup Confirm frame adds supports between VHT peer devices for non-VHT BSS and VHT BSS. Two VHT STAs can establish wider TDLS channel than BSS operating channel through TDLS establishment. VHT off channel support is enabled by adding Wide Bandwidth Channel Switch field in the TDLS Channel Switch Request frame and no changes to TDLS Channel Switch Response. A VHT Capabilities field is also added to TDLS Discovery Response frame to inform peer devices of device capabilities.
Abstract: The field effect device includes an active area made from semi-conducting material and a gate electrode separated from the active area by a dielectric gate material. A counter-electrode is separated from the active area by a layer of electrically insulating material. Two source/drain contacts are arranged on the active area on each side of the gate electrode. One of the source/drain contacts is made from a single material, overspills from the active area and connects the active area with the counter-electrode. The counter-electrode contact is delineated by a closed peripheral insulating pattern.
Type:
Application
Filed:
July 27, 2010
Publication date:
August 1, 2013
Applicants:
STMICROELECTRONICS, INC., COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES
Abstract: The present invention relates to an integrated electronic circuit including elements enabling to implement a logic function and means for attenuating the sensitivity of said elements to external disturbances, said attenuation means being disconnectable during phases of intentional modification of the state of said elements.
Abstract: A method for writing and reading data in memory cells, comprising, when writing a data in a block of a first memory zone, a step consisting of writing in a second memory zone a temporary information structure metadata comprising a start flag, an identifier of the temporary information structure, an information about the location of the block in the first memory zone, and a final flag, and, after a power on of the first memory zone, searching for an anomaly in temporary information structures present in the second memory zone.
Abstract: Processing method of a digital image to filter red and/or golden eye artifacts, the digital image comprising a plurality of pixel each comprising at least one digital value represented on a plurality of bits, the method comprising: a step of selecting at least one patch of pixels of the digital image comprising pixels potentially representative of a red and/or golden eye artifact; a step of classifying the at least one patch of pixels as “eye” or “non-eye”; a step of filtering said potentially representative pixels if said patch of pixels is classified as “eye”; wherein the classifying step comprises the operations of: converting the digital values of said patch of pixels into a Gray Code representation, overall obtaining a plurality of bit maps from said patch of pixels, each bit map being associated with a respective bit of said Gray Code; an operation of individually comparing said bit maps with corresponding bit map models belonging to a patch classifier produced by a statistical analysis of bit maps obta
Type:
Grant
Filed:
December 15, 2010
Date of Patent:
July 30, 2013
Assignee:
STMicroelectronics S.r.l.
Inventors:
Giuseppe Messina, Daniele Ravi, Mirko Guarnera, Giovanni Maria Farinella
Abstract: A band-pass filter made up by an operational amplifier and by an input circuit. The input circuit is formed by a capacitive filtering element, connected to the input of the operational amplifier; a coupling switch, coupled between an input node and the capacitive filtering element; a capacitive sampling element, coupled between the input of the filter and the input node; and a sampling switch, coupled between the input node and a reference-potential line. The coupling switch and the input sampling switch close in phase opposition according to a succession of undesired components sampling and sensing steps, so that the capacitive sampling element forms a sampler for sampling the undesired component in the undesired components sampling step, in the absence of the component of interest, and forms a subtractor of the undesired components from the input signal in the sensing step.
Type:
Grant
Filed:
June 4, 2010
Date of Patent:
July 30, 2013
Assignee:
STMicroelectronics S.r.l.
Inventors:
Andrea Visconti, Luciano Prandi, Carlo Caminada, Paolo Angelini
Abstract: A differential successive approximation analog to digital converter including: a comparator; a first plurality of capacitors coupled between a corresponding plurality of first switches and a first input of the comparator, at least one of the first capacitors being arranged to receive a first component of a differential input signal; and a second plurality of capacitors coupled between a corresponding plurality of second switches and a second input of the comparator, at least one of the second capacitors being arranged to receive a second component of the differential input signal, wherein each of the first and second plurality of switches are each adapted to independently couple the corresponding capacitor to a selected one of: a first supply voltage level; a second supply voltage level; and a third supply voltage level; and control circuitry adapted to sample the differential input voltage during a sample phase, and to control the first and second switches to couple each capacitor of the first and second plu
Abstract: A method is provided for correcting an image. At least some pixels in a captured image are scanned and there is selected each scanned pixel having at least one associated light intensity value greater than an intensity threshold value based on a comparison between the light intensity values for color indicators associated with the scanned pixel. Three correction information items are obtained by summing the light intensity values associated with the pixels selected by color indicator, and a correction of the white balance deviation affecting the captured image is determined based on the correction information items. A pixel is selected if both the difference between a mean light intensity value and a lowest light intensity value associated with the scanned pixel and the difference between a highest light intensity value and the mean light intensity value associated with the scanned pixel are less than a difference threshold value.
Abstract: A method for writing and reading data in memory cells, comprises the steps of: defining a virtual memory, defining write commands and read commands of data (DT) in the virtual memory, providing a first nonvolatile physical memory zone (A1), providing a second nonvolatile physical memory zone (A2), and, in response to a write command of an initial data, searching for a first erased location in the first memory zone, writing the initial data (DT1a) in the first location (PB1(DPP0)), and writing, in the metadata (DSC0) an information (DS(PB1)) allowing the first location to be found and an information (LPA, DS(PB1)) forming a link between the first location and the location of the data in the virtual memory.
Abstract: A device belonging to a wireless communication system and adapted to exchange information with another device of the system within a main band of frequencies includes N different antennas having respectively different antenna characteristics, with N being greater than one. A controllable selector selects one of the antennas. A detector detects through the selected antenna the eventual presence of at least one interferer operating within the main band of frequencies. A controller, upon presence of a detected interferer, controls the selector for selecting another antenna.
Abstract: An IC Card may include electronic components to receive a power supply and a main clock signal by a reader device. The power supply may be provided to a subset of the electronic components during a main clock stop status wherein the main clock signal is suspended for avoiding a maximum power consumption threshold. The IC Card may also include a low precision clock included in the subset of electronic components for measuring time in the main clock stop status.
Type:
Grant
Filed:
May 16, 2008
Date of Patent:
July 30, 2013
Assignee:
STMicroelectronics International N.V.
Inventors:
Francesco Varone, Pasquale Vastano, Amedeo Veneroso
Abstract: A method is for decoding a block of N information items encoded with an error correction code and mutually correlated. The method includes carrying out a first decorrelation of the N information items of a block is carried out, and storing the block decorrelated. The method also includes a performing a processing for decoding a group of P information items of the block, and decorrelating at least part of the P decoded information items. The processing for decoding the group of P information items and the decorrelation are repeated with different successive groups of P information items of the block until the N information items of the block have been processed, until a decoding criterion is satisfied.
Abstract: A thermally enhanced expanded wafer level ball grid array package. The expanded wafer level ball grid array package includes an integrated thermally conductive heat dissipater. In one embodiment the heat dissipater is positioned in close proximity to a non-active face of a die and is separated from the non-active face by a thermal interface material. In another embodiment the heat dissipater includes legs that displace the heat dissipater a short distance from the non-active die face, with the intervening space occupied by encapsulation material. In yet another embodiment, the thermal interface material exists between the non-active die face and the heat dissipater, but extends beyond the edge of the semiconductor die to also cover a portion of the encapsulation material. Methods for making the various embodiments of the expanded wafer level ball grid array package are also shown.
Abstract: A switching circuit includes a first input stage having an input for receiving a first input signal, an output, and a power terminal for receiving an increasing analog current, a second input stage having an input for receiving a second input signal, an output, and a power terminal for receiving a decreasing analog current, and an output node coupled to the outputs of the first input stage and the second input stage for providing a switched output signal. An output stage is coupled between the first and second input stages and the output node. The first and second input stages are operational amplifiers.
Abstract: The addition of high throughput capability elements to beacon frames and peer link action frames in wireless mesh networks enable the utilization of desirable features without further modifications to the network. Rules can be established for high throughput mesh point protection in a mesh network, Space-time Block Code (STBC) operations and 20/40 MHz operation selections. However, features such as PSMP (power save multi-poll) and PCO (phased coexistence operations) are barred from implementation to prevent collisions.
Abstract: A thermoelectric device includes a plurality of thin-film thermoelectric elements. Each thin-film thermoelectric element is a Seebeck-Peltier device. The thin-film thermoelectric elements are electrically coupled in parallel with each other. The thermoelectric device may be fabricated using conventional semiconductor processing technologies and may be a thin-film type device.
Abstract: A method of operating a speaker system including a speaker coupled to an amplifier, and a dedicated digital speaker protection circuit includes turning on the amplifier in a mute mode, after a first delay period, issuing a play command to the amplifier to place the amplifier in a play mode, but without an input signal during a second delay period, and performing a speaker offset detection during the second delay period, wherein, if there is an offset, then the amplifier is forced back into the mute mode, and if there is no offset, then the amplifier is allowed to continue to operate in the play mode. The method also includes issuing a speaker protection control signal or command if an offset is detected.
Abstract: A method of forming an embedded wafer level optical package includes attaching a sensor die, PCB bars and an LED on adhesive tape laminated on a carrier, attaching a dam between two light sensitive sensors of the sensor die, encapsulating the sensor die, the PCB bars, the LED, and the dam in an encapsulation layer, debonding the carrier, grinding a top surface of the encapsulation layer, forming vias through the encapsulation layer to the sensor die and the LED, filling the vias with conductive material, metalizing the top surface of the encapsulation layer, dielectric coating of the top surface of the encapsulation layer, dielectric coating of a bottom surface of the encapsulation layer, patterning the dielectric coating of the bottom surface of the encapsulation layer, and plating the patterned dielectric coating of the bottom surface of the encapsulation layer.
Type:
Grant
Filed:
December 22, 2011
Date of Patent:
July 23, 2013
Assignee:
STMicroelectronics Pte Ltd.
Inventors:
Anandan Ramasamy, KahWee Gan, Hk Looi, David Gani
Abstract: An image sensor IC may have a non-volatile memory for several functions. The functions may include storing control parameters for a camera autofocus module, part tracking data, and data for defect correction or color science. The non-volatile memory can in particular be an antifuse non-volatile memory, which may not need special light shielding.
Abstract: The present disclosure relates to a method for executing, by a processor, a program read in a program memory, comprising steps of: detecting a program memory read address jump; providing prior to a jump address instruction for jumping a program memory read address, an instruction for storing the presence of the jump address instruction; and activating an error signal if an address jump has been detected and if the presence of a jump address instruction has not been stored. The present disclosure also relates to securing integrated circuits.
Type:
Grant
Filed:
June 16, 2009
Date of Patent:
July 23, 2013
Assignee:
STMicroelectronics SA
Inventors:
Frederic Bancel, Nicolas Berard, David Hely