Patents Assigned to STMicroelectronics
  • Authentication of a terminal by an electromagnetic transponder
    Patent number: 8482388
    Abstract: A method of authentication of a terminal generating a magnetic field by a transponder including an oscillating circuit from which a D.C. voltage is generated, wherein at least one quantity depending on the coupling between the transponder and the terminal is compared with at least one reference value.
    Type: Grant
    Filed: June 15, 2010
    Date of Patent: July 9, 2013
    Assignee: STMicroelectronics (Rousset) SAS
    Inventor: Luc Wuidart
  • Electronic component allowing the decoding of a radiofrequency transmission channel conveying coded digital information, in particular for satellite digital telebroadcasting
    Patent number: 8483644
    Abstract: The component, fully integrated onto a monolithic substrate, includes a tuner, a demodulator, and a channel decoder. The overall filtering is carried out in two parts, a baseband analog filtering and a digital Nyquist filtering removing the information of adjacent channels. It outputs a stream of MPEG data.
    Type: Grant
    Filed: May 17, 2002
    Date of Patent: July 9, 2013
    Assignee: STMicroelectronics SA
    Inventors: Pierre Busson, Bernard Louis-Gavet, Pierre-Olivier Jouffre
  • Method for detecting an attack by fault injection into a memory device, and corresponding detection system
    Patent number: 8484731
    Abstract: The method for detecting an attack by fault injection into memory positions includes a generation of an initial value of a reference indication including an application of a reversible mathematical operator to the values of the information stored in the memory positions. An updating of the value of this reference indication is performed on each write in at least one memory position by using the operator, the reverse operator and the values of the stored information before and after each write in the at least one memory position. And, in the presence of a request, a check is performed as to whether a criterion involving the values of the information stored in the memory positions at the time of the request and the operator or its reverse is or is not satisfied by the value of the reference indication at the time of the request.
    Type: Grant
    Filed: July 18, 2011
    Date of Patent: July 9, 2013
    Assignee: STMicroelectronics (Rousset) SAS
    Inventor: Frédéric Bancel
  • APPARATUS
    Publication number: 20130169331
    Abstract: An embodiment of a circuit includes a data latch and a plurality of cascaded latches, wherein a first of the plurality of cascaded latches is configured to receive a first signal from the data latch and each subsequent cascaded latch is configured to receive a data output signal of a preceding cascaded latch, and an error-detection circuit configured to receive the respective data output signals and detect error in operation of the cascaded latches based thereon.
    Type: Application
    Filed: June 5, 2012
    Publication date: July 4, 2013
    Applicant: STMICROELECTRONICS INTERNATIONAL N.V.
    Inventors: Abhishek JAIN, Chittoor PARTHASARATHY
  • HS-CAN BUS CLOCK RECOVERY USING A TRACKING OSCILLATOR CIRCUIT
    Publication number: 20130173949
    Abstract: A method for recovering a clock frequency of a CAN bus, the method including: receiving a data signal, wherein the data signal includes at least one state transition; detecting the state transition; and adjusting a frequency of a clocking signal generated by an oscillator circuit, wherein the frequency is adjusted when the state transition is detected and adjusting the frequency is for recovering the clock frequency of the CAN bus.
    Type: Application
    Filed: December 14, 2012
    Publication date: July 4, 2013
    Applicant: STMicroelectronics R&D (Shanghai) Co., Ltd.
    Inventor: STMicroelectronics R&D (Shanghai) Co. Ltd.
  • DUAL PORT REGISTER FILE MEMORY CELL WITH REDUCED SUSCEPTIBILITY TO NOISE DURING SAME ROW ACCESS
    Publication number: 20130170288
    Abstract: A memory cell is formed by storage latch having a true node and a complement node. The cell includes a write port operable in response to a write signal on a write word line to write data from write bit lines into the latch, and a separate read port operable in response to a read signal on a read word line to read data from the latch to a read bit line. The circuitry of the memory cell is configured to address voltage bounce at the complement node during reading of the memory (where the voltage bounce arises from a simultaneous write to another memory cell in a same row).
    Type: Application
    Filed: December 29, 2011
    Publication date: July 4, 2013
    Applicant: STMICROELECTRONICS PVT. LTD.
    Inventors: Nishu KOHLI, Hiten ADVANI
  • SEMICONDUCTOR INTEGRATED DEVICE WITH MECHANICALLY DECOUPLED ACTIVE AREA AND RELATED MANUFACTURING PROCESS
    Publication number: 20130168840
    Abstract: A semiconductor integrated device is provided with: a die having a body of semiconductor material with a front surface, and an active area arranged at the front surface; and a package having a support element carrying the die at a back surface of the body, and a coating material covering the die. The body includes a mechanical decoupling region, which mechanically decouples the active area from mechanical stresses induced by the package; the mechanical decoupling region is a trench arrangement within the body, which releases the active area from an external frame of the body, designed to absorb the mechanical stresses induced by the package.
    Type: Application
    Filed: December 18, 2012
    Publication date: July 4, 2013
    Applicants: STMICROELECTRONICS S.R.L., STMICROELECTRONICS (GRENOBLE 2) SAS
    Inventors: STMicroelectronics (Grenoble 2) SAS, STMicroelectronics S.r.l.
  • COMPENSATING MOLD PLUNGER FOR INTEGRATED CIRCUIT MANUFACTURE
    Publication number: 20130168898
    Abstract: A device and method for manufacturing integrated circuit packaging using a mold plunger with position compensation in a manufacturing setting. In an embodiment, a compensating mold plunger, which may be used during the manufacture of an integrated circuit package, engages a die set on a carrier and within a bushing. This may be done to inject a mold compound on top of the die/carrier. If the bushing that is housing the die/carrier tandem is misaligned with the plunger in any lateral direction, the amount of pressure may be compromised. A compensating mold plunger includes a flexible portion that allows for the head of the plunger to properly engage the die/carrier despite any possible misalignments. Further, different die/carrier combinations may also be used with a compensating mold plunger because the pressure and force applied may be uniform inside a bushing despite the contents of the bushing.
    Type: Application
    Filed: December 29, 2011
    Publication date: July 4, 2013
    Applicant: STMICROELECTRONICS ASIA PACIFIC PTE LTD.
    Inventors: Aaron CADAG, BernieChrisanto ANG, Richard LAYLO
  • STRAINED TRANSISTOR STRUCTURE
    Publication number: 20130168743
    Abstract: A strain enhanced transistor is provided having a strain inducing layer overlying a gate electrode. The gate electrode has sloped sidewalls over the channel region of the transistor.
    Type: Application
    Filed: December 30, 2011
    Publication date: July 4, 2013
    Applicant: STMICROELECTRONICS, INC.
    Inventor: Barry Dove
  • ADAPTIVE SELF-CALIBRATION OF SMALL MICROPHONE ARRAY BY SOUNDFIELD APPROXIMATION AND FREQUENCY DOMAIN MAGNITUDE EQUALIZATION
    Publication number: 20130170666
    Abstract: Methods and apparatus for self-calibration of small-microphone arrays are described. In one embodiment, self-calibration is based upon a mathematical approximation for which a detected response by one microphone should approximately equal a combined response from plural microphones in the array. In a second embodiment, self-calibration is based upon matching gains in each of a plurality of Bark frequency bands, and applying the matched gains to frequency domain microphone signals such that the magnitude response of all the microphones in the array approximates an average magnitude response for the array. The methods and apparatus may be implemented in hearing aids or small audio devices and used to mitigate adverse aging and mechanical effects on acoustic performance of small-microphone arrays in these systems.
    Type: Application
    Filed: December 29, 2011
    Publication date: July 4, 2013
    Applicant: STMicroelectronics Asia Pacific Pte. Ltd.
    Inventors: Samuel Samsudin Ng, Muralidhar Karthik, Sapna George
  • EFFICIENT REDUCTION OF ELECTROMAGNETIC EMISSION IN LIN DRIVER
    Publication number: 20130169322
    Abstract: A Local Interconnect Network (LIN) driver circuit employs a charging/discharging current applied to the gate of a driver transistor coupled to an LIN bus. The charging current includes a constant charging current and an additional soft charging current, whereas the discharging current includes a constant discharging current and an additional soft discharging current. As a result of the soft charge/discharge components, there is a significant reduction in electromagnetic emission on the LIN bus.
    Type: Application
    Filed: December 13, 2012
    Publication date: July 4, 2013
    Applicant: STMICROELECTRONICS R&D CO. LTD. (SHANGHAI)
    Inventor: STMicroelectronics R&D Co. Ltd. (Shanghai)
  • BIDIRECTIONAL VOLTAGE DIFFERENTIATOR CIRCUIT
    Publication number: 20130169188
    Abstract: A bidirectional voltage differentiator circuit comprises start-up circuitry, sensing circuitry, and output circuitry coupled to logic circuitry. The start-up circuitry acts to start-up the sensing circuitry when the circuit is powered on, and accelerates the response of the sensing circuitry thereafter. The sensing circuitry senses variation in an input voltage applied to an input node. Responsive to the voltage variation sensed by the sensing circuitry, the output circuitry produces a state change at a first or second output node. The logic circuitry receives the states of the output nodes and produces a logic output signal to indicate the occurrence of the variation sensed in the input voltage. The voltage sensing circuit is operable to sense variation of the input voltage regardless of whether the voltage is rising or falling and without regard to the DC value of the input voltage.
    Type: Application
    Filed: October 10, 2012
    Publication date: July 4, 2013
    Applicant: STMICROELECTRONICS (SHENZHEN) R&D CO. LTD.
    Inventor: STMicroelectronics (Shenzhen) R&D Co. Ltd.
  • REGISTER FILE ORGANIZATION TO SHARE PROCESS CONTEXT FOR HETEROGENEOUS MULTIPLE PROCESSORS OR JOINT PROCESSOR
    Publication number: 20130173865
    Abstract: A register file organization is used to support multiple accesses from more than one processor or pipeline. This shared register file is organized for a multiple processor device that includes a high performance (HP) and a low power (LP) core. The shared register file includes separate HP and LP storage units coupled to separate HP and LP write and read ports.
    Type: Application
    Filed: December 3, 2012
    Publication date: July 4, 2013
    Applicants: STMICROELECTRONICS, S.R.L., STMICROELECTRONICS (BEIJING) R&D COMPANY LTD.
    Inventors: STMicroelectronics (Beijing) R&D Company Ltd., STMicroelectronics, s.r.l.
  • APPARATUS AND METHOD FOR PLACING SOLDER BALLS
    Publication number: 20130171816
    Abstract: A system and process for forming a ball grid array on a substrate includes defining a plurality of openings in a resist layer on the substrate, and forming a plurality of openings in the resist layer, each positioned over a contact pad of the substrate. Flux is then deposited in the openings, and solder balls are positioned in each opening with the flux. Solder bumps are formed by reflowing the solder balls in the respective openings. The resist layer is then removed, leaving an array of solder bumps on the substrate. The flux can be deposited by depositing a layer of flux, then removing the flux, except a portion that remains in each opening. Solder balls can be positioned by moving a ball feeder across the resist layer and dropping a solder ball each time an aperture in the ball feeder aligns with an opening in the resist layer.
    Type: Application
    Filed: December 29, 2011
    Publication date: July 4, 2013
    Applicant: STMICROELECTRONICS PTE LTD.
    Inventor: Yonggang Jin
  • TESTING OF ANALOG-TO-DIGITAL CONVERTERS
    Publication number: 20130169456
    Abstract: Complete testing of an analog-to-digital converter (ADC) can be carried out using digital signals and at high speeds. Circuit elements are added to an ADC so that a first phase of testing may be carried out using a limited number of analog test voltages. The ADC may then be reconfigured using added circuit elements to disable conventional analog-to-digital conversion. A digital signal may then be applied to the ADC to rapidly test all switching elements used in analog-to-digital conversion. According to some implementations, testing times for ADCs may be reduced from hours to milliseconds.
    Type: Application
    Filed: December 29, 2011
    Publication date: July 4, 2013
    Applicant: STMicroelectronics Asia Pacific Pte. Ltd.
    Inventors: Chee Weng Cheong, Kien Beng Tan
  • FULLY INTEGRATED CIRCUIT FOR GENERATING A RAMP SIGNAL
    Publication number: 20130169324
    Abstract: A fully integrated ramp generator circuit includes a first current generator that sources current to first capacitor through a first transistor that is gate controlled by the complement of a periodic signal. The ramping voltage stored on the first capacitor is buffered to an output node as a ramp output signal. A second transistor couples the output node to the first current generator and is gate controlled by the periodic signal. The periodic signal is generated at the output of a flip-flop that receives an input clock signal and reset signal. The reset signal is generated by a comparator circuit operable to compare the voltage on a second capacitor to a reference. The second capacitor is charged by a second current source and discharged by a third transistor that is gate controlled by the periodic signal.
    Type: Application
    Filed: October 10, 2012
    Publication date: July 4, 2013
    Applicant: STMicroelectronics R&D (Shanghai) Co. Ltd.
    Inventor: STMicroelectronics R&D (Shanghai) Co. Ltd.
  • SEMICONDUCTOR PACKAGE SUBSTRATE AND METHOD, IN PARTICULAR FOR MEMS DEVICES
    Publication number: 20130170166
    Abstract: A semiconductor package substrate suitable for supporting a damage-sensitive device, including a substrate core having a first and opposite surface; at least one pair of metal layers covering the first and opposite surfaces of the package substrate core, which define first and opposite metal layer groups, at least one of said layer groups including at least one metal support zone; one pair of solder mask layers covering the outermost metal layers of the at least one pair of metal layers; and a plurality of routing lines; wherein the at least one metal support zone is formed so that it lies beneath at least one side of the base of the damage-sensitive device and so as to occupy a substantial portion of the area beneath the damage-sensitive device which is free of said routing lines; a method for the production of such substrate is also described.
    Type: Application
    Filed: February 27, 2013
    Publication date: July 4, 2013
    Applicant: STMICROELECTRONICS S.R.L.
    Inventor: STMicroelectronics S.r.l.
  • METHODS AND APPARATUS FOR TMAH ETCHING
    Publication number: 20130168355
    Abstract: Methods and apparatus for etching materials using tetramethylammonium hydroxide (TMAH) are described. The methods may involve including an additive when applying the TMAH to the material to be etched. The additive may be a gas, and in in some situations may be clean dry air. The clean dry air may be provided with the TMAH to minimize or prevent the formation of hillocks in the etched structure. Apparatus for performing the methods are also described.
    Type: Application
    Filed: December 29, 2011
    Publication date: July 4, 2013
    Applicant: STMicroelectronics Pte Ltd.
    Inventors: Ying Yu, Tien Choy Loh, Shian Yeu Kam
  • VIDEO IMAGE CAPTURE AND PLAYBACK FOR DISPLAY DEVICES
    Publication number: 20130170820
    Abstract: A display controller integrated circuit (IC) is disclosed. The display controller IC includes a video interface that receives an image for real time display on a display. The display controller IC further includes means that is configured to store the image on a data storage device so that it can be displayed again at a later time. A display device including the display controller IC and a method of capturing and displaying images are also disclosed.
    Type: Application
    Filed: December 29, 2011
    Publication date: July 4, 2013
    Applicant: STMicroelectronics Ltd.
    Inventors: Einstein CHENG, Louis FENG
  • LOW VOLTAGE WRITE TIME ENHANCED SRAM CELL AND CIRCUIT EXTENSIONS
    Publication number: 20130170289
    Abstract: A memory cell is formed by storage latch coupled between a true bit line node and a complement bit line node. The latch has an internal true node and an internal complement node. The cell additionally includes a first transistor that is source-drain coupled between the internal true node and a word line node. A control terminal of the first transistor is coupled to receive a signal from the complement bit line node and functions to source current into the true node during write mode. The cell further includes a second transistor that is source-drain coupled between the internal complement node and the word line node. A control terminal of the second transistor is coupled to receive a signal from the true bit line node and functions to source current into the complement node during write mode.
    Type: Application
    Filed: December 29, 2011
    Publication date: July 4, 2013
    Applicant: STMICROELECTRONICS PVT. LTD.
    Inventors: Anuj Grover, Gangaikondan Subramani Visweswaran