Abstract: A cartridge-like chemical sensor is formed by a housing having a base and a cover fixed to the base and provided with an input opening, an output hole and a channel for a gas to be analyzed. The channel extends in the cover between the input opening and the output hole and faces a printed circuit board carrying an integrated circuit having a sensitive region open toward the channel and of a material capable to bind with target chemicals in the gas to be analyzed. A fan is arranged in the housing, downstream of the integrated device, for sucking the gas after being analyzed, and is part of a thermal control system for the integrated circuit.
Type:
Grant
Filed:
January 28, 2011
Date of Patent:
August 6, 2013
Assignee:
STMicroelectronics S.r.l.
Inventors:
Federico Giovanni Ziglioli, Amedeo Maierna, Flavio Francesco Villa, Ubaldo Mastromatteo, Gabriele Barlocchi
Abstract: A circuit has an input configured to receive a periodic signal having a first value. First circuitry is provided to generate a pulse when said periodic signal has a rising edge and a pulse when said periodic signal has a falling edge. Second circuitry is configured to receive said pulses and responsive thereto to provide an output signal, said output signal having a same duty cycle as said input signal and having a second value.
Abstract: A circuit includes a differential amplifier having a folded cascode architecture with a pair of cascode transistors. A sensing circuit senses a common mode input voltage of a differential input signal applied to the differential amplifier. A bias generator circuit generates a bias voltage for application to the pair of cascode transistors in the folded cascode architecture. The bias generator circuit is connected to an output of the sensing circuit such that the generated bias voltage has a value which is dependent on the sensed common mode input voltage. This dependence stabilizes a common mode output voltage from the differential amplifier in response to changes in the common mode input voltage.
Abstract: A circuit includes a plurality of logic gates and a drive circuit. The plurality of logic gates are coupled between a first supply node and a second supply node. Each logic gate has at least one input and consumes a short circuit current during a logic state transition. The drive circuit is coupled to the inputs of the plurality of logic gates to deliver a copy of an input signal to each logic gate, wherein the input signal copies arrive at the inputs of the logic gates at substantially different times. The circuit may be incorporated in a touch screen panel and a display.
Type:
Grant
Filed:
December 30, 2011
Date of Patent:
August 6, 2013
Assignees:
STMicroelectronics Asia Pacific Pte Ltd, STMicroelectronics Pte Ltd
Abstract: A low density parity check decoder for performing LDPC decoding based on a layered algorithm applied to a parity check matrix, the decoder including a channel memory, a metrics memory, first and second operand supply paths each arranged to provide operands based on channel values and metrics values; a processor block including a plurality processing units in parallel and arranged to receive operands from the first supply path and to determine updated metric values, a buffer arranged to store at least one of the operands from the first supply path; and an adder coupled to an output of the processor block and arranged to generate updated channel values by adding the updated metrics values to operands from a selected one of the buffer and the second supply path.
Abstract: Device for generating a signal of parametrizable frequency comprising a phase locked loop including a generator of a reference signal, a phase-frequency comparator comprising a first input for receiving the reference signal, an oscillator controlled on the basis of the result output by the phase-frequency comparator, a fractional divider coupled between an output of the oscillator and a second input of the phase-frequency comparator, and a selector selectively linking an input of the oscillator either with an input of the generator, or with the output of the oscillator as a function of the multiplication ratio of the fractional divider.
Type:
Grant
Filed:
September 9, 2011
Date of Patent:
August 6, 2013
Assignee:
STMicroelectronics SA
Inventors:
Didier Belot, Pierre-Olivier Lucas De Peslouan, Cédric Majek, Yann Deval, Thierry Taris, Jean-Baptiste Begueret
Abstract: This invention relates to cognitive radio based wireless communications of dynamic spectrum access networks, and more particularly to a method of addressing inter-systems (cells) coexistence and spectrum sharing. The described method of spectrum sharing called On-Demand Spectrum Contention, integrates Dynamic Frequency Selection and Transmission Power Control with iterative on-demand spectrum contentions and provides fairness, adaptability, and efficiency of spectrum access for dynamic spectrum access systems using active inter-system coordination.
Abstract: A thin film capacitor is characterized by forming a lower electrode, coating a composition onto the lower electrode without applying an annealing process having a temperature of greater than 300° C., drying at a predetermined temperature within a range from ambient temperature to 500° C., and calcining at a predetermined temperature within a range of 500 to 800° C. and higher than a drying temperature. The process from coating to calcining is performed the process from coating to calcining once or at least twice, or the process from coating to drying is performed at least twice, and then calcining is performed once. The thickness of the dielectric thin film formed after the first calcining is 20 to 600 nm. The ratio of the thickness of the lower electrode and the thickness of the dielectric thin film formed after the initial calcining step (thickness of lower electrode/thickness of the dielectric thin film) is preferably in the range 0.10 to 15.0.
Type:
Grant
Filed:
June 28, 2011
Date of Patent:
August 6, 2013
Assignees:
Mitusbishi Materials Corporation, STMicroelectronics(Tours) SAS
Abstract: A method for forming a via connecting a first upper level layer to a second lower level layer, both layers being surrounded with an insulating material, the method including the steps of: a) forming an opening to reach an edge of the first layer, the opening laterally continuing beyond said edge; b) forming a layer of a protection material on said edge only; c) deepening said opening by selectively etching the insulating material to reach the second lower level layer; and d) filling the opening with at least one conductive contact material.
Type:
Application
Filed:
January 23, 2013
Publication date:
August 1, 2013
Applicants:
Commissariat a l'Energie Atomique et aux Energies Alternatives, STMicroelectronics S.A.
Inventors:
STMicroelectronics S.A., Commissariat a l'Energie Atomique et aux Energies Alternatives
Abstract: An apparatus includes a first clock source, a second clock source and circuitry configured to supply a clock signal to a circuit. The circuitry operates to change the clock signal from one frequency to another different frequency. This change is made in a manner whereby no clock signal is supplied during a period of time when the change from the one frequency to the another different clock frequency is being made.
Abstract: A control device of a switching converter controls the closing and opening of a switch of the converter that regulates the operation of an inductor. The control device includes a ramp voltage generator, a switch control circuit configured to close the switch based on a comparison of the ramp voltage with a first signal and a generator control circuit configured to control the ramp voltage generator based on a value of a second signal representative of a current flowing through the inductor of the converter, in comparison with the value of a third signal.
Type:
Application
Filed:
January 24, 2013
Publication date:
August 1, 2013
Applicants:
STMICROELECTRONICS S.R.L., DORA S.P.A.
Abstract: An asynchronous level shifter electronic circuit including: a transmitter, which can be coupled to a first voltage and generates a communication signal; a receiver, which can be coupled to a second voltage; and a capacitive coupling stage, which receives the communication signal and supplies a corresponding filtered signal to the receiver. The receiver includes: a threshold device, which has an input terminal and an output terminal and switches an electrical quantity on the output terminal between a first value and a second value, as a function of corresponding transitions through a threshold of a first intermediate signal present on the input terminal, to generate a second intermediate signal; and a biasing circuit, which generates the first intermediate signal to have a d.c. component, which is a function of the second intermediate signal, and superposed on which is a variable component, which is a function of the filtered signal.
Abstract: A control device controls a switching converter. The converter has an input alternating supply voltage, a regulated direct voltage on the output terminal, and a switch connected to an inductor. The control device controls the closing and opening time period of said switch for each cycle and receives a first input signal representative of the current flowing through one element of the converter. The control device comprises a counter configured to count a time period, a comparator configured to compare said first input signal with a second signal, digital control block configured to control the closing and opening of said switch and to activate said counter to start the counting of said time period when the said first input signal crosses said second signal, with said switch being closed. The digital control block is configured to open the switch when the counter finishes the counting of said time period.
Type:
Application
Filed:
January 24, 2013
Publication date:
August 1, 2013
Applicants:
STMICROELECTRONICS S.R.L., DORA S.P.A.
Abstract: An SOI substrate has a first region isolated from a second region. An SiGe layer is deposited on top of the SOI substrate in the second region. The substrate is subjected to a thermal oxidation process which drives in Ge from the SiGe layer to form an SiGeOI structure in the second region and an overlying oxide layer. If the SOI substrate is exposed in the first region, the thermal oxidation process further produces an oxide layer overlying the first region. The oxide layer(s) is(are) removed to expose an Si channel layer in the first region and an SiGe channel layer in the second region. Transistor gate stacks are formed over each of the Si channel layer and SiGe channel layer. Raised source and drain regions are formed from the Si channel layer and SiGe channel layer adjacent the transistor gate stacks.
Type:
Application
Filed:
June 4, 2012
Publication date:
August 1, 2013
Applicant:
STMICROELECTRONICS, INC.
Inventors:
Nicolas Loubet, Prasanna Khare, Qing Liu
Abstract: An integrated circuit including: a semiconductor substrate of a first conductivity type having at least one well of a second conductivity type laterally delimited, on two opposite walls, by regions of the first conductivity type, defined at its surface; at least one region of the second conductivity type which extends in the semiconductor substrate under the well; and a system for detecting a variation of the substrate resistance between each association of two adjacent regions of the first conductivity type.
Abstract: An image sensor is formed by a pixel array and a microlens array. One microlens is associated with each pixel. The microlens is positioned in a manner that is offset from a center of its associated pixel. The positioning offset for the microlens is a combination of a first offset determined as a function of the pixel's position relative to a center of the image sensor and a second offset that is randomly selected (both in terms of distance and radial direction). The random offset provides the effect that the spatial frequency information from the shifted microlens array is randomly distributed so as to provide different spatial frequencies and effectively cancel out Moiré interference.
Abstract: An embodiment relates to distributing media over a peer-to-peer network by employing a digital fountain coding. Accordingly, the file is separated into file portions and the portions are combined to obtain encoded portions which are then transmitted. A file portion may form a part of a plurality of the encoded and transmitted file portions. The portions may be pieces and/or blocks of the file, wherein a piece includes a plurality of blocks. An embodiment further provides mechanisms for efficient block-request-transmission approaches in which the initial requests for blocks in the file are transmitted and additional requests for some random blocks are transmitted. The additional requests may be transmitted after each piece or after the entire file blocks have been requested, or both.
Abstract: A method for manufacturing an integrated circuit, including the steps of forming first transistors on a first semiconductor layer; depositing a first insulating layer above the first semiconductor layer and the first transistors, and leveling the first insulating layer; depositing a conductive layer above the first insulating layer, and covering the conductive layer with a second insulating layer; bonding a semiconductor wafer to the second insulating layer; thinning the semiconductor wafer to obtain a second semiconductor layer; and forming second transistors on the second semiconductor layer.
Type:
Application
Filed:
January 28, 2013
Publication date:
August 1, 2013
Applicants:
Commissariat a l'Energie Atomique et aux Energies Alternatives, STMicroelectronics S.A.
Inventors:
STMicroelectronics S.A., Commissariat a l'Energie Atomique et aux Energies Alternatives
Abstract: A device for cutting a wafer provided with grooves on its upper surface having its lower surface supported by a flexible film secured to a frame. This device includes a system for locating the grooves and for positioning the frame with respect to a cutting system, and setting means for positioning the wafer in front of the locating system so that the located area is at a determined distance from the locating system.
Abstract: A method for personalizing a SIM card may include loading the SIM card on a conveyor belt of a production machine, programming the SIM card, and unloading the programmed SIM card from the conveyor belt. If the intermediate result is wrong, the method may check an intermediate result of the programming and re-program the SIM card.