Abstract: The disclosure relates to an encapsulated flexible electronic device comprising a flexible electronic device, wherein the flexible electronic device is protected by a protective coating layer, a first cover sheet and a second cover sheet being made of patterned and developed dry photoresist films. The encapsulated flexible electronic device may be used to directly realize different type of electronic devices, such as smart sensor devices.

Abstract: A trench is formed in a semiconductor substrate by depositing an etch mask on the substrate having an opening, etching of the trench through the opening, and doping the walls of the trench. The etching step includes a first phase having an etch power set to etch the substrate under the etch mask, and a second phase having an etch power set smaller than the power of the first phase. Further, the doping of the walls of the trench is applied through the opening of the etch mask.

Abstract: The disclosure concerns a method implemented by a processing device. The method includes performing a first execution by the processing device of a computing function based on one or more initial parameters stored in a first memory device. The execution of the computing function generates one or more modified values of at least one of the initial parameters, wherein during the first execution the one or more initial parameters are read from the first memory device and the one or more modified values are stored in a second memory device. The method also includes performing a second execution by the processing device of the computing function based on the one or more initial parameters stored in the first memory device.

Abstract: An authentication method of a first module by a second module includes the steps of generating a first random datum by the second module to be sent to the first module, generating a first number by the first module starting from the first datum and by way of a private key, and generating a second number by the second module to be compared with the first number, so as to authenticate the first module. The step of generating the second number is performed starting from public parameters and is independent of the step of generating the first number.

Abstract: The disclosure relates to a method for detecting the presence of an object near a detection device, comprising: reverse biasing single photon avalanche photodiodes, at a bias voltage greater than a breakdown voltage of a PN junction of each photodiode, emitting pulses of an incident photon beam, detecting photodiodes which avalanche trigger after the reception by the photodiode of at least one photon of a reflected photon beam produced by a reflection of the incident beam on an object near the detection device, determining the object presence as a function of the existence of at least one avalanche triggering in one of the photodiodes, and selecting a number of photodiodes to be reverse biased in relation to the detection device, as a function of a load of a circuit for generating the bias voltage.

Abstract: An image sensor having improved dynamic range includes a signal that is read out for a selection of pixels which act as a calibration to govern the choice of exposure levels to be applied to the rest of the array. In this way, the sensor is operable to adapt to variations in scene intensity. The pixels in the array are vertically and horizontally addressed so as to enable accounted for small areas of intensity variation across an imaged scene.

Abstract: An image sensor including a pixel array, each pixel including, in a substrate of a doped semiconductor material of a first conductivity type, a first doped region of a second conductivity type at the surface of the substrate; an insulating trench surrounding the first region; a second doped region of the first conductivity type, more heavily doped than the substrate, at the surface of the substrate and surrounding the trench; a third doped region of the second conductivity type, forming with the substrate a photodiode junction, extending in depth into the substrate under the first and second regions and being connected to the first region; and a fourth region, more lightly doped than the second and third regions, interposed between the second and third regions and in contact with the first region and/or with the third region.

Abstract: An embodiment described herein includes a method for producing a wafer of a first semiconductor material. Said first semiconductor material has a first melting temperature. The method comprises providing a crystalline substrate of a second semiconductor material having a second melting temperature lower than the first melting temperature, and exposing the crystalline substrate to a flow of first material precursors for forming a first layer of the first material on the substrate. The method further comprising bringing the crystalline substrate to a first process temperature higher than the second melting temperature, and at the same time lower than the first melting temperature, in such a way the second material melts, separating the second melted material from the first layer, and exposing the first layer to the flow of the first material precursor for forming a second layer of the first material on the first layer.

Abstract: Methods and systems are disclosed for the operation of wireless communication networks, in which communication channels can have possibly overlapping bandwidths of different sizes, including sensor networks operating by the IEEE 802.11ah standard. A first method of signaling to negotiate the channel bandwidth conveys the needed information in the SIG field of the PPDUs of duplicate RTS/CTS frames, and uses the SIG field of PPDUs of duplicated data, control and management frames to perform transmit opportunity protection. A second method of signaling to negotiate the channel bandwidth conveys the needed information in the scrambling sequence field of PPDUs of duplicate RTS, and uses the scrambling sequence field of PPDUs of duplicated data, control and management frames to perform transmit opportunity protection.

Abstract: A single-photon avalanche diode assembly, the diode including a central terminal and a peripheral terminal, the peripheral terminal being connected to an input of a comparator and to a first power supply terminal by a first resistor, the central terminal being connected by a conductive track to a second power supply terminal, a second resistor being arranged in series on said conductive track.

Abstract: A device for protecting a set of N nodes from electrostatic discharges, wherein N is greater than or equal to three, includes a set of N units respectively possessing N first terminals respectively connected to the N nodes and N second terminals connected together to form a common terminal. Each unit includes at least one MOS transistor including a parasitic transistor connected between a pair of the N nodes and configured, in the presence of a current pulse between the pair of nodes, to operate, at least temporarily, in a hybrid mode including MOS-type operation in a sub-threshold mode and operation of the bipolar transistor.

Abstract: A monitor includes a register configured to store at least two contexts and a context change value. A context selector is configured to select at least one of the two contexts for context monitoring. The selection is made dependent on whether the context change value matches a first part of a memory access address.

Abstract: A package includes a first die and a second die. The dies are connected to each other through an interface. The interface is configured to transport both control signals and memory transactions. A synchronizer is provided on at least one of said first and second of said dies. The synchronizer is configured to cause any untransmitted control signal values to be transmitted across the interface.

Abstract: The disclosure relates to a sense amplifier comprising a cascode transistor and means for biasing the cascode transistor, supplying a control voltage to a gate terminal of the cascode transistor. The means for biasing the cascode transistor comprise means for isolating the gate terminal of the cascode transistor from the output of the voltage generator during a first period of the precharge phase, so as to boost the bitline voltage, then for linking the gate terminal to the output of the voltage generator during a second period of the precharge phase. Application in particular to sense amplifiers for non-volatile memories.

Abstract: Front-side integrated parts of integrated-circuit chips are produced at locations on a substrate wafer. The front-side parts have a front side. A support wafer having a bearing side is mounted with the bearing side on top of said front-side parts. The support wafer includes at least one weak surface layer. This weak surface layer is attached to the substrate wafer using a retaining adhesive. In one implementation, the weak surface layer is attached to a front surface of the wafer. In another implementation, the weak surface layer is attached to a peripheral edge of the wafer. After attaching the support wafer, back-side integrated parts of the integrated-circuit chips are produced on the substrate wafer. The weak surface layer is then destroyed so as to demount the support wafer from the substrate wafer.

Abstract: Method of elementary updating a check node of a non-binary LDPC code during a decoding of a block encoded with said LDPC code, comprising receiving a first input message (U) and a second input message (V) each comprising nm doublets having a symbol and an associated metric, delivering an output message (S) possessing nm output doublets by computing a matrix of nm2 combined doublets on the basis of a combination of the doublets of the two input messages (U,V), and reducing the number of the combined doublets so as to obtain the nm output doublets of the output message (S) possessing the nm largest or lowest metrics. The method further includes tagging redundant symbols within each input message (U, V) and fixing same at a reference value, the value of the metric of each combined doublet resulting from a combination of at least one doublet comprising a tagged redundant symbol.

Abstract: A method for detecting a disturbance of the state of a synchronous flip-flop of master-slave type including two bistable circuits in series, in which the bistable circuits are triggered by two first signals different from each other, and the level of an intermediary junction point between the two bistable circuits is compared both to the level present at the input of the master-slave flip-flop and to the level present at the output, which results in two second signals providing an indication as to the presence of a possible disturbance.

Abstract: A method of forming dummy structures in accordance with the golden ratio to reduce dishing and erosion during a chemical mechanical polish. The method includes determining at least one unfilled portion of a die prior to a chemical mechanical planarization and filling the at least one unfilled portion with a plurality of dummy structures, a ratio of the dummy structures to a total area of the unfilled portion being in the range of 36 percent and 39 percent. A die formed in accordance with the method may include a plurality of metal levels and a plurality of regions at each metal level, each region having a plurality of dummy structures formed as golden rectangles.

Abstract: In an electrostatic micromotor, a mobile substrate faces a fixed substrate and is suspended over the fixed substrate at a given distance of separation in an operative resting condition; an actuation unit is configured so as to give rise to a relative movement of the mobile substrate with respect to the fixed substrate in a direction of movement during an operative condition of actuation. The actuation unit is also configured so as to bring the mobile substrate and the fixed substrate substantially into contact and to keep them in contact during the operative condition of actuation. The electrostatic micromotor is provided with an electronic unit for reducing friction, configured so as to reduce a friction generated by the contact between the rotor substrate and the stator substrate during the relative movement.

Abstract: A power device is formed by a thyristor and by a MOSFET transistor, series-connected between a first and a second current-conduction terminal. The power device moreover has a control terminal connected to an insulated-gate electrode of the MOSFET transistor and receiving a control voltage for turning on/off the device, and a third current-conduction terminal connected to the thyristor for fast extraction of charges during turning-off. Thereby, upon turning off, there are no current tails, and turning off is very fast. The power device does not have parasitic components and consequently has a very high reverse-bias safe-operating area.