Abstract: Methods for indicating the state of charge of the battery of a portable object, comprising a step for contactless transmission from a portable object to a telephone of the state of charge of the battery of the portable object, and a step for indication, via a human-machine interface of the telephone, of the state of charge of the battery of the portable object.

Abstract: A pump having: a cavity formed inside an insulating substrate, the upper part of the substrate being situated near the cavity having an edge; a conductive layer covering the inside of the cavity up to the edge and optionally covering the edge itself; a flexible membrane made of a conductive material placed above the cavity and resting against the edge; a dielectric layer covering the conductive layer or the membrane whereby insulating the portions of the conductive layer and of the membrane that are near one another; at least one aeration line formed in the insulating substrate that opens into the cavity via an opening in the conductive layer, and; terminals for applying a voltage between the conductive layer and the membrane.

Abstract: A method of forming a field effect transistor comprising a gate formed on an insulating layer, the gate having, in a zone in contact with the insulating layer, a semiconducting central zone and lateral zones in the length of the gate, the method comprising forming a gate comprising a portion of insulating layer, a portion of semiconducting layer formed over the insulating layer, and a portion of mask layer formed over the semiconducting layer; performing an etching of the portion of the mask layer such that only a portion in the center of the gate remains; and reacting the semiconducting gate with a metal deposited over the gate.

Abstract: A pixel structure includes two different photosensitive portions. One portion is shielded from incident light and the signals from both are fed into an op amp so that the differential signal is output as the pixel output, thereby cancelling dark current.

Abstract: The disclosure relates to an electrically erasable and programmable memory, comprising memory cells arranged in bit lines and word lines transverse to bit lines, wherein each memory cell may be in a programmed or erased state, the memory comprising memory cell selection circuits configured to memorize and read data bits in two memory cells belonging to different bit lines and different word lines, and to avoid a memory cell from being written or read by mistake in another state than a default state after a gate oxide breakdown of a transistor of the memory, and a read circuit to determine a data bit to be read in the memory according to the states of the two memory cells memorizing the data bit.

Abstract: An electronic system adapted to perform a corresponding function and including at least a first subsystem and a second subsystem, the first subsystem and the second subsystem being operatively couplable to each other through a plurality of electric connections to perform the function of the system, in which the first subsystem and the second subsystem are respectively integrated on a first material chip and on a second material chip, the plurality of electric connections including a plurality of conductive through holes formed in at least one of the first and second chips and adapted to form a corresponding plurality of inter-chip electric connections when the first and the second chips are superimposed.

Abstract: A first device transmits data over a first branch of a communications link toward a second device. That second device loops the received data pattern back over a second branch of the communications link. A bit error rate of the looped back data pattern is determined and a pre-emphasis applied to the transmitted data pattern is adjusted in response thereto. The first device further perturbs the data pattern communications signal so as to increase the bit error rate. The pre-emphasis is adjusted so as to reduce the determined bit error rate in the looped back data pattern in the presence of the perturbation. The steps for perturbing the signal and adjusting the pre-emphasis are iteratively performed, with the perturbation of the signal increasing with each iteration and adjustment of the pre-emphasis being refined with each iteration. The signal is perturbing by injecting modulation jitter into the signal (increasing each iteration) and adjusting amplitude of the signal (decreasing each iteration).

Abstract: A satellite orbit prediction method of a satellite navigation system includes storing satellite past ephemerides data associated with past time intervals and satellite recent ephemeris data associated with a recent time interval, and computing reference satellite positions based on the past and recent ephemerides data. The method also includes: computing estimated satellite positions by propagating on the past time intervals using a celestial mechanics force model and the recent ephemeris data, computing errors from the reference satellite positions and estimate satellite positions, and identifying a position error function by fitting a curve to the computed errors. The position error function is used to obtain corrected predicted satellite orbit portions.

Abstract: A method for fabricating electrical bonding pads on one face of a wafer includes the production of electrically conductive areas and electrical connection branches connecting these conductive areas. A layer of mask material is deposited and openings are produced in this mask layer which extend above said conductive areas and at least some of which extend at least partly beyond the peripheral edges of the underlying conductive areas. Blocks made of a solder material are produces in the openings by electrodeposition in a bath. The mask material is then removed along with the connection branches. The wafer is passed through or placed in an oven so as to shape, on the conductive areas, the blocks into substantially domed electrical bonding pads.

Abstract: A method for controlling an output amplification stage comprising first and second complementary SOI-type power MOS transistors, in series between first and second power supply rails, the method including the steps of: connecting the bulk of the first transistor to the first rail when the first transistor is maintained in an off state; connecting the bulk of the second transistor to the second rail when the second transistor is maintained in an off state; and connecting the bulk of each of the transistors to the common node of said transistors, during periods when this transistor switches from an off state to an on state.

Abstract: A low-dropout linear regulator includes an error amplifier which includes a cascaded arrangement of a differential amplifier and a gain stage. The gain stage includes a transistor driven by the differential amplifier to produce at a drive signal for an output stage of the regulator. The transistor is interposed over its source-drain line between a first resistive load included in a RC network creating a zero in the open loop gain of the regulator, and a second resistive load to produce a drive signal for the output stage of the regulator. The second resistive load is a non-linear compensation element to render current consumption linearly proportional to the load current to the regulator. The first resistive load is a non-linear element causing the frequency of said zero created by the RC network to decrease as the load current of the regulator decreases.

Abstract: A negative voltage level shifter circuit includes a pair of input transistors, a gate of each input transistor being driven by one of an input signal and an inverted version of the input signal, a cascode sub-circuit coupled to the pair of input transistors, and a pair of cross-coupled transistors for locking a state of the voltage level shifter depending on the input signal, wherein respective gates of the cross-coupled transistors are driven by outputs of respective comparator sub-circuits.

Abstract: An amplification circuit for driving an audio signal diffuser that includes a generation circuit of a first pre-charging signal, the generation circuit including an amplifier provided with an input terminal for receiving the first pre-charging signal and provided with an output terminal for providing a second pre-charging signal as a function of the first pre-charging signal, and a decoupling capacitor of the amplifier from the diffuser, the capacitor connected to the output terminal for charging by the second pre-charging signal.

Abstract: A method of controlling a moving part of a voice coil motor to move from an first position to a second position, wherein the position of the moving part is controlled by the level of an electrical signal applied to a coil of the voice coil motor, a first level of the electrical signal corresponding to the first position, and a second level of the electrical signal corresponding to the second position, the method including: at a first time, changing the electrical signal from the first level to an intermediate level, the intermediate level being chosen such that a peak overshoot of the moving part corresponds to the second position; and at a second time calculated to correspond to a delay of half an oscillation period of the moving part after the first time, changing the electrical signal to the second level.

Abstract: A method for estimating the white Gaussian noise level that corrupts a digital image by discriminating homogeneous blocks from blocks containing a textured area and skipping these last blocks when evaluating the noise standard deviation.

Abstract: A semiconductor integrated circuit for the processing of conditional access television signals that includes an input interface for receiving encrypted television signals and an output interface for output of decrypted television signals. The semiconductor integrated circuit is provided with some functionality restricted in some way by preventing one or more hardware circuit elements from operating, such as an MPEG decoder, display engine, IO ports or main CPU. To enable the functionality, a subscriber must pay for a service and then receives an encrypted message broadcast to the semiconductor integrated circuit that is decrypted and instructs functionality to be turned on or off.

Abstract: A copper-diffusion plug 21 is provided within a pore in dielectric layer over a copper signal line. By positioning the plug below a chalcogenide region, the plug is effective to block copper diffusion upwardly into the pore and into the chalcogenide region and thus to avoid adversely affecting the electrical characteristics of the chalcogenide region.

Abstract: A system renders a primitive of an image to be displayed, for instance in a mobile 3D graphic pipeline, the primitive including a set of pixels. The system locates the pixels in the area of the primitive, generates, for each pixel located in the area, a set of associated sub-pixels, borrows a set of sub-pixels from neighboring pixels, subjects the set of associated sub-pixels and the borrowed set of pixels to adaptive filtering to create an adaptively filtered set of sub-pixels, and further filters the adaptively filtered set of sub-pixels to compute a final pixel for display. Preferably, the set of associated sub-pixels fulfills at least one of the following: the set includes two associated sub-pixels and the set includes associated sub-pixels placed on pixel edges.

Abstract: A method for manufacturing a cell of a non-volatile electrically erasable and programmable memory including a dual-gate MOS transistor. The method includes the steps of providing a semiconductor substrate covered with an insulating layer including a thinned down portion and having a first surface common with the substrate and a second surface opposite to the first surface; and incorporating nitrogen at the level of the second surface, whereby the maximum nitrogen concentration is closer to the second surface than to the first surface.

Abstract: A device corrects the power factor in forced switching power supplies and includes a converter and a control device to obtain a regulated voltage on an output terminal. The control device comprises an error amplifier having an inverting terminal (Vout) and a non-inverting terminal receiving a reference voltage. The device includes first and second resistances coupled in series with a conduction element positioned between the first resistance and the inverting terminal of the error amplifier and a fault detector suitable for detecting the electrical connection of the conduction element with the output terminal and suitable for detecting an output signal of the second resistance. The fault detector is suitable for supplying a malfunction signal upon detecting an electric disconnection of the conduction element from the output terminal or when the output signal of the second resistance tends to zero.