Abstract: A device includes a force driver applying a force signal to a force node associated with a mutual capacitance between the force node and a sense node. A sensing circuit receives a sense signal from the sense node associated with the mutual capacitance between the force node and the sense node, and generates an output indicative of the sensed mutual capacitance. A control circuit controls the generation of the force signal to alternate between at least two different frequencies by generating consecutive pulses, with a given pulse of the consecutive pulses at a first of the at least two different frequencies. In a first operating state, a next pulse immediately succeeding the given pulse is at a second of the at least two different frequencies, and in a second operating state the next pulse immediately succeeding the given pulse is at the first of the at least two different frequencies.

Abstract: A method of testing an integrated circuit die (IC) for cracks includes performing an assembly process on a wafer including multiple ICs including: lowering a tip of a first manipulator arm to contact and pick up a given IC, flipping the given IC such that a surface of the IC facing the wafer faces a different direction, and transferring the IC to a tip of a second manipulator arm, applying pressure from the second manipulator arm to the given IC such that pogo pins extending from the tip of the first manipulator arm make electrical contact with conductive areas of the IC for connection to a crack detector on the IC, and performing a conductivity test on the crack detector using the pogo pins. If the conductivity test indicates a lack of presence of a crack, then the second manipulator arm is used to continue processing of the given IC.

Abstract: An embodiment method of command of an electronic device comprises controlling a screen to alternate periodically between a first phase in which the screen emits light and a second phase in which no light is emitted by the screen, and precharging a charge pump of an ambient light sensor during the first phases, the ambient light sensor comprising at least a single photon avalanche diode powered by the charge pump.

Abstract: An embodiment provides a circuit including a transformer having a primary winding coupled to an input port configured to receive an input voltage and a secondary winding configured to provide an output voltage at an output port, controller circuitry configured to switch on and off a current through the primary winding so that energy is transferred to the secondary winding while switching and supply circuitry connected to the controller circuitry, wherein the supply circuitry is coupled to an auxiliary winding of the transformer and configured to provide a supply voltage for the controller circuitry.

Abstract: A support substrate includes an insulating core layer, an electrically conductive layer over the insulating core layer and a solder mask layer over the electrically conductive layer. A back side of an integrated circuit chip is mounted to an upper surface of the support substrate at a die attach location. The upper surface of the support substrate includes a cavity located within the die attach location, where the cavity extends under the back side of the integrated circuit chip. The cavity is defined by an area where the solder mask layer and at least a portion of the electrically conductive layer have been removed. Bonding wires connect connection pads on a front side of the integrated circuit chip to connection pad on the upper surface of the support substrate.

Abstract: An integrated circuit includes an N-type laterally diffused metal-oxide semiconductor (NLDMOS) transistor including an active semiconductor substrate region having P-type conductivity. The integrated circuit further includes a buried semiconductor region having N+-type conductivity underneath the active substrate region. The buried semiconductor region is more heavily doped than the active semiconductor substrate region.

Abstract: A semiconductor device includes a pre-molded leadframe mounting substrate. The substrate includes a die pad (configured to have a semiconductor die mounted thereon) and a first electrically conductive pad and a second electrically conductive pad. A strip of insulating material is molded between the first and second electrically conductive pads to provide a mutually electrically insulation and extends in a longitudinal direction with the first electrically conductive pad and the second electrically conductive pad lying on opposite sides of the strip of insulating material. A semiconductor die is arranged on the die pad in register with the strip of insulating material. A single electrically conductive ribbon extending in register with the strip of insulating material electrically couples the semiconductor die with both the first and second electrically conductive pads to provide a common current flow path from the semiconductor die towards the first and the second electrically conductive pads.

Abstract: A road condition detection device, to be coupled to the wheel of a vehicle, is provided with: an electrostatic charge variation sensor, to provide a charge variation signal indicative of an electrostatic charge variation associated with the rotation of the wheel; and a processing unit, coupled to the electrostatic charge variation sensor to receive the charge variation signal and furthermore for receiving a rotation speed signal indicative of the rotation speed of the wheel. In particular, the processing unit jointly processes the rotation speed signal and the charge variation signal to detect a road condition of a wet road condition and a dry road condition.

Abstract: A memory array includes memory cells forming a data word location accessed in response to a word line signal. A data sensing circuit configured to sense data on bit lines associated with the memory cells. The sensed data corresponds to a current data word stored at the data word location. A data latching circuit latches the sensed data for the current data word from the data sensing circuit. A data modification circuit then performs a mathematical modify operation on the current data word to generate a modified data word. The modified data word is then applied by a data writing circuit to the bit lines for writing back to the memory cells of the memory array at the data word location. The operations are advantageously performed within a single clock cycle.

Abstract: A device for monitoring the health state is made in a chip including a semiconductor die integrating an electric potential sensor and a cardiac parameter determination unit. The potential sensor is configured to detect potential variations on the body of a living being and associated with a heart rhythm and to generate a cardiac signal. The cardiac parameter determination unit is configured to receive the cardiac signal and determine cardiac parameters indicative of a health state. In particular, the cardiac parameter determination unit is configured to detect triggering events and to determine features of the cardiac signal in time windows defined by the triggering events. The die also integrates a decision unit, configured to receive the cardiac parameters and generate a health signal based on a comparison with threshold values. The cardiac parameters include heart rate and QRS-complex.

Abstract: A photosensitive sensor is capable of operating in a global shutter mode and in a rolling shutter mode. The sensor includes at least one pixel with a photosensitive region configured to photogenerate charges. A first transfer gate is configured to transfer photogenerated charges from the photosensitive region to a transfer node. A source-follower transistor is configured to transmit a reading signal to a read node, in the global shutter mode, in a manner controlled by a potential of the photogenerated charges on the transfer node. A second transfer gate is configured to transfer the photogenerated charges from the photosensitive region to the read node in the rolling shutter mode.

Abstract: A memory circuit includes an array of memory cells arranged with first word lines connected to a first sub-array storing less significant bits of data and second word lines connected to a second sub-array storing more significant bits of data. A row decoder circuit coupled to the first and second word lines generates word line signals. A word line gating circuit is configured to selectively gate passage of the word line signals to the second word lines for the second sub-array in response to assertion of a maximum value signal. A data modification circuit performs a mathematical operation on data read from the array of memory cells, and asserts the maximum value signal if the mathematical operation performed on the less significant bits of data from the first sub-array produces a maximum data value.

Abstract: An image sensor includes a pixel with a photosensitive region accommodated within a semiconductor substrate and a MOS capacitive element with a conducting electrode electrically isolated by a dielectric layer. The dielectric layer forms an interface with both the photosensitive region and the semiconductor substrate, the interface of the dielectric layer including charge traps. A control circuit biases the electrode of the MOS capacitive element with a charge pumping signal designed to generate an alternation of successive inversion regimes and accumulation regimes in the photosensitive region. The charge pumping signal produces recombinations of photogenerated charges in the charge traps of the interface of the dielectric layer and the generation of a substrate current to empty recombined photogenerated charges.

Abstract: The present disclosure relates to a photodiode comprising a first part made of silicon and a second part made of doped germanium lying on and in contact with the first part, the first part comprising a stack of a first area and of a second area forming a p-n junction and the doping level of the germanium increasing as the distance from the p-n junction increases.

Abstract: An electronic circuit includes a first electronic component formed above a buried insulating layer of a substrate and a second electronic component formed under the buried insulating layer. The insulating layer is thoroughly crossed by a semiconductor well. The semiconductor well electrically couples a terminal of the first electronic component to a terminal of the second electronic component.

Abstract: A tamper resistant device can be used for an integrated circuit card. The device includes memory storing a first security domain that includes a telecommunication profile and a second security domain that includes an application profile. A first physical interface is configured to be coupled to a baseband processor configured to operate with a mobile telecommunications network. A second physical interface configured to be coupled to an application processor. The first physical interface configured to allow the baseband processor to access the telecommunication profile and the second physical interface is configured to allow the application processor to access the application profile. The tamper resistant device is configured to enable accessibility to the application profile if corresponding commands are received at the first interface and to enable accessibility to the telecommunication profile if corresponding commands are received at the second interface.

Abstract: A diode is formed by a polycrystalline silicon bar which includes a first doped region with a first conductivity type, a second doped region with a second conductivity type and an intrinsic region between the first and second doped regions. A conductive layer extends parallel to the polycrystalline silicon bar and separated from the polycrystalline silicon bar by a dielectric layer. The conductive layer is configured to be biased by a bias voltage.

Abstract: A method of wirelessly transmitting power includes: causing a power transmission circuit to transmit, to a master power reception circuit, a portion of power it is capable of transmitting; adjusting operation of a slave power reception unit until a first rectified voltage produced by the master power reception circuit and a second rectified voltage produced by the slave power reception unit are equal; causing the power transmission circuit to transmit additional power to the slave power reception unit, resulting in the first and second rectified voltages being unequal; and adjusting operation of the slave power reception unit until the first and second rectified voltages are again equal. A dummy load is connected to the slave power reception unit prior to causing the power transmission circuit to transmit the additional power, and is disconnected once the first and second rectified voltages are equal.

Abstract: A first circuit structure of an electronic IC device includes comprises light-sensitive optical circuit components. A second circuit structure of the electronic IC device includes an electronic circuit component and an electrically-conductive layer extending between and at a distance from the optical circuit components and the electronic circuit component. Electrical connections link the optical circuit components and the electronic circuit component. These electrical connections are formed in holes which pass through dielectric layers and the intermediate conductive layer. Electrical insulation rings between the electrical connections and the conductive layer are provided which surround the electrical connections and have a thickness equal to a thickness of the conductive layer.

Abstract: The present disclosure relates to a communication method by I2C bus between a emitting device and a receiving device, in which: a rising edge of a clock signal of the I2C bus, directly following a start condition of an I2C communication, is recorded; and when an interruption is generated within the receiving device, the receiving device verifies whether the rising edge was recorded.