Patents Assigned to Sun Microsystems
  • Patent number: 7204701
    Abstract: A bolster plate apparatus, used to secure a semiconductor device intermediate a printed circuit board and a heat sink apparatus, includes either an indentation or an open aperture into which a radio frequency absorptive material may be disposed. The absorptive material may be a ferrite material specifically selected to absorb frequencies in the range of the second to fourth harmonic of the processor clock signal frequency. The type of the ferrite material implanted in the bolster plate is selected to maximize the absorption of radio frequency energy, particularly that emitted at the pad vias on the underside of the printed circuit board, without affecting the signal integrity of the other pad connections. The shape of the cutout or aperture is also defined by the arrangement of RF emitting pads on the underside of the printed circuit board.
    Type: Grant
    Filed: March 8, 2004
    Date of Patent: April 17, 2007
    Assignee: Sun Microsystems, Inc.
    Inventors: Wigneswaran W. Balasingham, Istvan Novak, Robert S. Moffett, Daniel D. Gonsalves
  • Patent number: 7207044
    Abstract: Methods, systems, and articles of manufacture consistent with the present invention provide for exchanging messages directly between a client and a selected server regardless of the use of a load balancer. The client generates a message to bypass performing load balancing functionality at the load balancer, and sends the message to the load balancer. The load balancing functionality is bypassed and the message is sent directly to the selected server by the load balancer.
    Type: Grant
    Filed: November 21, 2002
    Date of Patent: April 17, 2007
    Assignee: Sun Microsystems, Inc.
    Inventors: Thorsten O. Laux, Dennis Chernolvanov, Thomas Pfohe
  • Patent number: 7203753
    Abstract: System and method for representing and rate the trustworthiness of peers as providers of content and data (codats) relevant to the peers' interests. In one embodiment, trust may be propagated through transaction pipes (paths) along which codats located in a search for codats relevant to an area of interest may be accessed by the requestor. In some embodiments, the trust a peer has in another peer as a provider of codats may be a function of the trust values of the provider peer and all other peers on a path. If there are multiple paths, trust in the provider peer may be an average of the trust values for all the paths. Trust in a provider peer may be used to determine confidence in codats provided by the peer. Embodiments may provide mechanisms for feeding back trust information to the providing peer and for propagating trust information to other peers.
    Type: Grant
    Filed: June 7, 2002
    Date of Patent: April 10, 2007
    Assignee: Sun Microsystems, Inc.
    Inventors: William J. Yeager, Rita Y. Chen
  • Patent number: 7203928
    Abstract: A method for maintaining standardized test results is provided. The method includes executing a test suite that includes embedded reporter codes and generating uniform test results using the embedded reporter codes. The embedded reporter codes are configured to include data as to anticipated test results and rationale supporting the anticipated test results. The method also includes storing the uniform test results so as to allow viewing of the uniform test results.
    Type: Grant
    Filed: December 31, 2002
    Date of Patent: April 10, 2007
    Assignee: Sun Microsystems, Inc.
    Inventors: Ramesh Babu Mandava, Jean-Francois Arcand
  • Patent number: 7203082
    Abstract: Dual match line circuits having race condition improvements. A dual match line circuit may include precharge logic configured to precharge each of a hit match line, a miss match line and an evaluate node to an asserted state, where a coupling device couples the hit and miss match lines to the evaluate node. The miss match line may discharge through a number of load devices that may be activated by respective miss signals. A positive feedback circuit coupled to the miss match line may accelerate its discharge. The hit match line may be additionally coupled to discharge through a discharge path. The hit and miss match lines may be electrically isolated from one another, such that when any of the respective miss signals is asserted, current from the hit match line does not discharge through the miss match line.
    Type: Grant
    Filed: May 31, 2005
    Date of Patent: April 10, 2007
    Assignee: Sun Microsystems, Inc.
    Inventors: Ajay Bhatia, Sanjay M. Wanzakhade, Shashank Shastry
  • Patent number: 7203774
    Abstract: A kernel device file system publication system for dynamically enumerating and configuring an instance of a device in the kernel device tree upon request by a user level application. The kernel device file system logically arranges system level devices in a hierarchical tree-like topology defining devices as nodes of a device tree to allow for a top-down access. The top-down access allows devices connecting to the computer system to be configured based on the physical path of the device. This process starts at a bus nexus and drives device configuration down the device tree. The bus configuration interfaces permit each nexus in the device tree hierarchy to participate in the device lookup and readdirs operations performed by the device file system. The device file system path operations are performed as an iterative sequence of bus configure operations, whereby each nexus controls the enumeration and configuration of that nexus' children.
    Type: Grant
    Filed: May 29, 2003
    Date of Patent: April 10, 2007
    Assignee: Sun Microsystems, Inc.
    Inventors: Shudong Zhou, John Danielson, Jerry A. Gilliam, David A. Butterfield
  • Patent number: 7203613
    Abstract: An analog debugging block of an integrated circuit includes a multiplexor, a buffer, and a voltage-controlled oscillator. An analog voltage signal-of-interest is selectively passed through the multiplexor to the buffer. The buffer outputs an analog control voltage dependent on the selected analog voltage signal-of-interest. The analog control voltage serves as an input to the voltage-controlled oscillator and is used to control a frequency of a digital output signal generated from the voltage-controlled oscillator. The digital output signal from the voltage-controlled oscillator is driven off-chip, whereupon a frequency of the digital output signal is determined and compared against a collection of known frequencies that correspond to particular known voltages of the analog voltage signal-of-interest, thereby resulting in a determination of the value of the selected analog voltage signal-of-interest.
    Type: Grant
    Filed: April 23, 2004
    Date of Patent: April 10, 2007
    Assignee: Sun Microsystems, Inc.
    Inventors: Gin S. Yee, Claude R. Gauthier
  • Patent number: 7203878
    Abstract: A computer system may include several integrated circuits and a routing circuit configured to route several data streams between the integrated circuits. The routing circuit includes several input ports, several output ports, and a signature analysis register coupled to one of the output ports. The signature analysis register is configured to collect data conveyed via the output port dependent upon whether the signature analysis register receives a tag identifying one of the plurality of data streams.
    Type: Grant
    Filed: July 19, 2002
    Date of Patent: April 10, 2007
    Assignee: Sun Microsystems, Inc.
    Inventors: Nathaniel David Naegle, David W. Gibbs
  • Patent number: 7203821
    Abstract: A method and apparatus for handling window management instructions without post serialization in an out-of-order multi-issue processor includes an instruction decode unit arranged to decode the window management instruction. A plurality of register windows are indexed by a current window pointer, and a working copy of the current window pointer is stored in a register in the instruction decode unit. The instruction decode unit uses the working copy of the current window pointer to handle the window management instruction.
    Type: Grant
    Filed: January 8, 2003
    Date of Patent: April 10, 2007
    Assignee: Sun Microsystems, Inc.
    Inventor: Chandra M. R. Thimmannagari
  • Patent number: 7203945
    Abstract: A method of processing data in a system including an utility, includes the steps of starting a session, selecting a file on a local drive or by URL, wherein the file includes a name of a business object, uploading the file including the name of a business object to a server, storing data of the file in a database of the utility, performing asynchronous data processing, and downloading and saving a report after the data processing is completed.
    Type: Grant
    Filed: August 16, 2001
    Date of Patent: April 10, 2007
    Assignee: Sun Microsystems, Inc.
    Inventors: Alexandre Kravtchenko, Leonid Khodulev, Andrei Skaldin
  • Patent number: 7203820
    Abstract: In a set of registers, each individually addressable by register operations using a corresponding register identification, at least one register of the set of registers is an extended register having multiple storage locations. Values stored in the multiple storage locations are accessed, for example, according to the order in which they have been stored. Less than all of the multiple storage locations are accessible by a register operation at a given time. Older versions of software that do not recognize extended registers identify the extended register as having only one storage location. An extended register can be, for example, a stack register, a queue register, or a mixed register and values stored in the multiple storage locations are read and stored according to the characteristics of the register.
    Type: Grant
    Filed: June 28, 2002
    Date of Patent: April 10, 2007
    Assignee: Sun Microsystems, Inc.
    Inventor: Peter C. Damron
  • Patent number: 7203881
    Abstract: One embodiment of the invention provides a method for simulating the operation of a system. The method includes providing a fault tree representation of the system. The fault tree defines a set of problems that may occur in the system, and specifies propagations in the system whereby a problem may create one or more errors that may in turn be detected by error detectors to produce corresponding error reports. The fault tree representation allows the presence of a problem in the system to be simulated, and the set of error reports resulting from the simulated problem to be determined. This simulation can be repeated for different problems to compare the sets of error reports potentially produced by the different problems.
    Type: Grant
    Filed: June 29, 2004
    Date of Patent: April 10, 2007
    Assignee: Sun Microsystems, Inc.
    Inventors: Emrys Williams, Andrew Rudoff
  • Patent number: 7200830
    Abstract: One embodiment of the present invention provides a system that facilitates capacitive inter-chip communication. During operation, the system first determines an alignment between a first semiconductor die and a second semiconductor die. Next, electrical signals are selectively routed to at least one interconnect pad in a plurality of interconnect pads based on the alignment thereby facilitating communication between the first semiconductor die and the second semiconductor die. The plurality of interconnect pads can include transmitting pads, receiving pads, and transmitting and receiving pads. The alignment may be determined continuously or at times separated by an interval, where the interval is fixed or variable. Several variations on this embodiment are provided.
    Type: Grant
    Filed: June 28, 2004
    Date of Patent: April 3, 2007
    Assignee: Sun Microsystems, Inc.
    Inventors: Robert J. Drost, Ivan E. Sutherland, Ronald Ho
  • Patent number: 7200527
    Abstract: A test apparatus including a data interface configured to couple with at least one of a test device and a baseline device, and a computing device configured to perform a method including performing a first benchmark on a baseline device for a predetermined time interval, resulting in a first dataset representing work performed by the baseline devices, performing a second benchmark on a test device for the predetermined time interval resulting in a second dataset representing work performed by the test device, and using a heuristic including a number of tests to determine whether the test device has an acceptable level of performance relative to the baseline device.
    Type: Grant
    Filed: September 6, 2005
    Date of Patent: April 3, 2007
    Assignee: Sun Microsystems, Inc.
    Inventors: Eran Davidov, Michael J. Parks, Jamie D. Riggs, David C. Gurchinoff, Terrence Barr
  • Patent number: 7200636
    Abstract: One embodiment of the present invention provides a system that applies personalized rules for handling e-mail messages to e-mail messages within an e-mail server. During operation, the system connects to the e-mail server from a remote computer system on behalf of a user. Next, the system applies the personalized rules to e-mail messages received for the user at the e-mail server. This involves applying actions specified in the personalized rules to the e-mail messages. Next, the system disconnects from the e-mail server so that the connection does not have to be maintained.
    Type: Grant
    Filed: November 1, 2002
    Date of Patent: April 3, 2007
    Assignee: Sun Microsystems, Inc.
    Inventor: Michael A. Harding
  • Patent number: 7200646
    Abstract: A fabric driver on a host system connected to a fabric may include an API for an administration application to query and obtain a list of devices connected to a fabric host adapter port(s). The fabric driver may execute this query and obtain the list of devices by querying a fabric name server. One or more direct attach devices may also be discovered. For direct attach devices, like private loop topologies, operating system device nodes may be created during driver attach. However, for fabric topologies the fabric driver provides a list of devices visible through the fabric host adapter port by querying the fabric name server and supplies this list to the administration application in response to the administration application's request. A user may then select devices from this list to be onlined. A dynamic persistent repository may be maintained of devices onlined using this on-demand node creation process.
    Type: Grant
    Filed: April 25, 2001
    Date of Patent: April 3, 2007
    Assignee: Sun Microsystems, Inc.
    Inventors: Sunil Shanthaveeraiah, Aseem Rastogi, Raghavendra Rao
  • Patent number: 7200525
    Abstract: A method and system are provided for generating a data structure representative of a fault tree for a system. One embodiment of the method includes providing one or more input files comprising a source code description of the fault tree. The source code description has a plurality of statements specifying events and propagations in the fault tree, where a propagation represents a cause and effect linkage between events. The method further includes compiling the input files in source code into the data structure.
    Type: Grant
    Filed: June 29, 2004
    Date of Patent: April 3, 2007
    Assignee: Sun Microsystems, Inc.
    Inventors: Emrys Williams, Andrew Rudoff
  • Patent number: 7200842
    Abstract: A resource-constrained device such as a smart card or the like includes memory for storing an application software program comprising an object-oriented, verifiable, platform-independent, type-safe and pointer-safe sequence of instructions. The device can also include a virtual machine implemented on a microprocessor where the virtual machine is capable of executing the sequence of instructions. Each instruction includes an operation code, and each data manipulation instruction is specific to a particular data type. The application program can be stored on a computer-readable medium prior to being received by the resource-constrained device. Methods of using such an application program, including accessing the program over the Internet and downloading it to a smart card, also are disclosed.
    Type: Grant
    Filed: February 2, 1999
    Date of Patent: April 3, 2007
    Assignee: Sun Microsystems, Inc.
    Inventors: Joshua B. Susser, Judith E. Schwabe
  • Patent number: 7200019
    Abstract: A dual match line circuit may include precharge logic configured to precharge each of a hit match line, a miss match line and an evaluate node to an asserted state, where a coupling device couples the hit and miss match lines to the evaluate node. The miss match line may discharge through a number of load devices that may be activated by respective miss signals. The hit match line may be additionally coupled to discharge through a pair of devices connected in series, one of which may be activated by a hit signal, and the other of which may be activated by the miss match line. The hit and miss match lines may be electrically isolated from one another, such that when any of the respective miss signals is asserted, current from the hit match line does not discharge through the miss match line.
    Type: Grant
    Filed: May 31, 2005
    Date of Patent: April 3, 2007
    Assignee: Sun Microsystems, Inc.
    Inventors: Ajay Bhatia, Sanjay M. Wanzakhade, Shashank Shastry
  • Patent number: 7199806
    Abstract: A graphical computing system comprising a control unit and a set of edge processing units. The control unit (a) receives a surface primitive, (b) transfers edge specifying information for each edge of the surface primitive to a corresponding one of the edge processing units, and (c) transfers a horizontal address CX and a vertical address CY of a current pixel to the edge processing units. Each of the edge processing units computes trimming information for the current pixel with respect to the corresponding edge using the horizontal address CX and vertical address CY. The trimming information specifies a portion of the corresponding edge which intersects the current pixel. The control unit collects the trimming information from the edge processing units and transmits an output packet including the addresses CX and CY of the current pixel along with the collected trimming information.
    Type: Grant
    Filed: March 19, 2003
    Date of Patent: April 3, 2007
    Assignee: Sun Microsystems, Inc.
    Inventor: Michael F. Deering