Abstract: A method for correlating a video stream at a first speed and an animation sequence at a second speed that includes decoding the video stream to obtain a video frame, rendering the animation sequence to obtain an animation frame, wherein the first speed and the second speed are not equal, and correlating the animation frame with the video frame to obtain a correlated animation frame according to a frame index of the animation frame and a frame index of the video frame.

Abstract: Embodiments of the present invention provide methods and systems for data movement in data storage systems. For one embodiment, a physical data storage parcel containing a first type of data requiring a first type of processing and a second type of data requiring a second type of processing is created. The first type of data is transferred to a first memory address space via a direct memory access operation and the second type of data is transferred to a second memory address space via the direct memory access operation. For one embodiment, the first type of data and the second type of data are copied to physically distinct data storage mediums. In an alternative embodiment, the first type of data and the second type of data are copied to distinct data storage structures of the same device. Thus, the bulk memory access operations are performed via hardware, thereby reducing performance impact.

Abstract: A Very Long Instruction Word (VLIW) processor having a plurality of functional units includes a multi-ported register file that is divided into a plurality of separate register file segments, each of the register file segments being associated to one of the plurality of functional units. The register file segments are partitioned into local registers and global registers. The global registers are read and written by all functional units. The local registers are read and written only by a functional unit associated with a particular register file segment. The local registers and global registers are addressed using register addresses in an address space that is separately defined for a register file segment/functional unit pair. The global registers are addressed within a selected global register range using the same register addresses for the plurality of register file segment/functional unit pairs.

Abstract: A method for executing a process by a processing resource is provided. The method includes enabling the processing resource and advertising an availability of the processing resource to execute a job. Also included is receiving a request to execute the job on the processing resource. The method further includes launching a process service to execute the job, executing the job, and completing the execution of the job.

Abstract: A method and system for delivering electrical energy from multiple power supplies to multiple loads. Each power supply can have multiple independent outputs. Each load is coupled in a matrix pattern to at least one output from each of the different power supplies. This wiring system provides redundancy in that if one output or one power supply fails, an output from another power supply can still provide power to the loads. The number of over-current protection devices needed with the matrix wiring system is reduced compared to traditional wiring methods. Also, the level of safety is greater under the matrix approach rather than the traditional approach. The matrix wiring system also aids in pinpointing faulty components. Finally, the matrix wiring approach allows a gradual degradation of the power distribution system when failures of the loads or the power supply outputs occur.

Abstract: The present invention permits error detection to be performed on a word basis (e.g., 32 bits in parallel). An exclusive OR function is performed on each bit of data and cyclic redundancy code (CRC) bit in parallel. If a feedback value (e.g., a standard poly divider) is a logical one it is also included in the exclusive OR function. The present invention is readily adaptable for use with a variety of CRC polynomials (e.g., any Galois Finited Field Equation with primitive irreducible polynomials over GF(2) with linearly independent roots and the reciprocal polynomial with linearly independent roots. In one embodiment, each data word is effectively multiplied by alpha to the first power, where alpha is a root solution to the applicable polynomial utilized to calculate the CRC. In one exemplary implementation of the present invention, the instructions are in assembly language configured with a machine instruction shift through carry.

Abstract: A system and method for intelligent generational garbage collection using a dynamic window. During normal memory allocation, a sliding window defines a young generation within an older generation or other area of memory. When data are stored that will become garbage within a finite period of time, a temporary phase of operation is initiated. In the temporary allocation phase, the lower bound of the window is fixed, while the upper bound is allowed to expand to accommodate new objects. When the data become garbage, the window is garbage collected and compacted, and normal memory allocation and garbage collection operations resume. Thus, the window is dynamic in both movement and size. When the temporary allocation phase is initiated, the young generation may be garbage collected and compacted, and the lower window bound may be fixed at the location (e.g., address) where the allocation point was when the target data were stored.

Abstract: One embodiment of the present invention provides a system that facilitates deferring execution of instructions with unresolved data dependencies as they are issued for execution in program order. During a normal execution mode, the system issues instructions for execution in program order. Upon encountering an unresolved data dependency during execution of an instruction, the system generates a checkpoint that can subsequently be used to return execution of the program to the point of the instruction. Next, the system executes subsequent instructions in an execute-ahead mode, wherein instructions that cannot be executed because of an unresolved data dependency are deferred, and wherein other non-deferred instructions are executed in program order.

Abstract: Disclosed are novel methods and apparatus for providing inter-SCO navigation, for example, in SCORM-based courseware. In an embodiment, a method of navigating a course is disclosed.

Abstract: One embodiment of the present invention provides a circuit which blocks a keeper from interfering with a dynamic node during an evaluation phase for a dynamic wide-NOR structure. The circuit contains a precharge device which is coupled to the dynamic node. The precharge device precharges the dynamic node during a precharge phase. The circuit also contains a plurality of parallel pull-down transistors which are coupled to the dynamic node. The pull-down transistors conditionally discharge the dynamic node during the evaluate phase. The keeper sustains a precharged value on the dynamic node, thereby preventing a false evaluation caused by a leakage current through the parallel pull-down transistors. In addition, the circuit contains a feedback gating device which is coupled between the keeper and the dynamic node. During the evaluation phase, the feedback gating device blocks the keeper, so that the parallel pull-down transistors can discharge the dynamic node without interference from the keeper.

Abstract: A method and apparatus for enlarging data eyes in a wireline communication system involves pre-coding a data signal before transmission to generate a constant frequency characteristic independent of a state of the pre-coded data signal. The receiving circuit includes a circuit that temporally expands at least a portion of the pre-coded data signal. The portion of the temporally expanded data signal is latched by the receiving circuit.

Abstract: A method for dynamic allocation of computing tasks includes requesting a computing task by a client; receiving the computing task by a first distributor server set; redirecting the computing task to a second distributor server set, the second distributor server set including a first server; and allocating the computing task from the first server to a second server that executes the computing task, where the allocation is based on matching an attribute of the second server to an attribute of the computing task.

Abstract: A CPU clock signal generated from a phase lock loop (PLL) circuit and a feedback signal of the PLL circuit are used in generating a JBUS clock signal. The CPU clock signal and the feedback signal include the same amount of static phase offset introduced by the PLL circuit. The CPU clock signal and the feedback signal are input to an alignment detection circuit and used in generating the JBUS clock signal. In one embodiment, the JBUS clock signal is generated in synchronization with the CPU clock signal and having the frequency of the feedback signal. The present invention reduces or eliminates misalignment of the leading edge of the JBUS signal with reference to a specific leading edge of the CPU clock signal due to the presence of static phase offset introduced by the PLL circuit.

Abstract: One embodiment of the present invention provides a system that performs event notification in a distributed computing system. During operation, the system receives an event that was generated at a node in the distributed computing system, wherein the event includes a set of name/value pairs associated with the event. Next, the system compares the event against a set of client event registrations to determine a set of clients to be notified of the event, wherein each client event registration identifies a client and a target set of name/value pairs, wherein the client is to be notified of the event if the target set of name/value pairs matches a subset of the set of name/value pairs associated with the event. Finally, the system sends a notification of the event to the set of clients to be notified of the event.

Abstract: Provided are a computer implemented method, system, and program for enabling access to information from a device. A device program is generated to access device property information from the device. Each device property indicates a state of the device and the device program includes device specific commands to query the device for information on the device properties and device independent statements common to device programs for other devices to buffer the queried property information to return to requesting clients. The device program is stored in a computer readable medium.

Abstract: A digital delay-locked loop has been discovered having a reduced area as compared to typical register-controlled delay-locked loops (RDLLs) used to control strobe delay lines that provide delay to strobe signals driving asynchronous FIFOs. This result is achieved by reducing ratio computation (i.e. gear logic) circuitry of the RDLL. A master delay line receives a control code to delay a reference clock by one clock period. A slave delay line receives the control code to delay a strobe signal by a predetermined fraction of the clock period. The master delay line may include individual sections responsive to the control code which effectively delay a signal by a portion of the clock period, the delay having a fixed relationship to a delay associated with individual sections of the slave delay line.

Abstract: Methods and systems for data storage are described herein. In one aspect of the invention, an exemplary process includes receiving a first data being directed to a first storage volume, receiving a second data being directed to a second storage volume, writing the first data, as part of a first I/O (input/output) process which begins before a selected time, to a first storage image and a second storage image, the first storage image and the second storage image forming a data mirror prior to the selected time, wherein writes to one image are replicated to the other image, and writing the second data, as part of a second I/O process which begins after the selected time, to the second storage image but not to the first storage image, the second I/O process being capable of running while the first process runs. Other methods and apparatuses are also described.

Abstract: A system and method for stationary semantic zooming. Stationary semantic zooming allows selected non-spatial rendering attributes, such as level of detail, to be varied according to other specified non-spatial rendering attributes. Stationary semantic zooming allows low importance objects to be rendered with a lower level of detail than higher importance objects. A system and method for displaying network status and realty information using stationary semantic zooming are also disclosed.

Abstract: One embodiment of the present invention provides a system that facilitates automated software installation on a remote computer over the Internet. The system operates by first initializing the remote computer with a custom operating system, which allows access to the remote computer over the Internet. Next, the system provides an archive locator to the remote computer, wherein the archive locator is a uniform resource locator (URL) or a proprietary resource locator. The system then requests an archive from the site specified by the archive locator. This archive includes an operating system and desired software packages pre-configured for the remote computer. The system downloads this archive to the remote computer and re-initializes the remote computer with the operating system and software packages in the archive.

Abstract: Web services interface policy constraints may be specified in a policy constraints language and policy processing, such as generating an intersection policy of two policies may be automated by a policy-processing engine. A policy constraint may be a specification of a value, range of values, or set of values that a particular requirement or offering is allowed to have. Hierarchies of requirements and/or offerings may also be expressed and matched such that a more specific case of a requirement or offering may be matched against a more general case of the same requirement or offering. Also, preferences among vocabulary items, vocabulary item values, policy constraints, and other elements of a policy may be specified and automatically determined by a policy-processing engine. Automated matching of consumer requirements against provider offerings may allow a policy-processing engine to process policies with specifications of requirements or offerings from any domain-specific schema.