Abstract: A filtering engine may read samples from a sample buffer and spatially filter (e.g., convolve) the samples to generate pixels. The pixels may have a high dynamic range of luminance. Thus, the filtering engine may apply automatic gain control and/or dynamic range compression on pixel luminance or pixel color. A rendering engine may generate the samples in response to received graphics data and store the samples in the sample buffer. A sample may include one or more data fields which represent color (or intensity) information. The data field may include exponent information (e.g., an amplification control bit) and a mantissa. The exponent information may determine an extent to which the mantissa is amplified (e.g., left shifted) in the filtering engine.

Abstract: A graphics system comprises a graphics processor, a sample buffer, and a sample-to-pixel calculation unit. The graphics processor generates samples in response to received stream of graphics data. The sample buffer may be configured to store the samples. The sample-to-pixel calculation unit is programmable to generate a plurality of output pixels by filtering the rendered samples using a filter. A filter having negative lobes may be used. The graphics system computes a negativity value for a first frame. The negativity value measures an amount of pixel negativity in the first frame. In response to the negativity value being above a certain threshold, the graphics systems adjusts the filter function and/or filter support in order to reduce the negativity value for subsequent frames.

Abstract: A digital delay locked loop uses a delay array to delay an input signal by an amount indicated by a delay code. A phase of the resulting delayed signal is compared to a corresponding phase of the input signal, and dependent on the comparison, the delay code is updated to indicate whether the delay array needs to provide more delay or less delay. The digital delay locked loop also uses a detection circuit that monitors for a predetermined condition of the delay code. In response to detection of the predetermined condition, the delay code is automatically reset to a value different than a value of the delay code present at a previous reset or initial startup of the digital delay locked loop.

Abstract: In one of the many embodiments of the present inventions, a system is provided which includes at least one server to execute at least one session where the at least one session includes data associated with a user. The system also includes at least one stateless client coupled to the at least one server where the at least one stateless client obtains the at least one session from the at least one server.

Abstract: A tool for automatically generating a reduced size circuit model including inductive interaction properties is provided. Such inclusion of inductive properties in the reduced size circuit model allows for a more complete and accurate circuit model than those created by conventional methods. Further, a technique for automatically generating a reduced size circuit model including inductive properties that uses less memory space and operates faster than conventional methods is provided.

Abstract: Prediction of a clock skew for an incomplete integrated circuit design, includes (a) selecting a first metal layer having at least one clock design figure, (b) placing, for a minimum clock skew prediction, clock source locations on the clock design figure in accordance with a first predetermined minimum distance between adjacent clock source locations, (c) placing, for a maximum clock skew prediction, a clock source location on a largest clock design figure in the first layer, such that the clock source location has a largest distance from a via to a lower layer, and (d) placing, for an intermediate clock skew prediction, clock source locations on intersections between the clock design figure and a virtual clock grid created for the first metal layer, the virtual clock grid having a predetermined offset from a design boundary and a predetermined pitch between grid lines.

Abstract: Provided are a method, system, program, and data structure for implementing a locking mechanism to control access to a shared resource. A request is received to access the shared resource. A determination is made of whether a first file has a first name. The first file is renamed to a second name if the first file has the first name. A second file is updated to indicate the received request in a queue of requests to the shared resource if the first file is renamed to the second name. An ordering of the requests in the queue is used to determine whether access to the shared resource is granted to the request. The first file is renamed to the first name after the second file is updated.

Abstract: Methods and systems for accessing information in and loading encrypted information to memory. A processor provides virtual address information to a memory management unit. In response, the memory management unit retrieves a key tag and physical address information corresponding to the virtual address information. The memory management unit then sends the key tag and physical address information to the processor. The processor then determines whether a memory location corresponding to the physical address information is encrypted based on the key tag, and retrieves a secret key using the key tag based on the determining. Thereafter, information read from the memory location is decrypted using the secret key.

Abstract: Provided are a method, system, and program for making resources available for access to a client. A list is provided indicating a plurality of resources to make available for access to clients over a network and the list is processed to determine resources. Attributes of the resources are determined and reference codes are generated for the determined resources based on the determined attributes. The reference codes are associated with the resources for which the codes were generated. In response to receiving a request to one reference code from the client, a determination is made from the resource associated with the requested reference code and returning the determined resource to the requesting client.

Abstract: A circuit and method for boosting bitline performance uses a bitline booster circuit to allow long bitlines, with large numbers of memory cells attached, to discharge to a digital zero in a faster time. One bitline booster circuit requires only two additional NOR gates, two additional transistors, and one additional control signal. Consequently, the bitline booster circuit does not require a significant number of added components, does not require multiple control signals and takes up minimal additional silicon area.

Abstract: An apparatus for controlling removal of a component from a chassis may include an engaging member and a control member. The engaging member may engage a portion of the chassis when the component is withdrawn to a predetermined position in the chassis to inhibit removal of the component from the chassis. The control member may be operated to disengage the component from the chassis such that the user can remove the component from the chassis. The control member may be a handle that disengages the engaging member from the chassis when the handle is deployed.

Abstract: An adjustment and calibration system for post-fabrication treatment of a phase locked loop input receiver is provided. The adjustment and calibration system includes at least one adjustment circuit, to which the phase locked loop input receiver is responsive, and a storage device that selectively stores control information (1) associated with a state of the adjustment circuit and/or (2) from a tester that writes such control information to the storage device, where the control information stored in the storage device is subsequently selectively read out in order to adjust the adjustment circuit to a state corresponding to the control information.

Abstract: One embodiment of the present invention provides a system that facilitates determining server configurations based on an execution profile of an application. During operation, the system analyzes the application to develop an execution profile that specifies the number of times each primitive operation is executed. Next, the system estimates the amount of resources used by the application based on the number of times each primitive operation is executed. Finally, the system determines a server configuration based on the estimated amount of resources used by the application.

Abstract: A graphical processing system comprising a computational unit and a shadow processing unit coupled to the computational unit through a communication bus. The computational unit is configured to transfer coordinates C1 of a point P with respect to a first space to the shadow processing unit. In response to receiving the coordinates C1, the shadow processing unit is configured to: (a) transform the coordinate C1 to determine map coordinates s and t and a depth value Dp for the point P, (b) access a neighborhood of depth values from a memory using the map coordinates s and t, (c) compare the depth value DP to the depth values of the neighborhood, (d) filter binary results of the comparisons to determine a shadow fraction, and (e) transfer the shadow fraction to the computational unit through the communication bus.

Abstract: Management of lightweight directory access protocol (LDAP) service may be accomplished through the use of remote mirroring and a unique application program interface (API). Both a primary and a secondary LDAP server are maintained. Any modification to the primary LDAP server is then mirrored on the secondary LDAP server. When a call is attempted on the primary server, if it fails, the call is retried on the secondary LDAP server. The API allows for specialized grammar for commands that permits the system to handle primary (and secondary) LDAP server failure.

Abstract: A system and method for connecting pending and preset telephone calls to facilitate transitioning to a phone call. Embodiments of the present invention include a method for anticipating and connecting a telephone call comprising identifying a trigger action associated with an anticipated outgoing telephone call, retrieving a phone number associated with said trigger action, and automatically setting a programmable speed dial button wherein by selecting the speed dial button, said phone number associated with said trigger action is dialed.

Abstract: A method for arithmetic expression optimization includes receiving an operator and at least one operand of a first instruction defined for a first processor having a first base. The method also includes converting the first instruction to a second instruction optimized for a second processor having a second base smaller than the first base when overflow is impossible based at least in part on the operator and the relationship between the operand type and the second base. The method also includes converting instructions in an instruction chain to a wider base larger than the second base and smaller or equal to the first base when the at least one operand carries potential overflow beyond the second base and when the operator is sensitive to overflow. The chain is bounded by the second instruction and a third instruction that has been previously optimized and is the source of the potential overflow.

Abstract: A method and system for event publication and subscription with an event channel from user level and kernel level are disclosed. The system comprises an event channel. The event channel includes an event queue for an event sent by a publisher. Additionally, the event channel has a plurality of subscriber-based queues each corresponding to a subscriber. If the corresponding subscriber has subscribed to receive delivery of the event, the subscriber-based queue includes the event. Moreover, the event channel further comprises a dispatcher for dispatching based on filtering criteria the event to the subscriber-based queue if the corresponding subscriber has subscribed to receive delivery of the event, and a delivery mechanism for delivering the event from the subscriber-based queue to the corresponding subscriber. The publisher can be a user level publisher or a kernel level publisher. The subscriber can be a user level subscriber or a kernel level subscriber.

Abstract: A system that improves communications between capacitively coupled integrated circuit chips. The system operates by situating an interposer over capacitive communication pads on a first integrated circuit chip, wherein the interposer is made up of material that is anisotropic with respect to transmitting capacitive signals. A second integrated circuit chip is situated so that communication pads on the second integrated circuit chip are aligned to capacitively couple signals between the integrated circuit chips through the interposer. The increased dielectric permittivity caused by the interposer can improve capacitive coupling between opposing communication pads on the integrated circuit chips. The interposer can also reduce cross talk between communication pads on the first integrated circuit chip and pads adjacent to the opposing communication pads on the second integrated circuit chip.

Abstract: An electronics assembly, for example for use as a network server, comprises a frame that encloses a number of components of the assembly, a facia panel that is attached to a surface of the frame, and is formed as an upper and a lower part that are retained together generally horizontally. The assembly includes a printed circuit board for providing information relating to the assembly, the printed circuit board being located within the facia panel between the two parts. The frame and the fascia panel have a locating element at each side of the fascia panel for ensuring correct positioning of the panel with respect to the frame.