Abstract: A verification process comprises a verification environment having a hardware development language interface. The verification process also comprises a device under test having a hardware development language interface operable to communicate with the verification environment hardware development language interface, and also having an Infiniband interface. The verification process additionally comprises a remote Infiniband link having an Infiniband interface operable to communicate with the device under test Infiniband interface and also having a socket protocol interface operable to communicate with a further verification process.

Abstract: A clock distribution architecture having clock and power failure protection is disclosed. In one embodiment, a computer system includes a plurality of client boards and a plurality of switch boards, as well as having power distribution boards and clock boards (referred to herein as service processor boards). In one embodiment may include a clock board and a plurality of power distribution boards, while another embodiment may include a power distribution board and a plurality of clock boards. The clock board(s) may generate a global clock signal, which may be distributed to the switch boards and the power distribution board(s). The power distribution board(s) may distribute the global clock signal to the client boards. Clock redundancy may be provide through either having multiple clock boards or multiple power distribution boards.

Abstract: A method, computer program, signal transmission and apparatus pre-verify instructions in a module of a computer program one module-at-a-time. First it is determined whether checking an instruction in a first module which is loaded requires information in a referenced module different than the first module. If the information is required, a constraint for the referenced module is written without loading or otherwise accessing the referenced module. During linking it is determined whether a first module which is loaded has passed pre-verification one-module-at-a-time before linking. A pre-verification constraint on a constrained module is read, if any, if the first module has passed such verification. If any pre-verification constraint is read, the pre-verification constraint is enforced if the constrained module is already loaded.

Abstract: One embodiment of the present invention provides a system for mapping memory addresses to cache entries. The system operates by first receiving a memory request at the cache memory, wherein the memory request includes a memory address. The system then partitions the memory address into a set of word offset bits and a set of higher-order bits. Next, the system maps the memory address to a cache entry by computing a modulo operation on the higher-order bits with respect to an integer and using the result as the cache index.

Abstract: A data layout mechanism is described for allocating metadata within a storage system employing data striping. The data layout mechanism includes a number of storage devices, each of the storage devices having storage spaces allocated to store individual data stripe units associated with a number of stripes. The data layout mechanism further includes a plurality of metadata chunks allocated within the storage devices such that (1) metadata associated with at least two data stripe units of the same stripe is stored within a single metadata chunk, and (2) the metadata chunks are evenly distributed across the storage devices.

Abstract: Circuit board orientation in a computer system. A system includes a first set of circuit boards and a second set of circuit boards. The first set of circuit boards may be mated via a first and second set of connectors to the second set of circuit boards such that the first set of circuit boards is oriented substantially orthogonal with respect to the second set of circuit boards. Each of the boards may be accessible and hot swappable.

Abstract: Methods and systems in accordance with the present invention allow users' private keys corresponding to their digital certificates to be stored and archived outside of the control of a Certificate Authority (“CA”). A CA may have a policy that a user's private key must be archived in order to receive a digital certificate upon a registration request from the user. Typically, the CA knows that the user's private key is archived because it implements the archival of the key, for example, on a data recovery manager and associated internal database that the CA controls. Methods and systems in accordance with the present invention allow for the enforcement of such a policy while allowing the archival of the private keys to be outside of the control of the CA by having a data recovery manager supply a digitally signed proof of archival token with a digital certificate request to a CA. The CA is assured that the key has been archived.

Abstract: The present invention provides a method and apparatus for configuring a timing feedback path in a semiconductor device. The apparatus includes an oscillator adapted to provide a reference clock signal. The apparatus further includes at least one buffer layer adapted to receive the reference clock signal and provide a delayed clock signal, a selector adapted to select one of the delayed clock signal and the reference clock signal, and a device adapted to provide an output clock signal such that the selected one of the delayed clock signal and the reference clock signal is substantially in phase with the reference clock signal.

Abstract: One embodiment of the present invention provides a system that initializes system classes for a virtual machine during build time for the virtual machine, so that portions of the system classes can be stored in Read Only Memory (ROM). During virtual machine build time, the system loads system classes for the virtual machine. Next, the system identifies which of the system classes can be initialized at build time and then initializes the identified system classes. The system then stores portions of the system classes in a ROM image, so that the portions of the system classes can be accessed from the ROM image during subsequent run-time execution of the virtual machine. In this way, this embodiment of the present invention reduces the amount of time required to initialize system classes during run-time execution of the virtual machine.

Abstract: One embodiment of the present invention provides a system that predicts a result produced by a section of code in order to support speculative program execution. The system begins by executing the section of code using a head thread in order to produce a result. Before the head thread produces the result, the system generates a predicted result to be used in place of the result. Next, the system allows a speculative thread to use the predicted result in speculatively executing subsequent code that follows the section of code. After the head thread finishes executing the section of code, the system determines if a difference between the predicted result and the result generated by the head thread has affected execution of the speculative thread. If so, the system executes the subsequent code again using the result generated by the head thread. If not, the system performs a join operation to merge state associated with the speculative thread with state associated with the head thread.

Abstract: A system for performing visible object determination. Visualization software executing on one or more processors searches a cone tree with respect to a hull tree. Both trees respect the same group of transformations. Thus, the cone tree as stored in memory need not store all branches down to ultimate resolution. For example, the cone tree may store a selected cone and all its subcones down to the ultimate resolution, while subcones of other cones at the same level as the selected cone may not be represented in the stored cone tree. When the visualization software encounters a nonstored cone and a given hull H in its search procedure, the visualization software may apply an appropriate one of the group transformations to the given hull, and search the tranformed hull with respect to the selected cone (or a subcone of the selected cone).

Abstract: A system and method for identifying problems with a system configuration may evaluate system configuration information against one or more configuration recommendations or rules. The evaluated system configuration may include various types of software and hardware components which may impact the operations of the computer system. Rules may be any information identifying an issue or describing a recommended configuration for the software or hardware component. A knowledge-based language or a programming language analyzer may be used to specify the rules. In one embodiment, a rules engine may be used as part of the problem detection application to evaluate configuration data against associated rules. A rules engine may be any mechanism used to recognize, interpret and process the configuration data against the rules. The results of the evaluation process may be stored for further analysis.

Abstract: A method for providing verification for a simulation design involves analyzing a simulation design using a testbench comprising a rapid bug detection tool, and if a bug is detected, adding a bug isolation tool to the testbench, and isolating and eliminating the bug using the testbench comprising the bug isolation tool.

Abstract: A method of estimating delay which includes configuring a first signal path and second signal path such that the first signal path is a victim signal path and the second signal path is an aggressor signal path, calculating Miller factors between the victim signal path and the aggressor signal path for a plurality of edge combinations between a victim signal edge and an aggressor signal edge, and using the Miller factors to perform a timing analysis.

Abstract: A system of managing a directory with templates. A template file is created containing various structure templates. The templates entries may then be loaded into the directory or be read directly from the file by users. The templates provide structure information to users of the directory, and allow an administrator to more easily configure part or all of the directory.

Abstract: A method and apparatus are provided for handling events received at a media streaming server. Server sockets configured to receive events are divided into collections and registered with a polling object. Each collection shares a processor thread for detecting events. Each socket is associated with an event consumer object that is notified when an event is received at the socket. The event consumer objects invoke task objects to handle the events. Task objects are queued in a task queue and execute using a pool of processor threads. Event consumer objects are derived from an abstract base consumer class that defines a common interface. Subclasses of the base consumer class are configured for different types of events that may be received (e.g., connection requests, media streaming commands, media data, media stream quality reports). Specific event consumer objects are instantiated from the subclasses to provide implementations of the common interface.

Abstract: An object oriented mechanism for dynamically constructing service implementations to enforce restrictions on services provided to an application is disclosed. When an application desires an implementation for a particular service, the application makes a request to a framework. The framework receives the request and, in response, determines what restrictions, if any, need to be imposed on the requested implementation. Once the restrictions are determined, the framework dynamically constructs the requested implementation. The requested implementation is constructed such that it incorporates a general implementation of the service, the restrictions, and enforcement logic for enforcing the restrictions on the general implementation. Once the requested implementation is constructed, it is provided to the application. Thereafter, the application invokes the requested implementation directly for services.

Abstract: A method and mechanism for testing communication links. A transmitter contact, or transmission point, is assigned a unique identifier. During a given test, the transmitter conveys a test pattern to a receiver via a link. Following this test pattern, the transmitter transmits a bit of its unique identifier to the receiver. The receiver receives both the test pattern and the identifier bit, and determines whether the received test pattern matches an expected value. If the test pattern was correctly received by the receiver, the receiver transmits the received identifier bit back to the transmitter. However, if the received test pattern is not correct, the receiver complements the received identifier bit and transmits the complemented bit back to the transmitter. The transmitter receives the identifier bit from the receiver and determines whether it matches the identifier bit which was originally transmitted by the transmitter.

Abstract: One embodiment of the present invention provides an electronic circuit and method for measuring a capacitance. A signal generating mechanism generates a signal having a predefined frequency and predefined low and high voltage levels on one terminal of the capacitance. The other terminal of the capacitance is coupled to a switching mechanism. The switching mechanism is set to couple the other terminal of the capacitance to a first amplifier or a second amplifier for a portion of each signal cycle thereby full-wave rectifying a transient current flowing between the two terminals in the capacitance. Outputs of the first amplifier and the second amplifier are coupled to a current measurement mechanism for measuring the current. The capacitance is determined from the measured current. Several variations on this embodiment are provided.

Abstract: Caching fonts on a display computer may be performed in order to reduce network bandwidth utilization and/or to improve CPU usage. Text commands may be recorded when they are executed to create a portion of a graphics image. These text commands may be used to update a data structure with information, and this data structure may be used to more efficiently transmit the text portions of the graphics image. A caching mechanism may be used wherein the font utilized by the text command is stored in the cache if a compatible font does not already exist in the cache. Once the font has been cached, subsequent text commands utilizing the font may be executed with a dramatic reduction in network bandwidth.