Patents Assigned to Sun Microsystems
  • Patent number: 6891804
    Abstract: The present invention provides a method and apparatus for desirable network components. One embodiment selects connection components for use in network components, where the most desirable components are selected from a set of components associated with a plurality of network protocols having identical physical layers. Another embodiment of the present invention uses Gigabit Ethernet connection components, which communicate using the Fiber Channel network protocol. Since the physical layer of Gigabit Ethernet and Fiber Channel are the same, the less expensive Gigabit Ethernet components carry the electronic signals to the Fiber Channel devices in the same way as Fiber Channel connection components. Thus the embodiment communicates using the Fiber Channel protocol over Gigabit Ethernet components. In yet another embodiment of the present invention, the network component is a storage device such as a redundant array of inexpensive disks (RAID) device.
    Type: Grant
    Filed: December 15, 2000
    Date of Patent: May 10, 2005
    Assignee: Sun Microsystems, Inc.
    Inventor: Keith R. Hargrove
  • Patent number: 6892307
    Abstract: A security architecture has been developed in which a single sign-on is provided for multiple information resources. Rather than specifying a single authentication scheme for all information resources, the security architecture associates trust-level requirements with information resources. Authentication schemes (e.g., those based on passwords, certificates, biometric techniques, smart cards, etc.) are associated with trust levels and a log-on service obtains credentials for an entity commensurate with the trust-level requirement(s) of an information resource (or information resources) to be accessed. Once credentials have been obtained for an entity and the entity has been authenticated to a given trust level, access is granted, without the need for further credentials and authentication, to information resources for which the authenticated trust level is sufficient.
    Type: Grant
    Filed: August 5, 1999
    Date of Patent: May 10, 2005
    Assignee: Sun Microsystems, Inc.
    Inventors: David L. Wood, Derk Norton, Paul Weschler, Chris Ferris, Yvonne Wilson
  • Patent number: 6892286
    Abstract: A system and method for verifying a memory consistency model for a shared memory multiprocessor computer systems generates random instructions to run on the processors, saves the results of the running of the instructions, and analyzes the results to detect a memory subsystem error if the results fall outside of the space of possible outcomes consistent with the memory consistency model. A precedence relationship of the results is determined by uniquely identifying results of a store location with each result distinct to allow association of a read result value to the instruction that created the read result value. A precedence graph with static, direct and derived edges identifies errors when a cycle is detected that indicates results that are inconsistent with memory consistency model rules.
    Type: Grant
    Filed: September 30, 2002
    Date of Patent: May 10, 2005
    Assignee: Sun Microsystems, Inc.
    Inventors: Sudheendra Hangal, Durgam Vahia, Juin-Yeu Lu, Chaiyasit Manovit
  • Patent number: 6892363
    Abstract: Automated techniques to correct certain rule violations with respect to non-design geometries are used, simplifying and automating the design layout of an electronic circuit, whether embodied as a design encoding or as a fabricated electronic circuit. Correcting minimum width rule violations of non-design geometries is accomplished by forming one or more cutting areas adjoining one or more erroneous edges of a non-design geometry, and deducting the cutting areas form the non-design geometry, splitting the non-design geometry into two or more remaining non-design geometries. Any slivers of remaining non-design geometries, i.e., any pieces that are smaller than a minimum size amount, are removed. Cutting areas are formed by stretching ends of erroneous edge segments by a minimum width rule amount and sizing the stretched edge segments which are inside the non-design geometry outward by a minimum spacing rule amount.
    Type: Grant
    Filed: July 23, 2002
    Date of Patent: May 10, 2005
    Assignee: Sun Microsystems, Inc.
    Inventor: Mu-Jing Li
  • Patent number: 6892379
    Abstract: In a compiler, a method of generating assembly code for stack unwinding is disclosed. One or more source code lines are obtained. Assembly code for the one or more source code lines is then generated. The assembly code includes one or more stack unwind assembler having one or more associated stack unwind sub directives. Each of the stack unwind assembler directives is adapted for indicating to an assembler that one or more encoded data sections containing stack information to be used for stack unwinding is to be generated in an object file from the one or more associated stack unwind sub directives.
    Type: Grant
    Filed: June 20, 2001
    Date of Patent: May 10, 2005
    Assignee: Sun Microsystems, Inc.
    Inventor: Alfred J. Huang
  • Patent number: 6891403
    Abstract: The locked frequency of a PLL is used to latch a test signal through various latching devices (flip-flops or the like). Various different delays are selectively applied to the test signal to provide a delayed test signal and the delayed test signal is measured to determine whether the delay in the test signal matches the jitter in the locked frequency of the PLL. When the delay in the test signal matches the jitter in the locked frequency of the PLL, the respective delay of the test-signal is used to determine the effective locked frequency of the PLL.
    Type: Grant
    Filed: October 22, 2002
    Date of Patent: May 10, 2005
    Assignee: Sun Microsystems, Inc.
    Inventors: Harsh D. Sharma, Howard L. Levy, Hong Kim, Nadeem N. Eleyan
  • Patent number: 6892320
    Abstract: One embodiment of the present invention provides a system that supports multiple versions of highly available objects. A highly available object is a primary object and one or more secondary objects. In an environment supporting multiple versions, the client, the primary, and the secondary objects can each be running either old or new software. Highly available objects introduce a need to process checkpoints where the primary and each of the secondary objects can be at different software versions. In one such situation, the system receives a change to a new version primary object at a node running new version primary software. Next, the system creates a new version checkpoint from this change and distributes the new version checkpoint to nodes executing new version software. The system also translates the new version checkpoint into an old version checkpoint and distributes this old version checkpoint to nodes executing old version software.
    Type: Grant
    Filed: June 3, 2002
    Date of Patent: May 10, 2005
    Assignee: Sun Microsystems, Inc.
    Inventor: Ellard T. Roush
  • Patent number: 6892382
    Abstract: Methods and apparatus for implementing deployment descriptors which are used to deploy modules in an enterprise environment are disclosed. According to one aspect of the present invention, a method for deploying an application using a deployment tool for use on a platform server includes creating the application, creating an application deployment descriptor for the application, packaging the application in an archive, and deploying the application packaged in the archive. Creating the application includes obtaining an application component which has an associated application component deployment descriptor that has information relating to the deployment of the application component. The application deployment descriptor for the application includes information arranged to identify the application component, and packaging the application in an archive includes packaging the application component, the application component deployment descriptor, and the application deployment descriptor.
    Type: Grant
    Filed: May 3, 2000
    Date of Patent: May 10, 2005
    Assignee: Sun Microsystems, Inc.
    Inventors: Mark W. Hapner, Vladimir Matena, Kevin Osborn, Hans Hrasna
  • Patent number: 6892202
    Abstract: A method for updating Enterprise JavaBeans (EJB) classes is provided. Each EJB class is managed by an application server which maintains a database of active EJB classes. The method includes defining an update plug for an existing EJB class and assigning the update plug to the existing EJB. The method also includes compiling the existing EJB class using the update plug to generate a dependent EJB class. The dependent EJB class uses an adapter and a contract to gain access to methods of the dependent EJB class. Each method of the dependent EJB class is associated with an algorithm that defines a locking timestamp.
    Type: Grant
    Filed: April 17, 2002
    Date of Patent: May 10, 2005
    Assignee: Sun Microsystems, Inc.
    Inventor: Jean-Francois Arcand
  • Patent number: 6892360
    Abstract: Selectively determining a particular graphical user interface widget to receive focus based upon user-entered directional information. When a user enters information concerning which direction to move the focus of the widgets, such as by manipulating arrow keys, the system uses geometry of a current widget and other visible traversable widgets in combination with the user-entered information to determine the next widget, and it moves the focus to that widget.
    Type: Grant
    Filed: August 5, 1998
    Date of Patent: May 10, 2005
    Assignee: Sun Microsystems, Inc.
    Inventors: Kuldipsingh Pabla, Venkatesh Narayanan
  • Patent number: 6892295
    Abstract: According to the invention, a method for processing data related to an array of elements is disclosed. In one embodiment, a method for processing data related to an array of elements is disclosed. In the process, a first value is loaded from a first location, and a second value is loaded from a second location. The first and second values are compared to each other. A predetermined value is optionally stored at a destination based upon the outcome of the comparison.
    Type: Grant
    Filed: March 8, 2001
    Date of Patent: May 10, 2005
    Assignee: Sun Microsystems, Inc.
    Inventor: Ashley Saulsbury
  • Patent number: 6892159
    Abstract: A method for tracking repair histories includes providing a field replaceable unit having a memory device. Operational history data is collected during the operation of the field replaceable unit. The operational history data is stored in the memory device. A computing system includes a field replaceable unit including a memory device configured to store operational history data associated with the field replaceable unit.
    Type: Grant
    Filed: April 14, 2003
    Date of Patent: May 10, 2005
    Assignee: Sun Microsystems, Inc.
    Inventors: Steven E. Weiss, Raymond J. Gilstrap, Emrys Williams, David S. Gordon, Gregory S. Jumper
  • Patent number: 6892368
    Abstract: Automated patching techniques to correct certain rule violations are used, simplifying and automating the design layout of an electronic circuit, whether embodied as a design encoding or as a fabricated electronic circuit. A series of patches of predefined orientations are utilized to correct design rule violations. A set of violations are identified, patches of a predefined orientation are attempted to correct one or more violations. Patches of another predefined orientation are attempted to correct remaining violations. Attempted patching is repeated until all patches in the series have been attempted or all violations have been corrected. Patches can be added to a construction layer over the set of violations, and each patch that does not cause a design rule violation can be copied to a metal layer. A series of patches of predefined orientations are used, efficiently correcting design rule violations such as minimum area and jog rule violations.
    Type: Grant
    Filed: February 26, 2003
    Date of Patent: May 10, 2005
    Assignee: Sun Microsystems, Inc.
    Inventors: Mu-Jing Li, Amy Yang
  • Patent number: 6892278
    Abstract: One embodiment of the present invention provides a system that implements a last-in first-out buffer. The system includes a plurality of cells arranged in a linear array to form the last-in first-out buffer, wherein a given cell in the interior of the linear array is configured to receive get and put calls from a preceding cell in the linear array, and to make get and put calls to a subsequent cell in the linear array. If the given cell contains no data items, the given cell is configured to make a get call to retrieve a data item from the subsequent cell. In this way the data item becomes available in the given cell to immediately satisfy a subsequent get call to the given cell without having to wait for the data item to propagate to the given cell from subsequent cells in the linear array. If the given cell contains no space for additional data items, the given cell is configured to make a put call to transfer a data item to the subsequent cell.
    Type: Grant
    Filed: March 5, 2002
    Date of Patent: May 10, 2005
    Assignee: Sun Microsystems, Inc.
    Inventor: Josephus C. Ebergen
  • Publication number: 20050093603
    Abstract: A system and method of resetting a jam latch circuit includes an activation device. The activation device having respective inputs coupled to each one of several data lines. A first reset device is also included and has a first control input coupled to an output of the activation device. The first reset device having a reset voltage source coupled to an input of the first reset device. A second reset device is also included and has a second control input coupled a control signal. The second reset device being coupled in series with the first reset device. A storage cell is coupled to an output of the second reset device.
    Type: Application
    Filed: October 31, 2003
    Publication date: May 5, 2005
    Applicant: Sun Microsystems, Inc.
    Inventors: Honkai Tam, Pranjal Srivastava
  • Patent number: 6889277
    Abstract: A system and method for dynamically tuning the interrupt coalescing behavior of a communication interface to suit the workload of the interface. An interrupt handler adjusts dynamic Packet and/or Latency values of the interface to control how many packets the interface may accumulate, or how much time the interface may wait after receiving a first packet, before it can signal a corresponding interrupt to a host processor and forward the accumulated packet(s). The interrupt handler maintains a Trend parameter reflecting a comparison between recent sets of packets received from the interface and the interface's Packet parameter. The Packet value is decreased or increased as packet traffic ebbs or flows. When the Packet value is incremented from a minimum value, a Fallback mechanism may be activated to ensure a relatively rapid return to the minimum value if an insufficient amount of traffic is received to warrant a non-minimum Packet value.
    Type: Grant
    Filed: April 18, 2002
    Date of Patent: May 3, 2005
    Assignee: Sun Microsystems, Inc.
    Inventor: Gian-Paolo D. Musumeci
  • Patent number: 6888720
    Abstract: A system for cooling at least two electronic components comprises a plurality of graphitic foam products which are each thermally coupled to a corresponding component, a plurality of housings which are each mounted over a corresponding foam product and which each comprise an inlet and an outlet, a source of cooling fluid, and a conduit which is connected between the fluid source and each inlet. In operation, fluid is communicated from the fluid source to each housing through the conduit to thereby cool the components.
    Type: Grant
    Filed: June 18, 2002
    Date of Patent: May 3, 2005
    Assignee: Sun Microsystems, Inc.
    Inventors: Dennis M. Pfister, Charles M. Byrd, Howard L. Davidson
  • Patent number: 6888785
    Abstract: In one embodiment, a storage device includes a controller, an integral storage medium that includes one or more stacks, where each stack includes multiple storage locations that are distributed throughout a portion of the volume of the integral storage medium, and an access mechanism that is configured to access the integral storage medium. The controller is configured to receive a command to write a unit of primary data to a first storage location. The controller is configured to generate a unit of redundant data corresponding to the unit of primary data and to control the access mechanism so that the unit of primary data is written to the first storage location in a first stack and the unit of redundant data is written to a second storage location within the integral storage medium.
    Type: Grant
    Filed: January 25, 2002
    Date of Patent: May 3, 2005
    Assignee: Sun Microsystems, Inc.
    Inventor: John M. Morrison
  • Patent number: 6889297
    Abstract: Methods, systems, and articles of manufacture consistent with the present invention eliminate data redundancies. A first data block identifier is obtained for a first data block, the first data block identifier being calculated based on data of the first data block. It is determined whether a second data block identifier matching the first data block identifier exists, the second data block identifier being calculated based on data of a second data block. When it is determined that the second data block identifier matching the first data block identifier exists, the first data block identifier is indicated as being is redundant.
    Type: Grant
    Filed: March 22, 2002
    Date of Patent: May 3, 2005
    Assignee: Sun Microsystems, Inc.
    Inventors: Oliver Krapp, Thorsten Laux, Joerg Heilig
  • Patent number: D504895
    Type: Grant
    Filed: March 1, 2004
    Date of Patent: May 10, 2005
    Assignee: Sun Microsystems, Inc.
    Inventors: Christopher H. Frank, John D. Schnabel, Simon J. Matthews, Stephen de Saulles, James R. Kitchen