Abstract: A graphical user interface uses scroll bars having a single pixel width and a much larger scroll button or thumb. Both the scroll bar and the scroll button may be controlled to have selective degrees of transparency so that they underlying image information may be seen under certain conditions. In one application, the scroll bar itself is invisible until a cursor approaches to within a specified proximity. The graphical user interface permit scroll bars to be displayed which follow an arbitrary path in either two or three dimensions.

Abstract: In a system with multiple requesters making multiple requests for resources, an arbiter prioritizes requests based on the number of requests made by a requester. The highest priority is given to a requester that has made the fewest number of requests. Priority may instead be based on the number of requests made for a particular resource. Priority may also be based on a combination of number of requests made by a requester and number of requests made for a resource. The arbiter may also implement a starvation avoidance mechanism such as a round robin scheme.

Abstract: One embodiment of the present invention provides a system that facilitates implementing a memory mechanism within an asynchronous switch fabric. The system includes a memory device, which does not preserve first-in, first-out semantics such as a random access memory or a stack. The system also includes a data destination horn, for routing data from a trunk line to a plurality of destinations. The memory device is one destination of the plurality of destinations. The system further includes a data source funnel, for routing data from a plurality of sources into the trunk line. The memory device is a source of the plurality of sources.

Abstract: A network system and computer component device rack having an integrated AC power distribution system is provided. The device rack and power distribution system includes a device rack frame having a plurality of locations for receiving network system and computer component devices within. The plurality of locations stacks network system and computer component devices one over another in a generally vertical orientation. A pair of AC power sequencers are mounted on an inner side panel, and a pair of power strips is provided along a rear edge. A plurality of compound angle AC jumper cords are provided for connecting network system and computer component devices to a plurality of power outlet receptacles on the pair of power strips.

Abstract: Remote incremental program verification may be achieved by receiving content verified by at least one content provider, installing the content on a resource-constrained device, disabling subsequent installation of content on the resource-constrained device, and issuing the resource-constrained device to an end user. The at least one content provider includes an applet provider, a device manufacturer, and a device issuer. The content includes at least one program unit, where each program unit comprises an Application Programming Interface (API) definition file and an implementation. Each API definition file defines items in its associated program unit that are made accessible to one or more other program units, and each implementation includes executable code corresponding to the API definition file. The executable code includes type specific instructions and data.

Abstract: Methods and systems are provided for processing a cache. A candidate object is identified for updating. A fresh object corresponding to the candidate object is obtained if it is determined that a newer version of the candidate object is available. A destination buffer is selected from a group of primary and non-primary buffers based on an amount of available space in a primary buffer. The fresh object is stored in the destination buffer.

Abstract: During a scan operation in a circular, singly linked list having a number of list entries each of which has an associated next pointer field and a root pointer register that includes a root pointer that points to, or otherwise references, an arbitrary list entry. In order to add a new list entry to the list, the root pointer included in the root pointer register is copied into a next pointer field of the added list entry. Next, the root pointer register is overwritten with a pointer that points to or otherwise references the added list entry. In this way, additions to a circular, singly linked list that are done at the time of scanning involve only a single SRAM write access.

Abstract: In accordance with the invention, on-line group servers issue group membership or group non-membership certificates upon request. Furthermore, when a requester requests a group certificate for a particular entity, the associated group server makes a dynamic decision regarding the entity's membership in the group rather than simply referring to a membership list. These capabilities provide for, among other things, the implementation of “nested” groups, wherein an entity may indirectly prove membership in a first, or nested, group by proving membership in a second group which is a member of the first group. In the nested group situation, the dynamic decision may involve the group server of the nested group obtaining proof of the entity's membership or non-membership in the second group. Proof of membership or non-membership may include a group certificate and/or a group membership list.

Abstract: A method for operating a data processing system is provided. The method includes receiving a plurality of data segments, and for each of the plurality of data segments, generating an error correction code (ECC) corresponding to the data segment, said ECC providing at least one-bit error correction capability. Finally, an extended parity segment is calculated from the plurality of data segments and the corresponding ECCs, said extended parity segment including a parity segment calculated from the plurality of data segments and a parity ECC calculated from the corresponding ECCs.

Abstract: A method and mechanism for annotating a transaction stream. A processing unit is configured to generate annotation transactions which are inserted into a transaction stream. The transaction stream, including the annotations, are subsequently observed by a trace unit for debug or other analysis. In one embodiment, a processing unit includes a trace address register and an annotation enable bit. The trace address register is configured to store an address corresponding to a trace unit and the enable bit is configured to indicate whether annotation transactions are to be generated. Annotation instructions are added to operating system or user code at locations where annotations are desired. In one embodiment, annotation transactions correspond to transaction types which are not unique to annotation transactions. In one embodiment, an annotation instruction includes a reference to the trace address register which contains the address of the trace unit.

Abstract: In a multi-wide class design layout, design rule checks for enclosure of multi wide class objects prevent false errors or false passes by performing such checks against the non-virtual boundaries of a wide class object, and not against the virtual boundaries. An exemplary embodiment provides a method for identifying as a violation, for each wide class wi object, any geometry on another layer which is located at least partially inside the wi object and has any portion thereof located within a distance encli of any non-virtual boundary of the wi object. The exemplary method is preferably performed using effective wide class objects.

Abstract: An adapter for an interconnecting device. The adapter comprises a backboard having a first end and a second end. A connector having first conductive elements is coupled to the first end. A receptacle having second conductive elements is coupled to the second end. A plurality of conductive lines is coupled to the backboard. The plurality of conductive lines electrically connects the first conductive elements to the second conductive elements.

Abstract: A device that uses an input clock signal to generate an output clock signal with a desired frequency is provided. The device uses a voltage controlled delay element that outputs a reset signal to a flip-flop dependent on a bias signal and the input clock signal. When triggered, the flip-flop outputs a transition on the output clock signal, which, in turn, serves as an input to a duty cycle corrector that generates the bias signal dependent on the configuration of the duty cycle corrector. The duty cycle corrector may be configured to generate the bias signal so as to be able to operatively control the duty cycle of the output clock signal.

Abstract: A method and apparatus for thermally isolating a temperature sensor mounted on a printed circuit board from a heat generating component mounted on the printed circuit board is provided. Generally, a thermal isolation region, which may be comprised of a plurality of openings in the printed circuit board, is disposed about the temperature sensor to interrupt conductive transfer of heat from the heat generating component to the temperature sensor. The openings extend sufficiently far into the printed circuit board to remove at least a portion of a conductive layer, such as a power plane from the region surrounding the temperature sensor. Electrical power and signals may be provided to the temperature sensor through regions intermediate the openings.

Abstract: A method and apparatus are provided for controlling the power consumption of a semiconductor device such as a CPU or other form of processor that is operable to process a sequence of instructions. The device includes a monitor for checking the power consumption of the device, in order to detect any significant change in power consumption (which can cause problems for the power supply circuitry). In order to mitigate such change, one or more dummy instructions are inserted into the sequence of instructions. The dummy instructions do not affect the logical processing, but are selected in order to limit the change in power consumption. Thus if the change in power consumption represents an increase, then dummy instructions are selected that do not require much current. Conversely, if the change in power consumption represents a decrease, then dummy instructions are selected that draw a relatively large amount of current.

Abstract: A method and system for busy presence state detection in an instant messenger system. The method may include detecting a computer system activity level, determining whether the activity level exceeds an activity threshold, and transitioning a presence state of an instant messenger to a busy state in response to determining that the activity level exceeds the activity threshold, where the presence state corresponds to a given user. The system may include a computer system and an instant messenger software module configured to execute on the computer system. The instant messenger software module may be further configured to detect a computer system activity level, determine whether the activity level exceeds an activity threshold, and transition a presence state of the instant messenger software module to a busy state in response to the determination that the activity level exceeds the activity threshold, where the presence state corresponds to a given user.

Abstract: A precharge circuit capable of generating a precharge pulse is provided. The precharge circuit includes circuitry for initiating charging of a precharge pulse at a first edge of a first clock-like signal. The precharge circuit also includes circuitry for ending the charging of the precharge pulse after a time period that is longer of a preset delay period and a time period designated by a second edge of the second clock-like signal. Methods for generating a precharge pulse are also included.

Abstract: A method for embedding integrity metadata. In one exemplary embodiment, a plurality of integrity metadata segments is determined. Each integrity metadata segment is associated with a segment of user data. The user data is mapped to a plurality of physical sectors, each physical sector containing a segment of user data and the associated integrity metadata segment. For one exemplary embodiment, a common I/O data block size is determined, and its data is mapped into a number of 512-byte sectors. The number of 512-byte sectors corresponds to the number required for the common I/O data block size plus one or more additional 512-byte sectors. This creates additional space in each sector to accommodate the integrity metadata. Integrity metadata for each data segment of the common I/O size is determined. The integrity metadata for each sector is mapped to the additional space of each sector.

Abstract: A sequentially performed implementation of a compound compare-and-swap (nCAS) operation has been developed. In one implementation, a double compare-and-swap (DCAS) operation does not result in a fault, interrupt, or trap in the situation where memory address A2 is invalid and the contents of memory address A1 are unequal to C1. In some realizations, memory locations addressed by a sequentially performed nCAS or DCAS instruction are reserved (e.g., locked) in a predefined order in accordance with a fixed total order of memory locations. In this way, deadlock between concurrently executed instances of sequentially performed nCAS instructions can be avoided. Other realizations defer responsibility for deadlock avoidance to the programmer.

Abstract: A system and method for generating graphics images from 3-dimensional graphics data representing one or more transparent objects and one or more opaque objects are disclosed. Memory locations for storing transparent samples may be provided by reducing the number of opaque samples per pixel as needed, and storing the transparent samples in the memory locations formerly used to store the discarded opaque samples. A plurality of opaque samples for a plurality of sample positions corresponding to a pixel may be initially stored in a sample memory. A transparent sample rendered for one of the plurality of sample positions may replace an opaque sample in another one of the sample positions of the plurality of sample positions. The transparent and opaque samples rendered for the same position may be blended and the blended samples may be filtered at least once per screen refresh cycle to generate output pixels.