Patents Assigned to Sun Microsystems
  • Patent number: 6741101
    Abstract: Clocked half-rail differential logic circuits with single-rail logic of the invention do not include complementary logic elements. According to the invention, the complementary logic function of the prior art is replaced by a single transistor appropriately sized to provide the complementary output OUTBAR. Consequently, clocked half-rail differential logic circuits with single-rail logic of the invention use less power and, therefore, generate less heat, require less space, and are simpler in design so that they are more flexible, more space efficient and more reliable than prior art half-rail differential logic circuits.
    Type: Grant
    Filed: October 15, 2002
    Date of Patent: May 25, 2004
    Assignee: Sun Microsystems, Inc.
    Inventor: Swee Yew Choe
  • Patent number: 6741256
    Abstract: A predictive optimizing unit for use with an interleaved memory and suitable for use in a computer graphics system is described. The unit maintains a queue of pending requests for data from the memory, and prioritizes precharging and activating interleaves with pending requests. Interleaves which are in a ready state may be accessed independently of the precharging and activation of non-ready interleaves.
    Type: Grant
    Filed: August 27, 2001
    Date of Patent: May 25, 2004
    Assignee: Sun Microsystems, Inc.
    Inventor: Brian D. Emberling
  • Patent number: 6741561
    Abstract: A routing scheme using intention packets is contemplated. At times, one or more switching devices within a network may become overloaded with traffic or may encounter other adverse transmission conditions. When this occurs, a switching device may drop one or more packets to alleviate some of the congestion or other adverse condition. The switching devices may support a particular amount of resources (e.g. bandwidth, buffers, etc.) in and out of each of their ports. When a packet or a header portion of a packet arrives at a switching device, the switching device may determine what port the packet will need and the amount resources required by the packet on that port. If the required resources available for the packet on the port, then the switching device may route the packet to a next device. If the required resources are not available for the packet on the port, then the switching device may drop at least a portion of the packet. As opposed to or in addition to congestion (e.g.
    Type: Grant
    Filed: July 25, 2000
    Date of Patent: May 25, 2004
    Assignee: Sun Microsystems, Inc.
    Inventor: Whay S. Lee
  • Patent number: 6742006
    Abstract: A method and apparatus for ensuring that code being executed by a data processing system conforms to a platform standard. As an example, one embodiment of the present invention validates Pure Java platform standard conformance of Java programs downloaded from a remote server to ensure that they conform to the “Pure Java” standard. This checking can be performed at the time that the program is downloaded across a network firewall and/or at one or more times during the loading and execution of the program.
    Type: Grant
    Filed: May 10, 2002
    Date of Patent: May 25, 2004
    Assignee: Sun Microsystems, Inc.
    Inventors: William J. Raduchel, Glenn C. Scott, Timothy G. Lindholm
  • Patent number: 6741255
    Abstract: Apparatus, methods, systems and computer program products are disclosed that optimize the application of deferred image operations on a tiled source image. The invention dynamically creates a data structure (such as a directed acyclic graph (DAG)) representing the operations performed on various instances of one or more images to create a final image. The invention analyzes the data structure to determine which source image tiles are needed when the actual image data comprising the final image is required. Each of these tiles are then separately processed by all of the deferred operations to create the final image data. This approach reduces the number of times a tile is read into memory for processing and improves the performance of deferred image operations on a tiled source image.
    Type: Grant
    Filed: August 14, 1997
    Date of Patent: May 25, 2004
    Assignee: Sun Microsystems, Inc.
    Inventors: John L. Furlani, Alexandra R. Ohlson, Richard T. Inman
  • Patent number: 6742109
    Abstract: One embodiment of the present invention provides a system for executing variable-size computer instructions, wherein a variable-size computer instruction includes an action component that specifies an operation to be performed and a data component of variable size that specifies data associated with the operation. The system operates by first retrieving the variable-size computer instruction from a computing device's memory. The system then decodes the variable-size computer instruction by separating the variable-size computer instruction into the action component and the data component. Next, the system stores the action component in a first store and the data component in a second store so they can be reused without repeated decoding. Finally, the system provides a first flow path for the action component and a second flow path for the data component.
    Type: Grant
    Filed: November 30, 2000
    Date of Patent: May 25, 2004
    Assignee: Sun Microsystems, Inc.
    Inventors: Stepan Sokolov, David Wallman
  • Patent number: 6742081
    Abstract: A storage system may include a plurality of storage devices each having a plurality of addressable locations for storing data. A storage controller may be coupled to the storage devices and configured to store and retrieve data from the storage devices. An indirection map may be stored within the system having a plurality of map entries each configured to map a virtual address to a physical address on the storage devices. Each map entry may also store a checksum for data stored at the physical address indicated by the map entry. The storage controller may receive storage requests specifying a virtual address and may access the indirection map for each storage request to obtain the corresponding physical address and checksum. Dynamic striping may be employed so that new writes form new parity groups. Thus, stripes of various sizes may be supported by the storage system.
    Type: Grant
    Filed: April 30, 2001
    Date of Patent: May 25, 2004
    Assignee: Sun Microsystems, Inc.
    Inventors: Nisha D. Talagala, Whay S. Lee, Chia Y. Wu
  • Patent number: 6741855
    Abstract: One embodiment of the invention provides a method and apparatus for remotely managing data in a network system comprising at least one mobile device (e.g. a PDA, cellular phone, two-way pager, or mobile computer) and a least one server computer connected via an interconnection fabric, wherein the mobile device is registered with the server and configured to issue commands to a bot service using electronic mail messages or some other viable data transmission mechanism. The bot service responds to the commands by interfacing with the server computer to perform the requested action on behalf of the mobile device.
    Type: Grant
    Filed: March 24, 2000
    Date of Patent: May 25, 2004
    Assignee: Sun Microsystems, Inc.
    Inventors: Guy W. Martin, Owen M. Densmore
  • Patent number: 6742013
    Abstract: Using a subtraction without borrow operation, the first operand lowest order word is subtracted from a second operand lowest order word. If the result of the subtracting is not zero, then a zero (Z) flag is cleared such that a Z flag status is not set. If, however, the result of the subtracting is zero, then the Z flag is set as usual. Next, a first operand next higher order word is subtracted from a second operand next higher order word using a subtraction with borrow and a sticky not Z flag (SBBZ) instruction and, based upon the subtracting, the Z flag is updated accordingly such that it represents the result of the whole multi-word subtraction until the first operand highest order word is subtracted from the second operand highest order word. The comparing of the first operand and the second operand is then based upon the Z flag status, if needed, after the subtraction of the first operand highest order word is subtracted from the second operand highest order word.
    Type: Grant
    Filed: May 3, 2001
    Date of Patent: May 25, 2004
    Assignee: Sun Microsystems, Inc.
    Inventor: Robert Griesemer
  • Patent number: 6741616
    Abstract: One embodiment of the present invention provides a system that facilitates asynchronously routing data within a circuit. This system includes a data destination horn, for routing data from a trunk line to a plurality of destinations. This data destination horn includes a plurality of one-to-many switching elements organized into a tree of at least one level that fans out from the trunk line to the plurality of destinations. It also includes a plurality of memory elements for storing data in transit between the plurality of one-to-many switching elements. An asynchronous control structure is coupled to the data destination horn, and is configured to control the propagation of data through the data destination horn, so that when a given data item appears at an input of a memory element, the given data item is asynchronously latched into the memory element as soon space becomes available in the memory element without having to wait for a clock signal.
    Type: Grant
    Filed: October 5, 2000
    Date of Patent: May 25, 2004
    Assignee: Sun Microsystems, Inc.
    Inventors: Ivan E. Sutherland, William S. Coates, Ian W. Jones
  • Patent number: 6741469
    Abstract: A refrigeration cooling assisted MEMS-based micro-channel cooling system that removes high heat densities generated by microelectronic components using a primary cooling system thermally coupled with a secondary chip embedded cooling system.
    Type: Grant
    Filed: February 7, 2003
    Date of Patent: May 25, 2004
    Assignee: Sun Microsystems, Inc.
    Inventor: Ali Heydari Monfarad
  • Patent number: 6742123
    Abstract: In one aspect of the invention, the frames of a thread stack that associated with the misbehaving code are popped from the thread stack. Exception handling code is allowed to execute for trusted code by popping the trusted code frame via processing an exception, but exception handling is not allowed to execute for untrusted code. In a second aspect, frames are popped on all thread stacks of all threads that are associated with the misbehaving code. Threads are generally deemed to be associated with the misbehaving code when the threads share a same object or the same resources as the thread that is associated with the misbehaving code.
    Type: Grant
    Filed: September 10, 1999
    Date of Patent: May 25, 2004
    Assignee: Sun Microsystems, Inc.
    Inventor: William F. Foote
  • Patent number: 6741113
    Abstract: Modified high-speed flip-flop include an evaluation window that is self-adjusting and data selective. Consequently, modified high-speed flip-flop circuits designed according to the invention include an evaluation window that can be longer when the data signal is a digital “1” and significantly shorter when the data signal is a digital “0”. Therefore, the evaluation window of the modified high-speed flip-flop circuits of the invention selectively varies according to the state of the data signal so there is minimal hold time, increased efficiency and no opportunity for the creation of a racing condition. Consequently, the modified high-speed flip-flops of the invention are more robust and more efficient than prior art flip-flops.
    Type: Grant
    Filed: January 31, 2003
    Date of Patent: May 25, 2004
    Assignee: Sun Microsystems, Inc.
    Inventors: Bo Tang, Edgardo F. Klass
  • Publication number: 20040095386
    Abstract: Techniques for accessing Java-based tools are disclosed. The Java tools provide a Graphical User Interface (GUI) which can be used to perform various operations in a Java computing environment. Typically, these operations are performed by a user with respect to one or more Java components. A Java programming interface is disclosed. The Java programming interface can be used to access the graphical user interface of a Java tool. As such, the Java programming interface can be used to simulate operations that can be performed using the GUI of the Java tool. This allows implementation of many programs for various applications. These applications, for example, include automated testing and tutorials for the GUI-based tools.
    Type: Application
    Filed: November 14, 2002
    Publication date: May 20, 2004
    Applicant: Sun Microsystems, Inc.
    Inventors: Martin D. Flynn, Chinmay S. Mehta
  • Publication number: 20040096063
    Abstract: The present invention uses a group key management scheme for admission control while enabling various conventional approaches toward establishing peer-to-peer security. Various embodiments of the invention can provide peer-to-peer confidentiality and authenticity, such that other parties, such as group members, can not understand communications not intended for them. A group key may be used in combination with known unicast security protocols to establish, implicitly or explicitly, proof of group membership together with bi-lateral secure communication.
    Type: Application
    Filed: November 19, 2002
    Publication date: May 20, 2004
    Applicant: Sun Microsystems, Inc.
    Inventors: Germano Carroni, Glenn C. Scott
  • Publication number: 20040098690
    Abstract: A method and apparatus is provided by which a die designer can efficiently evaluate package routings associated with a die connection bump layout of a die. The die designer is equipped to determine appropriate placement of die connection bumps around a periphery of the die, designate signal and power assignments for die connection bumps, and check routings between die connection bumps and associated package pins. The die designer can efficiently iterate, without recourse to a package designer, through numerous die connection bump placement and assignment configurations to develop a die connection bump layout that is routable within a package. Thus, time required for iteration between the die designer and the package designer to establish a proper placement and assignment of die connection bumps is substantially reduced. Also, as design variables and constraints change during a die design process, the die designer can efficiently re-evaluate a die-to-package interface without recourse to the package designer.
    Type: Application
    Filed: November 20, 2002
    Publication date: May 20, 2004
    Applicant: Sun Microsystems, Inc.
    Inventors: Mathew M. Joseph, Zuxu Qin
  • Publication number: 20040098730
    Abstract: Techniques for interpretation of DVD assembly language programs for television (TV) receivers operating in Java TV environments are provided. The techniques can be used to implement a Java-based command/control enabling system. The Java-based command/control enabling system can be implemented as a Java-based DVD assembly language interpreter which interacts with various modules including video, audio, graphics overlay, and remote control modules. As such, the Java-based command/control enabling systems can provide similar command/control functions as those provided by DVD systems.
    Type: Application
    Filed: November 20, 2002
    Publication date: May 20, 2004
    Applicant: Sun Microsystems, Inc.
    Inventors: William F. Foote, Jonathan D. Courtney
  • Patent number: 6738079
    Abstract: Graphical user interface and computer program products are disclosed for providing a unique user interface that allows a GUI developer significant flexibility and strength in designing a layout for an application user interface in a Java™ environment. This is done while keeping the process for the developer simple and efficient. The developer can “drag and drop” components from a palette to a container. Once in the container, the developer can specify row and column types and attachment/alignment options for the component. This can be done using a simple icon set. The developer can also dynamically add new rows and columns to the layout design. Adjustments to the position and size of a component are made automatically and numerous row and column types can be specified.
    Type: Grant
    Filed: June 2, 2000
    Date of Patent: May 18, 2004
    Assignee: Sun Microsystems, Inc.
    Inventors: Terry K. Kellerman, Harry S. Vertelney, Chris Ryan, Michael C. Albers, Tom J. Santos
  • Patent number: 6737844
    Abstract: A modulation circuit arranged to modulate a first voltage from a first power supply grid to produce a desired second voltage not greater than the first voltage on a second power supply grid is provided. A digital register is operatively connected to the modulation circuit to determine the desired second voltage on the second power supply grid. Furthermore, the digital register maintains a value representative of an activity level or an anticipated activity level of a circuit connected to the second power supply grid. The modulation circuit maintains the desired second voltage for the circuit connected to the second power supply grid by transferring charge between capacitances.
    Type: Grant
    Filed: May 28, 2002
    Date of Patent: May 18, 2004
    Assignee: Sun Microsystems, Inc.
    Inventors: Pradeep Trivedi, Sudhakar Bobba
  • Patent number: 6738415
    Abstract: A bi-directional communication system and transceiver configuration are described, which employ a bi-directional reference to account for both common-mode and differential noise introduced at either end of a bi-directional communication channel. Some implementations exploit the techniques described in a bi-directional chip-to-chip communication scheme. In some implementations, the advantages of bi-directional reference techniques described herein are obtained while pre-distortion of transmitted signals is employed to compensate for intersymbol interference (ISI) in a communications channel.
    Type: Grant
    Filed: March 22, 2001
    Date of Patent: May 18, 2004
    Assignee: Sun Microsystems, Inc.
    Inventors: Robert J. Drost, Robert J. Bosnyak