Abstract: A system that facilitates generating a global routing for a layout of an integrated circuit operates by receiving a netlist to be routed. The system partitions this netlist into global signals, datapath signals, and control signals. Next, the system creates a tiling grid of the integrated circuit and routes connection nets between tiles within this grid. The system then selects an area within the integrated circuit larger than a tile in the first grid. The system creates a second grid of tiles smaller than the tiles of the first grid within this selected area. During this process, connection nets are routed between tiles on the second grid while routings within the first grid are maintained. The system merges connection nets within the first grid with connection nets within the second grid to form the global routing.
Abstract: A method and apparatus are disclosed for accessing messages in a message store in a multi-threaded system with reduced contention by first determining whether a process is available for accepting a new connection and responsibility for that connection is transferred to that process, which includes one or more threads. One thread is selected and initialized which then manages client requests for accessing messages or data in the message store. The thread is terminated when a termination request is received or when a predetermined condition has been met. Also provided is a computer system for accessing messages in a message store in a multi-threaded environment with reduced contention. Clients are connected to a connection request router that contains a parent process for routing client requests for manipulating data. Also included are request handlers associated with the request router where the request handlers include a multiplicity of active connection threads.
Abstract: Method and apparatus for checking integrated circuit designs. In particular, one embodiment of the present invention is a method that for checking integrated circuit design files using (design rule check)/(electrical rule check) files (DRC/ERC files) wherein design objects are disposed on a grid having a system resolution, the method comprising steps of: (a) growing one or more rectangular boxes having at least two sides of length equal to the system resolution outward or inward from one or more of an edge of a design object and a side of a design object; (b) performing one or more of a spacing DRC/ERC check and an overlay DRC/ERC check; and (c) identifying checks relating to the rectangular boxes.
Abstract: A SSTL memory interface pre-driver stage that uses a voltage regulator to generate a ‘virtual’ supply is provided. The ‘virtual’ supply, being lower than a power supply voltage of the pre-driver stage, allows low voltage transistors to be used, thereby improving interface performance and decreasing system power consumption. The pre-driver stage uses a biasing circuit to bias the voltage regulator, formed by a transistor arranged in a source follower configuration, to generate the ‘virtual’ supply off which a voltage translator stage of the pre-driver stage operates to generate an output of the pre-driver stage.
Type:
Grant
Filed:
September 19, 2002
Date of Patent:
May 11, 2004
Assignee:
Sun Microsystems, Inc.
Inventors:
Brian W. Amick, Lynn Warriner, Claude R. Gauthier, Tri Tran
Abstract: A system and method for rapid processing of scene-graph-based data and/or programs is disclosed. In one embodiment, the system may be configured to utilize render molecules to more efficiently render objects. A render molecule is an object that defines the rest of the attribute settings for the geometries it contains. The attribute settings can include settings such as materials settings, the composite transform from the root of the scene graph to the objects contained in the render molecule.
Type:
Grant
Filed:
January 11, 2001
Date of Patent:
May 11, 2004
Assignee:
Sun Microsystems, Inc.
Inventors:
Henry Sowizral, Kevin Rushforth, Doug Twilleager
Abstract: A decoupling capacitor suitable for use with 0.11 micron or less, for example 0.09 micron, CMOS technology is provided herein. The decoupling capacitor includes a decoupling structure that minimizes leakage current associated with the decoupling capacitor.
Abstract: A method and computer graphics system capable of super-sampling and performing real-time convolution are disclosed. In one embodiment, the computer graphics system may comprise a graphics processor, a sample buffer, and a sample-to-pixel calculation unit. The graphics processor may be configured to generate a plurality of samples. The sample buffer, which is coupled to the graphics processor, may be configured to store the samples. The sample-to-pixel calculation unit is programmable to select a variable number of stored samples from the sample buffer to filter into an output pixel. The sample-to-pixel calculation unit performs the filter process in real-time, and may use a number of different filter types in a single frame. The sample buffer may be super-sampled, and the samples may be positioned according to a regular grid, a perturbed regular grid, or a stochastic grid.
Abstract: A system for implementing a power management system in a computer system using a constant time reference to support an operating system. The system uses a PCI clock signal and a CPU clock signal to generate the constant time reference such that the operating system uses the constant time reference when the power management system causes the computer system's CPU frequency to change or when the CPU frequency has changed. The power management system comprises of circuitry to interface between normal power management system operations with that of the operations used to support the operating system.
Abstract: One embodiment of the present invention provides a system that uses a destination address of a packet to perform a fast lookup to determine a service that is specified by the destination address. The system initially receives a packet at an interface node in the cluster of nodes. This packet includes a source address specifying a location of a client that the packet originated from, and the destination address specifying a service provided by the cluster of nodes. The system uses the destination address to perform a first lookup into a first lookup structure containing identifiers for scalable services. Note that a scalable service is a service that provides more server node capacity for the scalable service as demand for the scalable service increases. If no identifier for a scalable service is returned during the first lookup, the system sends the packet to a server node in the cluster of nodes that provides a non-scalable service.
Abstract: One embodiment of the present invention provides a system for forwarding a packet between nodes in a clustered computing system. The system operates by receiving the packet at an interface node in the clustered computing system. This packet includes a source address specifying a location of a client that the packet originated from, and a destination address specifying a service provided by the clustered computing system. The system selects a server node in the clustered computing system to send the packet to from a plurality of server nodes that are able to provide the service. Next, the system forwards the packet to the server node so that the server node can provide the service to the client by, attaching a transport header to the packet, the transport header containing an address of the server node, and sending the packet to the server node through an interface. This interface is used for communications between the interface node and other nodes in the clustered computing system.
Abstract: One embodiment of the present invention provides a system that uses a centralized server to coordinate assigning identifiers in a distributed computing system. The system operates by receiving a request for a block of identifiers at the centralized server from a requesting node in the distributed computing system. In response to this request, the system selects a block of identifiers from a global pool of identifiers, and then marks the global pool of identifiers to indicate that the selected block of identifiers has been assigned. The system sends the selected block of identifiers to the requesting node in order to allow the requesting node to assign identifiers from the selected block of identifiers without having to communicate with the centralized server.
Abstract: A method of manipulation of data information trees, and software and systems therefore, allow the mapping of information models for support of markup-oriented registry services. For example, a first business entity may provide a service. Service information regarding the service is stored in a hierarchical directory information tree at a node corresponding to the business entity. Another business entity may desire to provide the service of the first business entity. Service projection information regarding the service offered by the first entity is stored in a hierarchical directory information tree at a node corresponding to the second business entity.
Abstract: An enclosure to control access to a selected portion of an enclosed electronic device is provided. The enclosure includes a plurality of access panels that are capable of being fastened in a secure position via a single fastener mechanism. The fastener mechanism is operable by an authorized individual. The fastener mechanism controls when each of the plurality of faceplates can be disengaged from the enclosure to access a portion of the electronic device.
Type:
Application
Filed:
October 31, 2002
Publication date:
May 6, 2004
Applicant:
Sun Microsystems, Inc.
Inventors:
Yvetta D. Pols Sandhu, Andrew P. Tosh, William A. Izzicupo
Abstract: Devices, methods, and networks that divide and proportionally distribute the drive strength of a clock buffer such that the output drive strength of the clock buffer is divided proportionally among a plurality of outputs from the clock buffer. In one embodiment, the present invention selectively couples adjacent parallel inverters present in a clock buffer, to separate, internal distribution wires. The internal distribution wires are selectively coupled to one or more outputs by a connector wire to provide proportional, multiple outputs of the drive strength from the clock buffer to a clock network.
Type:
Application
Filed:
November 4, 2002
Publication date:
May 6, 2004
Applicant:
Sun Microsystems, Inc.
Inventors:
David Hogenmiller, Harsh Sharma, Shervin Hojat
Abstract: An invention is provided for displaying two-dimensional data on small screen devices. The invention includes providing a first data set display section on a screen, which is capable of presenting a list of entries in a first data set. In addition, a second data set display section is provided on the screen. The second data set display section is capable of presenting a particular entry from a second data set associated with a selected entry from the first data set. In operation, a new entry from the second data set is presented in the second data set display section in response to receiving a navigation command related to the second data set. The new entry is associated with the selected entry from the first data set.
Abstract: An invention is provided for presenting time related data on small screen devices is disclosed. The invention includes examining a plurality of time related data entries to obtain a start time and an end time for each time related data entry, and generating a time bar based on the time related data. The time bar includes a plurality of pixels, wherein a predefined block of pixels represents a particular period of time. The time bar also includes a plurality of indicia, such as hour numbers, indicating a plurality of times. The start time and the end time of each time related data entry are correlated to pixels on the time bar, and an intensity of pixels on the time bar between the start time and the end time of each time related data entry is changed.
Abstract: A system and method of adjusting a sense amplifier includes providing an amplification control parameter to the sense amplifier. A temperature of the sense amplifier is monitored and the amplification control parameter to the sense amplifier is adjusted according to the temperature of the sense amplifier.
Type:
Application
Filed:
October 31, 2002
Publication date:
May 6, 2004
Applicant:
Sun Microsystems, Inc
Inventors:
Claude R. Gauthier, Shaishav A. Desai, Raymond Heald
Abstract: An integrated circuit may include several components, one or more interfaces, an interconnect (e.g., a bus), and a controller. The components may each be configured to assert a read request to read data stored externally to the integrated circuit. The interfaces may be configured to output the read request asserted by one of the components and to receive data in response to outputting the request. The interconnect may be coupled to perform one or more data transactions to transmit the data from one of the interfaces to one or more of the components. In response to the read request asserted by one of the components, the controller may inhibit performance of a read transaction initiated by the read request dependent upon a comparison of a total number of outstanding data transactions to a maximum allowable number of outstanding data transactions.
Type:
Grant
Filed:
March 6, 2002
Date of Patent:
May 4, 2004
Assignee:
Sun Microsystems, Inc.
Inventors:
Wayne Eric Burk, Ewa M. Kubalska, Brian D. Emberling
Abstract: The present invention provides methods and systems for providing distributed parties reciprocal information regarding each other's activities. For example, the method of the invention provides selected information regarding the availability of an intended recipient to engage in a communication session with an initiator, and reciprocally informs the intended recipient of the initiator's access to such information. Further, the method of the invention can provide a signal to an intended recipient to indicate an initiator's intention to establish a communication session. Further, the method of the invention provides a signal to each party to indicate whether a communication session has been established. In another aspect, the invention provides a method for informing the participants in a communication session of a party's intention to terminate its participation in the session.
Type:
Grant
Filed:
March 9, 2000
Date of Patent:
May 4, 2004
Assignee:
Sun Microsystems, Inc.
Inventors:
John C. Tang, Nicole Y. Mordecai, James M. A. Begole, Janak R. Bhalodia, Max G. Van Kleek
Abstract: A computer system includes memory and at least a first processor that includes a memory management unit. The memory management unit includes a translation table having a plurality of translation table entries for translating processor addresses to memory addresses. The translation table entries provide first and second memory address translations for a processor address. The memory management unit can enable either the first translation or the second translation to be used in response to a processor address to enable data to be written simultaneously to different memories or parts of a memory. A first translation addresses could be for a first memory and a second translation addresses could be for a second backup memory. The backup memory could then be used in the event of a fault.