Abstract: One embodiment of the present invention provides a system that facilitates routing nets between cells in a circuit layout. During operation, the system receives a circuit design to be routed, wherein the circuit design includes multiple circuit blocks that have been placed at specific locations within the circuit layout. Next, the system determines estimated lengths for nets that couple these circuit blocks together. The system then calculates the delay for the nets that couple the circuit blocks using a class one rule. If the delay in a given net is greater than a specified delay, the system inserts a virtual repeater into the given net to decrease the delay.

Abstract: A bi-directional communication system and transceiver configuration are described, which employ a bi-directional reference to account for both common-mode and differential noise introduced at either end of a bi-directional communication channel. Some implementations exploit the techniques described in a bi-directional chip-to-chip communication scheme. In some implementations, the advantages of bi-directional reference techniques described herein are obtained while pre-distortion of transmitted signals is employed to compensate for intersymbol interference (ISI) in a communications channel.

Abstract: A distributed system of gateways for establishing telephone communication connections between digital telephone service (e.g., DSL) subscribers and analog subscribers. A DSL subscriber's telephone connection includes digital and analog channels. In one method of operating the system, when a DSL subscriber initiates a telephone call to a party that is not a subscriber to the same service, the call is routed through a DSL Access Multiplexer to a digital network. A portal or directory server on the digital network determines that the called party is not a subscriber and therefore locates a “pass-through” subscriber served by the same central office as the called party. The portal routes the call to the pass-through subscriber, where the call is transferred from the digital channel of the subscriber's DSL connection to the analog channel. It is then directed back to the central office and switched over the local loop to the called party.

Abstract: A modulation circuit arranged to modulate a first voltage from a first power supply grid to produce a desired second voltage not greater than the first voltage on a second power supply grid is provided. A digital register is operatively connected to the modulation circuit to determine the desired second voltage on the second power supply grid. Furthermore, the digital register maintains a value representative of an activity level or an anticipated activity level of a circuit connected to the second power supply grid. The modulation circuit maintains the desired second voltage for the circuit connected to the second power supply grid by transferring charge between capacitances.

Abstract: Methods and apparatus for a cooperative processing of a task in a multi-threaded computing system are disclosed. In one aspect of the invention, a first thread is arranged to receive a task and only partially process the task. During its processing, the first thread stores processing information that is relevant to future processing in a packet that is associated with the task. Upon completing its processing, the first thread designates a second thread as the owner of the packet. After the second thread obtains ownership of the packet it then further processes the task based at least in part upon the processing information stored in the packet by the first thread. With the described arrangement no synchronization primitives are required for the threads to cooperate in processing the task.

Abstract: One embodiment of the present invention provides a system for recovering a process that is multi-threaded from checkpoint information that was previously stored for the process. During a recovery operation, the system first retrieves the checkpoint information for the process. Next, the system extracts an identifier for a program being run by the process as well as parameters of the program from the checkpoint information. The system also extracts thread identifiers for threads associated with the process from the checkpoint information. Next, the system modifies the program so that executing the program will cause threads associated with the process to be restored. The system then creates a replacement process to replace the process, and causes the replacement process to execute the modified program so that the threads are reconstituted within the replacement process.

Abstract: Provided are a method and a system to distribute clock signals in digital circuits to ensure that the multiple clock signals reach multiple loads associated with the digital circuit, concurrently. To that end, an off-chip set of clock paths, which includes one or more clock buffers, are connected between two sets of clock paths on an integrated digital circuit. The multiple clock signals are routed to the off-chip set of clock paths to reduce, or remove, propagational delay in multiple clock signals that arise from the propagation of the same through the on-chip clock paths. This is achieved by the clock paths of the off-chip set of clock paths having differing resistivities, differing lengths or both.

Abstract: One embodiment of the present invention provides a system for compacting memory within a computing device, wherein the computing device supports transient objects, having a persistent portion stored in a writeable non-volatile memory, and a transient portion stored in a volatile memory. During the compaction process, the system resets the volatile memory so that information in the volatile memory is deleted. Next, the system scans through a list of objects. For each transient object encountered in the list of objects, the system allocates space for the transient object in the volatile memory. The system also updates the persistent portion of the transient object, if necessary, to specify a new location in volatile memory for the transient portion of the transient object.

Abstract: One embodiment of the present invention provides a system that gathers code usage information to facilitate removing compiled code that has not been recently used. This method operates in a mixed-mode system that supports execution of both compiled code and interpreter code. During operation, the system gathers usage information for compiled methods within an application while the application is executing. Next, the system identifies compiled methods to be removed based on this usage information, and removes identified compiled methods so that interpreter code is executed for the compiled methods instead of compiled code. In this way, the system frees up the memory space used to store the compiled methods.

Abstract: One embodiment of the present invention provides a system for detecting a valid clock signal at a clock receiver. The system operates by receiving a clock signal at the clock receiver, and directing the clock signal into a control input of a voltage-controlled variable resistor. Next, the system uses the voltage-controlled variable resistor to control a first current. A current mirror is then employed to create a second current from the first current. This second current passes through a resistor to produce a control voltage, which is amplified to produce a validity signal indicating whether or not the clock signal is valid. In one embodiment of the present invention, the system additionally uses at least one capacitor to filter out periodic fluctuations in the validity signal.

Abstract: Clocked full-rail differential logic circuits are provided with shut-off devices. The addition of the shut-off device provides a full-rail differential logic circuit with shut-off that does not experience the large pre-charge high or “dip” experienced by prior art full-rail differential logic circuits and is therefore more power efficient. In addition, the present invention provides a full-rail differential logic circuit with shut-off that is more resistant to noise than prior art full-rail differential logic circuits.

Abstract: The present invention provides a method and apparatus for configuration using a portable electronic configuration device. The portable device is attached to an unconfigured electronic device. The portable device causes the unconfigured device to send configuration data to a coupled device. The coupled device uses the data to configure the unconfigured device.

Abstract: A circuit package and a method of forming the same that facilitates control of the impedance of a driving circuit employing resistive vias formed into a dielectric substrate.

Abstract: An apparatus and method for enabling hot swapped circuit boards to receive multiple power voltages from a backplane and supply the multiple power voltages to devices on the circuit board in a predictable sequence. An apparatus according to the invention would include a circuit board having an electrical connector, a sequencing circuit, and an element. The electrical connector of the circuit board receives the multiple power voltages from another circuit board, such as a backplane or motherboard. The sequencing circuit receives the multiple power voltages from the electrical connector. When a part of the sequencing circuit receives a signal indicating that the sequencing circuit has received a first power voltage, the sequencing circuit provides a second power voltage to the element electrically coupled to the sequencing circuit.

Abstract: A method for submitting a bug report utilizes a bug submission module to request a bug submission service from a first support host using a Support Interface Module for communicating with the first support host. The bug submission service includes a list of data to be collected and the return address of a second support host. The first support host also includes a support services resource. The bug submission module receives the requested bug submission service from the first support host using the Support Interface Module and collects data based on the list of data to be collected. The bug submission module then sends the collected data to the return address of second support host using the Support Interface Module.

Abstract: Methods and systems consistent with the present invention provide a mechanism for accepting extended amounts of data in a layered network protocol. The methods and systems thus allow the network protocol to more efficiently receive data and forward the data to the correct entity. As a result, the programs experience greater network data throughput. The methods and systems may be implemented in widely accepted Internet Protocol (IP) and Transmission Control Protocol (TCP) networks.

Abstract: An object-oriented compiler/interpreter allocates monitor records for use in implementing synchronized operations on objects. When a synchronization operation is to be performed on an object, a thread that is to perform the operation “inflates” the object's monitor by placing into its header a pointer to the monitor record as well as an indication of the monitor's inflated status. When a thread is to release its lock on an object, it first consults a reference-count field in the monitor record to determine whether any other threads are synchronized on the object. It then dissociates the object from the monitor record. The dissociation is not atomic with the reference-count check, so the releasing thread checks the reference count again. If that count indicates that further objects had employed the monitor record to synchronize on the object in the interim, then the unlocking thread wakes all waiting threads.

Abstract: An eyetracker is used to control power to an electrical device such as a computer display screen so that power consumption is reduced when a user's eyes and therefore a user's attention are not directed to the device. A motion detector activates a proximity detector and/or an IR detector to ensure that power is applied only when a user is actually present.

Abstract: A computer system including a first repeater; a second repeater coupled to the first repeater; and a third repeater coupled to the first repeater. The second repeater is also coupled to a first client and a second client. The second repeater contains a distributed arbiter that predicts whether the first repeater will send a transaction to the second repeater.

Abstract: One embodiment of the present invention provides a system for deleting objects from a memory in a computing device, wherein the memory includes both a volatile memory and a non-volatile memory that is writeable. During operation, the system receives a request to perform an object deletion operation, which locates and deletes unused objects from the memory. In response to this request, the system performs the object deletion operation by first performing a marking operation that marks objects that are reachable in the non-volatile memory. This marking operation does not directly mark the objects in the non-volatile memory, but instead marks data values in the volatile memory that are associated with the objects. In this way, unnecessary write operations to non-volatile memory are avoided. Next, the system performs a sweep operation that deletes unmarked objects from the non-volatile memory.