Patents Assigned to Sun Microsystems
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Publication number: 20030225928Abstract: Provided are a method, system, and program for managing access to at least one device coupled to a computer system. A set of operating specific functions perform operating system related operations related to managing access to the at least one device. A set of device specific functions performs operations that interact with the device. The operating system specific functions and device specific functions are loaded into memory. Pointers to the operating system specific functions and device specific functions in memory are added to at least one function pointer list accessible to a device specific module and operating system module executing in the computer system. The device specific module and the operating system specific module access the pointers in the function pointer list to call the operating system specific functions and device specific functions.Type: ApplicationFiled: May 28, 2002Publication date: December 4, 2003Applicant: Sun Microsystems, Inc.Inventor: Stephen D. Paul
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Patent number: 6658632Abstract: An electrical circuit includes a flip-flop, a first multiplexer, a second flip-flop, a third flip-flop, and output storage element including a second multiplexer and a fourth flip-flop. The first flip-flop, clocked functional clock signal, receives a functional signal. The first multiplexer receives the output of the first flip-flop and a test mode shift-in signal, and outputs one of them based on the state of a select input. The second flip-flop, clocked by a test clock signal, receives the output of the first multiplexer. The third flip-flop, clocked by a second test clock signal, receives the output of the second flip-flop. The second multiplexer receives the functional signal and the output of the third flip-flop, and outputs one of them based on a mode select input signal. The fourth flip-flop, clocked by a pulse-controlled functional clock signal, receives the output of the second multiplexer.Type: GrantFiled: June 15, 2000Date of Patent: December 2, 2003Assignee: Sun Microsystems, Inc.Inventors: Ishwardutt Parulkar, Sridhar Narayanan
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Patent number: 6658451Abstract: One embodiment of the present invention provides a system that supports space and time dimensional program execution by performing a parallel join operation to merge state created during speculative execution into the non-speculative state of a program. The system executes a program using a head thread that operates on primary versions of memory elements and accesses a primary version of a stack. The system also executes the program using a speculative thread that speculatively executes program instructions in advance of the head thread while the head thread is executing. This speculative thread operates on space-time dimensioned versions of the memory elements and accesses a speculative version of the stack. The system performs a join operation between the head thread and the speculative thread when the head thread reaches a point in the program where the speculative thread began executing.Type: GrantFiled: October 15, 1999Date of Patent: December 2, 2003Assignee: Sun Microsystems, Inc.Inventors: Shailender Chaudhry, Marc Tremblay
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Patent number: 6658565Abstract: A system efficiently distributes processing-intensive loads among a plurality of intermediate stations in a computer internetwork. The intermediate stations include routers, bridges, switches and/or firewalls configured with monitoring and filtering agents that communicate via a defined protocol to implement the system. Those stations configured with agents and having available resources cooperate to execute the loads which generally comprise verification operations on digital signatures appended to frame and/or packet traffic traversing paths of the computer internetwork. Techniques associated with the system are directed to efficiently detecting and filtering unauthorized traffic over portions of the internetwork protected as trust domains as well as unprotected portions of the internetwork.Type: GrantFiled: June 1, 1998Date of Patent: December 2, 2003Assignee: Sun Microsystems, Inc.Inventors: Amit Gupta, Radia Joy Perlman, Dah-Ming Chiu
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Patent number: 6658587Abstract: Method for emulating persistent group reservations on non persistent group reservation-compliant devices, apparatus to perform the method, and computer-readable storage medium containing instructions to perform the method. The present invention enables the emulation of persistent group reservations on a non persistent group reservation-compliant device, including a shared disk, to enable the disk's implementation of persistent group reservation-reliant algorithms. This in turn enables the implementation of algorithms based on persistent group reservation features substantially without modification of those algorithms. One such algorithm is a quorum algorithm. One example of persistent group reservations is found in the SCSI-3 standard. The present invention accomplishes persistent group reservation emulation, or PGRE, by storing host- and reservation-specific information on a reserved portion of the disk and using this data to emulate the steps of certain persistent group reservation features.Type: GrantFiled: January 10, 2000Date of Patent: December 2, 2003Assignee: Sun Microsystems, Inc.Inventors: Ira Pramanick, Declan J. Murphy, Krishna K. Kumar, Siamak Nazari, Andrew L. Hisgen
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Patent number: 6658473Abstract: The present invention provides a method and apparatus for distributing load in a multiple server computer environment. In one embodiment, a group manager process on each server periodically determines the server's capacity and load (i.e., utilization) with respect to multiple resources. The capacity and load information is broadcast to the other servers in the group, so that each server has a global view of every server's capacity and current load. When a given terminal authenticates to a server to start or resume one or more sessions, the group manager process of that server first determines whether one of the servers in the group already is hosting a session for that user. If that is the case, one embodiment of the present invention redirects the desktop unit to that server and the load-balancing strategy is not employed. Otherwise, for each resource and server, the proper load balancing strategies are performed to identify which server is best able to handle that particular session.Type: GrantFiled: February 25, 2000Date of Patent: December 2, 2003Assignee: Sun Microsystems, Inc.Inventors: Robert J. Block, James G. Hanko, J. Kent Peacock
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Patent number: 6658420Abstract: Method and system for configuring a network computer to distinguish between a first address path for a first logging module and a second address path for a second logging module for a log report, using full distinguished names (FDNs) that provide first and second address paths for the first and second logging modules, where the first and second address paths have different object level addresses at an object level immediately below the root level. Where a local distinguished name (LDN) (or relative distinguished name RDN) is used for an address path, the system forwards a log report to an associated Log Server only if the first component of the address path is a selected object level address, such as ‘/system’.Type: GrantFiled: June 11, 1999Date of Patent: December 2, 2003Assignee: Sun Microsystems, Inc.Inventors: John P. Brinnand, Rajeev Angal, Balaji V. Pagadala
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Patent number: 6658443Abstract: One embodiment of the present invention provides a system for representing intervals within a computer system to facilitate efficient and sharp arithmetic interval operations. The system operates by receiving a representation of two intervals. These representations include a first floating-point number representing a first endpoint of the interval and a second floating-point number representing a second endpoint of the interval. Next, the system performs an interval arithmetic operation using the interval operands to produce an interval result. In performing this arithmetic operation, if the first endpoint is negative infinity and the second endpoint is finite, the system treats the first endpoint as a negative overflow toward negative infinity. On the other hand, if the second endpoint is positive infinity and the first endpoint is finite, the system treats the first endpoint as a positive overflow toward positive infinity.Type: GrantFiled: August 1, 2000Date of Patent: December 2, 2003Assignee: Sun Microsystems, Inc.Inventor: G. William Walster
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Patent number: 6658004Abstract: A method and apparatus for identifying a data message that is eligible for discard. A beacon node periodically transmits a beacon message to a plurality of client nodes communicatively coupled via a network. Each beacon message includes a beacon sequence number and preferably, the beacon sequence numbers are authenticated by the beacon, node. The client nodes, upon receipt of the beacon messages, verify the authenticity of the respective received beacon sequence numbers and generate a local sequence number derived from the received beacon sequence number. When one client in the session has data to transmit to another client in the session, the sending client assembles a data message and inserts its local sequence number in the data message prior to transmission of the data message to the other client nodes in the session.Type: GrantFiled: December 28, 1999Date of Patent: December 2, 2003Assignee: Sun Microsystems, Inc.Inventors: Miriam C. Kadansky, Dah Ming Chiu, Stephen R. Hanna, Stephen A. Hurst, Radia J. Perlman, Joseph S. Wesley
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Patent number: 6658530Abstract: A high-performance memory module. The memory module is designed for a computer system with a wide data path. The memory module is implemented using a small printed circuit board (PCB), with a plurality of memory chips and a connector mounted upon the PCB. Signal traces for control, address, and data signals are arranged in such a manner as to minimize the length of each signal trace, thereby saving PCB area. On the connector, an electrical ground pin is located between each pair of signal pins, which may allow for a low-resistance return current path, and may therefore allow the module to operate at higher clock frequencies. Furthermore, locating a ground pin between each pair of signal pins may help reduce signal interference, or “crosstalk”, thereby improving signal integrity of the memory module.Type: GrantFiled: October 12, 2000Date of Patent: December 2, 2003Assignee: Sun Microsystems, Inc.Inventors: William L. Robertson, Drew G. Doblar, Steven C. Krow-Lucal
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Patent number: 6658662Abstract: A broadcast video signal is captured on user command and processed to identify network addresses contain therein. Network addresses are stored together with information about the program during which they originated. Identified network addresses are accessed over the network to validate their correctness and a snapshot of the page displayed is stored and related to the network address. An HTML file is constructed showing the original image from which the HTML file was constructed, the address(es) extracted from the original image as hypertext lines and snapshots of the corresponding images. By viewing the HTML file, a user can quickly determine if he wishes to retrieve information from the network addresses and can do so by clicking in the hypertext links.Type: GrantFiled: June 30, 1997Date of Patent: December 2, 2003Assignee: Sun Microsystems, Inc.Inventor: Jakob Nielsen
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Patent number: 6655917Abstract: The present invention provides a method and apparatus for serial coolant flow control. In one embodiment of the present invention, two or more sets of angled rotating blades are used in series to increase the coolant pressure and flow. In this embodiment, the rotational direction of a set of blades is the reverse of the rotational direction of any set of blades next to it. In one embodiment, the angles of the blades are such that the forward velocity created by a set of blades is in the same direction as forward velocities created by other sets of blades in the system. In one embodiment, the blades of one set form a right angle with the blades of any set next to it. In one embodiment, the coolant flow controller is a fan. In another embodiment, the coolant is air. In yet another embodiment, the system being cooled is an electronic system.Type: GrantFiled: October 17, 2000Date of Patent: December 2, 2003Assignee: Sun Microsystems, Inc.Inventors: Mario J. Lee, Anthony N. Eberhardt
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Patent number: 6658492Abstract: A method and system that reduces the space allocated for internal data structures by a runtime engine. The internal data structures store member information for preloaded classes used by applications executed by the runtime engine. The system determines the different types of internal data structures represented in the classes and identifies thee possible values of each type's members. The system next determines the amount of space required to store the values for each type in a respective value table and the number of bits needed to index each entry of that table. The system determines based on the stored information whether occurrences of a member are optimally represented as a set of value table indices and a value table or, in the conventional manner, as a general variable that stores the member's value for each occurrence. The system then emits appropriate information for the member and its parent data structure.Type: GrantFiled: March 20, 1998Date of Patent: December 2, 2003Assignee: Sun Microsystems, Inc.Inventors: Hideya Kawahara, Nedim Fresko
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Patent number: 6658061Abstract: A method for receiving data from a sending system in a receiving system includes receiving a pair of differential clock signals from the sending system, determining a reference voltage in the receiving system in response to the pair of differential clock signals, receiving a test data signal from the sending system, adjusting the reference voltage to form an updated reference voltage in response to the test data signal, receiving a single-ended data signal from the sending system relative to a reference voltage and determining a data signal in response to the single-ended data signal and to the updated reference voltage.Type: GrantFiled: December 19, 2001Date of Patent: December 2, 2003Assignee: Sun Microsystems, Inc.Inventor: Aninda Roy
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Patent number: 6658629Abstract: A technique for optimizing decoupling capacitance on an integrated circuit while meeting leakage power constraints of the integrated circuit is provided. The technique involves the formulation of a linear optimization problem using physical characteristics and constraints of the integrated circuit, where a linear solution to the linear optimization problem yields an optimal decoupling capacitance presence on the integrated circuit.Type: GrantFiled: May 9, 2002Date of Patent: December 2, 2003Assignee: Sun Microsystems, Inc.Inventors: Sudhakar Bobba, Pradeep Trivedi, Tyler Thorp
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Patent number: 6658479Abstract: A method for determining the cost of routing data is described herein, where a communication cost for routing data from a current node to a successor node over a communication channel is computed, and then a processing node cost for processing data at the current node is computed, where the processing node cost represents a ratio of data input rates to data output rates at the current node. The two computations are combined to formulate a link cost for the current node, or the cost of routing data through that node. The link cost can then be used in a routing algorithm for routing data.Type: GrantFiled: June 30, 2000Date of Patent: December 2, 2003Assignee: Sun Microsystems, Inc.Inventors: William T. Zaumen, Jose J. Garcia-Luna-Aceves
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Patent number: 6658444Abstract: One embodiment of the present invention provides a system for performing a division operation between arithmetic intervals within a computer system. The system operates by receiving interval operands, including a first interval and a second interval, wherein the first interval is to be divided by the second interval to produce a resulting interval. Next, the system uses the operand values to create a mask. The system uses this mask to perform a multi-way branch, so that an execution flow of a program performing the division operation is directed to code that is tailored to compute the resulting interval for specific relationships between the interval operands and zero. In one embodiment of the present invention, creating the mask additionally involves, determining whether the first and/or second intervals are empty, and modifying the mask so that the multi-way branch directs the execution flow of the program to the appropriate code for this case.Type: GrantFiled: November 9, 2000Date of Patent: December 2, 2003Assignee: Sun Microsystems, Inc.Inventors: G. William Walster, Dmitri Chiriaev
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Publication number: 20030221051Abstract: Provided are a computer implemented method, system, and program for accessing information on a device. A first and second buffers are generated in a computer readable medium. The first buffer is indicated as a read buffer. Property values are returned from the buffer indicated as the read buffer in response to requests for property values for the device. The second buffer is indicated as a refresh buffer. Updates to the property values accessed from the device are written to the buffer indicated as the refresh buffer.Type: ApplicationFiled: May 21, 2002Publication date: November 27, 2003Applicant: Sun Microsystems, Inc.Inventors: Steven G. Hand, Arieh Markel, Deborah Peterson, Kristina A. Tripp
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Publication number: 20030221089Abstract: Embodiments of the present invention provide a method and structure for performing data element manipulation and preprocessing on a microprocessor architecture that supports Single Instruction Multiple Data (SIMD) operations. According to the principles of the present invention, a microprocessor data manipulation matrix module provides inherent data manipulation functionality to SIMD instructions. The data manipulation matrix module permits SIMD instructions themselves to direct and manage any necessary operand data element preprocessing, such as data element alignment. By the present invention, separate SIMD data element manipulation of the prior art is superfluous.Type: ApplicationFiled: May 23, 2002Publication date: November 27, 2003Applicant: Sun Microsystems, Inc.Inventor: Lawrence Spracklen
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Publication number: 20030221190Abstract: A system and method of simultaneously installing a software patch or patches on multiple electronic devices is disclosed. The illustrative embodiment of the present invention provides a method of simultaneously installing a software patch on multiple electronic devices. The user selects the target devices upon which to install a patch or patches. One of the target devices is selected as a “reference device”. The other target devices are validated against the reference device to ensure uniformity of attributes prior to attempting the patch installation. The validation process compares the architecture, operating system (OS) and target application attribute of the target devices to those on the reference device. After the reference device has been validated, patch dependencies on the reference device are programmatically checked to ensure that software required for the patch is present on the reference device (which has the same software found on the other validated devices).Type: ApplicationFiled: August 15, 2002Publication date: November 27, 2003Applicant: Sun Microsystems, Inc.Inventors: Alka K. Deshpande, Gerald J. Hanam