Patents Assigned to Sun Microsystems
  • Patent number: 6665842
    Abstract: When retrieving documents over a network, such as the Internet, the font size imposed by default or by a style sheet is sometimes not the right size for comfortable viewing by a user. A database of font size changes made by a user to particular documents is maintained and used to infer a font size preference for a document. A document is displayed using a recorded preference. If no preference is found for a document, a check is made to determine if a preference has been specified for a different document related to that document by having a common portion of a network address. That is, if a preference had been specified for one chapter of a document having a particular network address, a preference would be inferred for other chapters of the document based on a common portion of a hierarchical address.
    Type: Grant
    Filed: February 26, 2001
    Date of Patent: December 16, 2003
    Assignee: Sun Microsystems, Inc.
    Inventor: Jakob Nielsen
  • Patent number: 6665845
    Abstract: A tool for computing noise coupled onto victim lines from aggressor lines of an integrated circuit has code for traversing a victim line of the integrated circuit layout to measure its length, its average width, a coupling length, and a harmonic mean of spacing between the victim line and aggressor lines. The tool has code for computing a resistance, estimated coupling capacitance, and total capacitance of the victim line from these parameters.
    Type: Grant
    Filed: March 19, 2001
    Date of Patent: December 16, 2003
    Assignee: Sun Microsystems, Inc.
    Inventors: Kathirqamar Aingaran, Stephan Hoerold, Manjunath Haritsa, Farn Wang
  • Patent number: 6664850
    Abstract: A method for reducing delay variability in a differential receiver includes receiving a plurality of differential input signals, determining a first transition delay time of an output in response to the plurality of differential input signals, determining a second transition delay time of the output in response to the plurality of differential input signals, and modifying capacitance coupled to the output in response to the first transition delay time and to the second transition delay time.
    Type: Grant
    Filed: December 19, 2001
    Date of Patent: December 16, 2003
    Assignee: Sun Microsystems, Inc.
    Inventor: Aninda Roy
  • Patent number: 6664974
    Abstract: A method for automatically determining whether a browser supports scalable vector graphics (“SVG”). The method uses a two prong process to make a proper detection for various types of browsers. The method includes using JavaScript to detect Multipurpose Internet Mail Extensions (“MIME”) types from the browser to detect SVG support. If scanning of the MIME types detects that SVG support is present, the requested web page containing SVG content is sent. If no SVG support is detected, the non-SVG version of the web page is sent to the browser. If the browser does not return a list of MIME types, the method of Visual Basic Scripting Edition language (“VBScript”) to instruct the browser to create an SVG object on the client device. If the object is created, SVG support has been detected, and the browser is served the web page having SVG content.
    Type: Grant
    Filed: December 26, 2000
    Date of Patent: December 16, 2003
    Assignee: Sun Microsystems, Inc.
    Inventor: Ana M. Lindstrom-Tamer
  • Patent number: 6664955
    Abstract: A method and computer graphics system capable of super-sampling and performing real-time convolution are disclosed. In one embodiment, the computer graphics system may comprise a graphics processor, a sample buffer, and a sample-to-pixel calculation unit. The graphics processor may be configured to generate a plurality of samples. The sample buffer, which is coupled to the graphics processor, may be configured to store the samples. The sample-to-pixel calculation unit is programmable to generate a first subset of pixels by filtering using the rendered samples and a second subset of the output pixels by interpolating using the first subset of pixels and/or the rendered samples. By interpolating a subset of the output pixels, the graphics system may be able to operate at higher resolutions and/or refresh rates since filtering of the samples is computationally intensive.
    Type: Grant
    Filed: March 15, 2000
    Date of Patent: December 16, 2003
    Assignee: Sun Microsystems, Inc.
    Inventor: Michael F. Deering
  • Patent number: 6664608
    Abstract: A plurality of p-wells and n-wells are formed in a front side of a bulk material, and a plurality of n layers and p layers are alternately formed within the bulk material between a back side of the bulk material and the plurality of n-wells and p-wells. The plurality of n layers are electrically isolated from one another and respectively route different potentials to selected ones of the plurality of n-wells, and likewise, the plurality of p layers are electrically isolated from one another and respectively route different potentials to selected ones of the plurality of p-wells.
    Type: Grant
    Filed: November 30, 2001
    Date of Patent: December 16, 2003
    Assignee: Sun Microsystems, Inc.
    Inventor: James B. Burr
  • Patent number: 6665796
    Abstract: A CPU executes program instructions which result in valid and invalid intermediate results. By selecting the desired intermediate results, a program is able to be successfully executed. Analysis of the intermediate results must avoid plausible wrong results. A programmable feature allows the instruction decoder to provide plural answers, including plausible wrong answers. Instruction output selection logic selects a predetermined buffer, and this permits further microprocessor operation with the correct intermediate result.
    Type: Grant
    Filed: August 18, 1999
    Date of Patent: December 16, 2003
    Assignee: Sun Microsystems, Inc.
    Inventor: Alan Folmsbee
  • Patent number: 6665747
    Abstract: One embodiment of the present invention provides a system for processing a request directed to a secondary storage system. The system operates by receiving the request at an interface of the secondary storage system. This request specifies an operation to be performed on the secondary storage system, a location within the secondary storage system to which the request is directed, and an address of a target buffer located outside of the secondary storage system for holding data involved in the request. Next, the system processes the request by transferring data between the location within the secondary storage system and the target buffer located outside of the secondary storage system. If the target buffer is located within a page cache, processing the request involves communicating with the target buffer located within the page cache.
    Type: Grant
    Filed: October 10, 2000
    Date of Patent: December 16, 2003
    Assignee: Sun Microsystems, Inc.
    Inventor: Siamak Nazari
  • Patent number: 6665704
    Abstract: A proxy server containing a cache for retrieving information from a server and transmitting this information to multiple concurrent clients. A thread is created for each client requesting the information from the server. As long as information is contained in the cache, all the threads assume the role of a consumer thread by retrieving this information from the cache and placing it in an output stream to be sent to the client associated with each consumer thread. When one of the threads reaches the end of the information contained in the cache, it assumes the role of a producer to send a request to the server to retrieve additional information. When the producer thread receives the information from the server, it places it in an input stream for the cache. The producer thread then reverts back to a consumer thread to retrieve this information for its associated client. All other consumer threads may also retrieve this data from the cache.
    Type: Grant
    Filed: June 18, 1999
    Date of Patent: December 16, 2003
    Assignee: Sun Microsystems, Inc.
    Inventor: Inderjeet Singh
  • Patent number: 6665852
    Abstract: The problem of searching for a low cost path from a source location to a target location through a traversable region partitioned into a plurality of tiles is solved using source and target cost functions. Each tile in the traversable region is defined by boundary segments. The source cost function provides a cost for traversing from the source location to the boundary segment in question. The target cost function provides a cost for traversing from the boundary segment in question to the target location. The target cost function is estimated, and the source cost function is calculated. A path cost function is determined by adding the source and target cost functions. If the target location is a tile, then the target cost may be estimated using a convex hull of the target tile and the boundary segment in question. To facilitate the cost function calculations, multiple forms of cost function propagation between segments are disclosed.
    Type: Grant
    Filed: November 30, 2001
    Date of Patent: December 16, 2003
    Assignee: Sun Microsystems, Inc.
    Inventors: Zhaoyun Xing, Russell Kao
  • Patent number: 6664848
    Abstract: An apparatus and method are provided for damping a noise component of a power signal from a power source. The apparatus and method are able to produce a load current in phase with the noise component to lower an effective impedance of a circuit driven by the power source to damp the noise component. The apparatus and method are able to produce the load current in phase with the noise component between a first cutoff frequency and a second cutoff frequency. The first cutoff frequency is determined in part by a time constant and the second cutoff frequency is determined in part by the physical properties of the materials that form the apparatus.
    Type: Grant
    Filed: June 26, 2002
    Date of Patent: December 16, 2003
    Assignee: Sun Microsystems, Inc.
    Inventor: William B. Gist
  • Patent number: 6664983
    Abstract: A graphical user interface (GUI) is configurable in an embodiment of the invention. A user configures sliding panels located on the edges of the GUI. A sliding panel is configured with an application that runs in the sliding panel. The sliding panel is present in the GUI in either a closed or an open representation. The sliding panel's GUI representation is determined based on the position of the user's cursor. When the cursor is within a closed sliding panel's closed representation, the sliding panel is expanded to its open representation. By moving the cursor outside the sliding panel, the user can close the panel. There is no need for the user to consciously manage the elements in the GUI. The elements are managed based on the configuration information supplied by the user and the information available at runtime.
    Type: Grant
    Filed: January 16, 2001
    Date of Patent: December 16, 2003
    Assignee: Sun Microsystems, Inc.
    Inventor: Frank Ludolph
  • Patent number: 6664831
    Abstract: A charge pump design that facilitates post-fabrication control of delay locked loop charge pump current is provided. The charge pump includes an adjustment device responsive to user controlled signals that are varied to achieve a desired amount of charge pump current. Such control of the charge pump current in a delay locked loop allows a designer to achieve a desired DLL performance characteristic after the DLL has been fabricated.
    Type: Grant
    Filed: April 24, 2002
    Date of Patent: December 16, 2003
    Assignee: Sun Microsystems, Inc.
    Inventors: Claude Gauthier, Brian Amick, Dean Liu, Pradeep Trivedi
  • Patent number: 6664828
    Abstract: A post-silicon technique for adjusting a current of a charge pump in a phase locked loop is provided. The technique involves use of an adjustment circuit operatively connected to the charge pump, where the adjustment circuit is controllable to facilitate an internal biasing of the charge pump. Such control of the charge pump current in a phase locked loop allows a designer to achieve desired PLL performance characteristics after the PLL has been fabricated.
    Type: Grant
    Filed: April 24, 2002
    Date of Patent: December 16, 2003
    Assignee: Sun Microsystems, Inc.
    Inventors: Claude Gauthier, Brian Amick, Pradeep Trivedi, Dean Liu
  • Publication number: 20030227933
    Abstract: A prefetching technique for a network interface is provided to give the network interface the opportunity to prefetch data out-of-order into send queues in the network interface, rather than prefetching data in the order produced and deposited into main memory. That allows, the state of the send queues to be taken into consideration when deciding an appropriate order to prefetch data.
    Type: Application
    Filed: June 11, 2002
    Publication date: December 11, 2003
    Applicant: Sun Microsystems, Inc.
    Inventors: Hans Eberle, Nils Gura, Marc Herbert
  • Publication number: 20030229862
    Abstract: Automated patching techniques to correct certain rule violations are used, simplifying and automating the design layout of an electronic circuit, whether embodied as a design encoding or as a fabricated electronic circuit. A series of patches of predefined orientations are utilized to correct design rule violations. A set of violations are identified, patches of a predefined orientation are attempted to correct one or more violations. Patches of another predefined orientation are attempted to correct remaining violations. Attempted patching is repeated until all patches in the series have been attempted or all violations have been corrected. Patches can be added to a construction layer over the set of violations, and each patch that does not cause a design rule violation can be copied to a metal layer. A series of patches of predefined orientations are used, efficiently correcting design rule violations such as minimum area and jog rule violations.
    Type: Application
    Filed: February 26, 2003
    Publication date: December 11, 2003
    Applicant: Sun Microsystems, Inc.
    Inventors: Mu-Jing Li, Amy Yang
  • Publication number: 20030229791
    Abstract: A method for private personal identification number (PIN) management comprises ascertaining a first delay period of a preceding PIN. The first delay period is greater than zero if the preceding PIN does not match a validated PIN and the first delay period equals zero if the preceding PIN matches the validated PIN. The method also includes receiving a current PIN after at least the first delay period and delaying for a second delay period if the current PIN does not match the validated PIN. The second delay period is greater than the first delay period.
    Type: Application
    Filed: June 5, 2002
    Publication date: December 11, 2003
    Applicant: Sun Microsystems, Inc. a Delaware Corporation
    Inventor: Eduard De Jong
  • Publication number: 20030229598
    Abstract: A method for private personal identification number (PIN) management includes receiving a first PIN, receiving a first key used to scramble a second PIN that has been validated, receiving a first scrambled PIN comprising the second PIN scrambled with the first key, scrambling the first PIN with the first key to create a second scrambled PIN and validating the first PIN based at least in part on whether the first scrambled PIN matches the second scrambled PIN.
    Type: Application
    Filed: June 5, 2002
    Publication date: December 11, 2003
    Applicant: Sun Microsystems, Inc., a Delaware Corporation
    Inventor: Eduard de Jong
  • Publication number: 20030229814
    Abstract: A computer system 10 with one or more processors 12 can be configured to operate in any one of a number of thermal environments. A setting system 14 sets operating parameters of the computer system such as processor operating voltage and frequency. A selecting system 16 selects values of operating parameters for use in setting by responding to an input of configuring data 20 to select a set of parameter values from a parameter value storage memory 18. The configuring data 20 may be input by the insertion of a smart card 58. Such configuring is useful in adapting computer systems during manufacture for compliance with desired specifications without hardware modification.
    Type: Application
    Filed: April 7, 2003
    Publication date: December 11, 2003
    Applicant: Sun Microsystems, Inc.
    Inventor: Paul J. Garnett
  • Publication number: 20030229488
    Abstract: An apparatus and method are provided for identifying functionally sensitized data paths in a logic circuit and storing the identified data paths in a representation of the logic circuit. The representation of the logic circuit includes a single occurrence of each identified data path along with a variable for each single name or path segment identified. The variable represents a number of times that path segment or signal name was functionally sensitized.
    Type: Application
    Filed: June 10, 2002
    Publication date: December 11, 2003
    Applicant: Sun Microsystems, Inc.
    Inventors: Ramesh C. Tekumalla, Scott Davidson