Patents Assigned to Sun Microsystems
  • Patent number: 6601081
    Abstract: A computer system includes a global machine for providing a virtual machine for a plurality of applications programs, including a calling applications program and a called applications program which is called by said calling applications program, and further provides a global state store for storing selected global state information for controlling selected operations. The calling program conditions the global state information stored in the global state store to a calling program global state, performs predetermined calling program processing operations and calls the called applications program. The called program, upon being called by the calling program, saves the calling program global information contained in the global state store.
    Type: Grant
    Filed: June 30, 1995
    Date of Patent: July 29, 2003
    Assignee: Sun Microsystems, Inc.
    Inventors: Joseph E. Provino, Mark M. Towfigh
  • Patent number: 6601151
    Abstract: A memory access request handling unit is arranged between a source of memory access requests and a data storage element that is the target of the memory access requests. The memory access request handling unit comprises a queue made up of a number of queue elements, each being capable of temporarily storing one memory access request. Comparison logic is arranged to monitor a window of the queue and to select one or more of the queue elements, representing memory access requests not yet transmitted to the data storage element, for transmission to the data storage element. The selection is made on the basis of a comparison between the memory access requests held in the queue and one or both of a priority value set for each memory access request and a list of memory access requests that are currently pending at the data storage element, the list being maintained in a list store of the memory access request handling unit.
    Type: Grant
    Filed: February 8, 1999
    Date of Patent: July 29, 2003
    Assignee: Sun Microsystems, Inc.
    Inventor: Jeremy G Harris
  • Patent number: 6600496
    Abstract: A graphical user interface (GUI) for a television set-top box which includes a web browser. The set-top box has an Internet data connection and is controlled from user inputs entered through a remote control device. The GUI generates menu screens that are superimposed over conventional television video images, so that the user can view browser graphics generated by the GUI while viewing television images in the background. The GUI further provides animated on-screen notifications of the presence of interactive content, such as hypertext links to World Wide Web pages, which may be associated with television content currently being received. The GUI can also provide animated on-screen notifications of other events, such as previously-specified dates and times or the end of a television commercial. A main menu screen includes function buttons which appear to slide back and forth. A two-state progress indicator indicates that a download is in progress and the degree of completeness of a download.
    Type: Grant
    Filed: September 26, 1997
    Date of Patent: July 29, 2003
    Assignee: Sun Microsystems, Inc.
    Inventors: Annette Wagner, J. Bret Simister
  • Patent number: 6599259
    Abstract: A computer input device configured to provide massage stimuli to a user is disclosed. The massage stimuli may include stroking, compression, kneading, squeezing or percussion of a soft body tissue of a user of the input device. Characteristics of the massage stimuli such as intensity, frequency, location, and pattern of the massage stimuli application may be controlled by the user. In some embodiments, characteristics of the massage stimuli may be automatically controlled by a microcontroller or computer.
    Type: Grant
    Filed: June 4, 2001
    Date of Patent: July 29, 2003
    Assignee: Sun Microsystems, Inc.
    Inventor: Brett J. Muir
  • Patent number: 6601110
    Abstract: The present invention provides a system for using door translation to perform inter-process communication. The system enables a legacy application program to invoke traditional operations, such as READ and WRITE operations, which would otherwise be unavailable in a doors environment. Transparent to the client process, the system of the present invention translates the otherwise unavailable operation into a door call. Bound by its limitations and constraints, the server process performs a service in response to the door call. The system comprises a system call handler, such as a generic file system, which receives a file operation request from a client process. A door invocation handler, which includes a translator, determines the appropriate server process capable of performing a service corresponding to the operation request, translates the operation request into a door call to the server process, and invokes the door call.
    Type: Grant
    Filed: March 17, 1998
    Date of Patent: July 29, 2003
    Assignee: Sun Microsystems, Inc.
    Inventor: Tim P. Marsland
  • Patent number: 6600656
    Abstract: A mountable computer system includes a primary system structure and a cover. The cover is mountable to a support structure and supports the primary system structure therein. The primary system structure includes one or more connectors for attaching cables to the system. The cover is adapted to enable mating between cables and the primary system structure when inserted therein. The cover and primary system structure are also adapted to enable translation of the primary system structure in the cover with cables attached. A method for accessing computer system internal components includes: disengaging a primary system structure from an inserted position in a cover; sliding the primary system structure to an extended position in the cover while maintaining connection to cables attached to the primary system structure; releasably locking the primary system structure in the extended position in the cover; and accessing internal components disposed on the primary system structure.
    Type: Grant
    Filed: April 10, 2002
    Date of Patent: July 29, 2003
    Assignee: Sun Microsystems, Inc.
    Inventors: Robert F. Mori, Christopher H. Frank
  • Patent number: 6601235
    Abstract: Methods and apparatus for dynamically deoptimizing a frame in a control stack during the execution of a computer program are disclosed. The described methods are particularly suitable for use in computer systems that are arranged to execute both interpreted and compiled byte codes. According to one aspect of the present invention, a computer-implemented method for deoptimizing a compiled method includes creating a data structure. The data structure, which is separate from the control stack, is arranged to store information relating to the compiled method. A reference indicator, such as a pointer, is created to associate the data structure with the frame. The method, which is compiled to a first state of optimization, is then deoptimized to a second state of optimization, and the method in the first state of optimization may be discarded, thereby deoptimizing the frame.
    Type: Grant
    Filed: April 27, 2001
    Date of Patent: July 29, 2003
    Assignee: Sun Microsystems, Inc.
    Inventors: Urs Hölzle, Lars Bak
  • Patent number: 6601089
    Abstract: A communication arrangement facilitates transfer of messages among a plurality of processes in with a computer, the computer having a memory shared by the processes. The communication arrangement comprises, allocated to each process, a plurality of buffers, and a plurality of postboxes each associated with one of the other processes. Each process includes a message size determination module and a message transfer module. The message size determination module is configured to determine whether a message to be transferred to another process can be accommodated by a postbox.
    Type: Grant
    Filed: June 21, 1999
    Date of Patent: July 29, 2003
    Assignee: Sun Microsystems, Inc.
    Inventors: Steven J. Sistare, Terry D. Dontje
  • Patent number: 6600713
    Abstract: A hybrid optical recording medium is arranged to allow original information that is pre-recorded in a mass manufacturing process to be supplemented by additional information written to the disk after the original information has been recorded using a disk drive. The medium contains a first optical area for storing information which is pre-recorded according to a highly structured standard format and a second optical area in which supplemental information can be written, read back therefrom, erased and changed by a computer connected to the disk drive.
    Type: Grant
    Filed: June 26, 1996
    Date of Patent: July 29, 2003
    Assignee: Sun Microsystems, Inc.
    Inventor: Bruce Tognazzini
  • Patent number: 6600325
    Abstract: One embodiment of the present invention provides a system for capacitively probing electrical signals within an integrated circuit. This system operates by placing a probe conductor in close proximity to, but not touching, a target conductor within the integrated circuit. In this position, the probe conductor and the target conductor form a capacitor that stores a charge between the probe conductor and the target conductor. Next, the system detects a change in a probe voltage on the probe conductor caused by a change in a target voltage on the target conductor, and then determines a logic value for the target conductor based on the change in the probe voltage. In one embodiment of the present invention, determining the logic value for the target conductor involves, determining a first value if the probe voltage decreases, and determining a second value if the probe voltage increases.
    Type: Grant
    Filed: February 6, 2001
    Date of Patent: July 29, 2003
    Assignee: Sun Microsystems, Inc.
    Inventors: William S. Coates, Robert J. Bosnyak, Ivan E. Sutherland
  • Patent number: 6599143
    Abstract: A variably positionable electrical connector provides a direct interface for a disk drive or other electrical device to a printed circuit board (PCB), backplane or motherboard of a computer system. The connector has a base (which may comprise a PCB or backplane) and a housing that slides relative to the base to allow the housing to be positioned according to the spacing between the electrical device's power and signal connectors. The housing includes multiple electrical contacts that receive or engage corresponding contacts of the device. Conductors that are electrically coupled to the computer system extend from the base and include portions that are aligned substantially parallel to a direction in which the housing can slide. The housing contacts slidably engage the parallel portions of the conductors and, as the housing is moved, the housing contacts slidably maintain electrical contact with the conductors.
    Type: Grant
    Filed: November 28, 2000
    Date of Patent: July 29, 2003
    Assignee: Sun Microsystems, Inc.
    Inventors: Fay Chong, Jr., William L. Grouell
  • Patent number: 6601080
    Abstract: A system that efficiently performs a CMOD operation in solving a system of equations involving a sparse coefficient matrix by identifying supernodes in the sparse matrix. Each supernode comprises a set of contiguous columns having a substantially similar pattern of non-zero elements. The system performs a CMOD operation on each supernode, by determining a structure for the supernode, and computing a function of the structure. The system uses a one-dimensional trapezoidal representation for the supernode during the CMOD operation, if the result of the function is lower than a threshold value, and otherwise uses a two-dimensional rectangular representation for the supernode. The function of the structure of the supernode is a function of a number of computational operations involved in computing a lower-triangular sub-block portion of the supernode and a number of computational operations involved in computing a rectangular sub-block portion of the supernode.
    Type: Grant
    Filed: February 23, 2000
    Date of Patent: July 29, 2003
    Assignee: Sun Microsystems, Inc.
    Inventor: Rajat P. Garg
  • Patent number: 6601114
    Abstract: A method, computer program, signal transmission and apparatus verify instructions in a module of a computer program during linking using pre-verification constraints with fully lazy loading. It is first determined whether a first module which is loaded has passed verification one-module-at-a-time before linking. If the first module has passed verification, a pre-verification constraint on a constrained module is read, if any. It is then determined if the constrained module is loaded, if any pre-verification constraint is read. If the constrained module is not already loaded, the pre-verification constraint is retained as a verification constraint.
    Type: Grant
    Filed: May 27, 1999
    Date of Patent: July 29, 2003
    Assignee: Sun Microsystems, Inc.
    Inventors: Gilad Bracha, Sheng Liang, Timothy G. Lindholm
  • Patent number: 6600348
    Abstract: Disclosed is an input/output (IO) device for transmitting a data bit signal. In one embodiment, the IO device includes an IO device input node for receiving an input data bit signal, an IO device output node, and a common ground node. The IO device also includes a first driver having first and second n-channel FETs coupled together, first and second p-channel FETs coupled together, a plurality of third n-channel or p-channel FETs each having a drain coupled to the IO device input node, and a plurality of first capacitors coupled between the common ground node and respective sources of the plurality of third n-channel or p-channel FETs. The drains of the first p-channel FET and the second n-channel FET are coupled to the IO device output node, while the gate of the first n-channel FET is coupled to the IO device input node.
    Type: Grant
    Filed: May 30, 2002
    Date of Patent: July 29, 2003
    Assignee: Sun Microsystems, Inc.
    Inventors: Shifeng Jack Yu, Fabrizio Romano, Cong Q. Khieu
  • Patent number: 6601217
    Abstract: A system and method are provided for performing error correction for all or part of an electronic communication, such as a routing header of a packet. At a transmitting entity the routing information contained in the header is divided into a plurality of segments. Multiple iterations of the routing segments are included in the packet, with the routing segments arranged in different sequences in different iterations. Thus, when transmitted across a communication link comprising multiple lines, each routing segment is carried across at least two different subsets of the lines, thus increasing the likelihood that at least one version of the segment will be received without error. Each segment of each iteration may be encoded with error detection information. For example, a parity bit may be added to each segment. At the receiving entity each iteration is received in turn, and each segment of the received iteration is checked for errors. When a segment is received without errors, it can be forwarded (e.g.
    Type: Grant
    Filed: April 13, 2000
    Date of Patent: July 29, 2003
    Assignee: Sun Microsystems, Inc.
    Inventor: Brian L. Smith
  • Publication number: 20030140230
    Abstract: A method for enhanced privacy protection in identification in a data communications network includes enrolling for a service on the data communications network, receiving a randomized identifier (ID) in response to the enrolling, storing the randomized ID and using the randomized ID to obtain services on the data communications network. An apparatus for obtaining a service on a data communications network includes an enrollment authority configured to accept an enrollment request. The enrollment authority is further configured to return enrollment results in response to the enrollment request. The enrollment results include user data and the enrollment results may be used obtaining a service from a service provider.
    Type: Application
    Filed: October 29, 2001
    Publication date: July 24, 2003
    Applicant: Sun Microsystems, Inc., a Delaware Corporation
    Inventors: Eduard K. de Jong, Moshe Levy, Albert Y. Leung
  • Publication number: 20030140086
    Abstract: An invention is provided for asynchronous transfer of control. An asynchronous interrupt exception is received, and in response, the value of a reference counter is determined. The value of the reference counter is based on the execution of synchronized code. Generally, the reference counter is initialized to a predetermined number, and altered based on the execution of synchronized code. When the asynchronous interrupt exception is received, the method is asynchronously interrupted when the value of the reference counter is equal to the predetermined number.
    Type: Application
    Filed: October 23, 2002
    Publication date: July 24, 2003
    Applicant: Sun Microsystems, Inc.
    Inventors: Gregory Bollella, Benjamin M. Brosgol, Scott D. Robbins, David S. Hardin, Peter Dibble
  • Publication number: 20030140036
    Abstract: An apparatus and method for interfacing with a metrics database is provided for getting metrics data and grouping metrics data in response to a query. The metrics database interface gets metrics data by retrieving a set of metrics data from the metrics database in response to a query and determining a set of unique tags. The metrics database interface also groups a set of metrics data in response to a query so that the group can be referenced in a subsequent query.
    Type: Application
    Filed: January 23, 2002
    Publication date: July 24, 2003
    Applicant: Sun Microsystems, Inc.
    Inventor: Andre Belowsov
  • Publication number: 20030139956
    Abstract: Methods, systems, and articles of manufacture of the present invention may involve a database for facilitating solution development or training. The database may comprise a scenario entity associated with at least one critical event, at least one of a work scope entity and a process entity associated with the scenario entity, and a core task entity associated with the at least one of the work scope entity and the process entity. The core task entity may correspond to at least one core task that facilitates solution development for the at least one critical event.
    Type: Application
    Filed: August 22, 2002
    Publication date: July 24, 2003
    Applicant: Sun Microsystems, Inc.
    Inventors: Daniel Guenther, Janet Anderson
  • Publication number: 20030140299
    Abstract: Provided are a method, system, and an article of manufacture for detecting errors while accessing a storage device. A host system writes an identical initialization pattern into each block of a plurality of blocks while formatting the storage device. Each block of the plurality of blocks has a checksum field capable of containing a value. Any host system generates an error when data from a retrieved block from the plurality of blocks computes to a checksum that is different from the value contained within the checksum field for the retrieved block, and the retrieved block does not contain the initialization pattern.
    Type: Application
    Filed: January 22, 2002
    Publication date: July 24, 2003
    Applicant: Sun Microsystems, Inc.
    Inventors: William L. Duncan, Wayne Ihde, Michael Tibbetts