Abstract: Provided are a method, system, and program for managing a configuration file including device parameters defining attributes of at least one device. A device driver uses the device parameters to control the at least one device. An association is provided of device parameters and parameter codes for devices accessible through the device driver, wherein the device parameters define attributes of the devices. Information is presented on the device parameters through a user interface. User selection is received of at least one of the device parameters. A determination is made from the association of the parameter code corresponding to the user selected device parameter for each user selected device parameter. The configuration file is then modified to include each determined parameter code.

Abstract: A system and method for controlling the presentation of information on a display device concerning a collection of objects. A processor receives user inputs defining one or more user-adjustable filters. For each object in the collection, the processor computes an information control value using the one or more filters. Each filter operates on one or more data fields on the objects. The information control value then determines how much information is to be displayed for the object. Furthermore, the user may dynamically adjust parameters of the filters. Thus, the user may control which populations of objects are displayed with a rich set of information and which populations are displayed sparsely.

Abstract: Techniques for online upgrading of software components are disclosed. The techniques are especially suited for online upgrading of container-based software components in object oriented computing environments. A multi-stage online upgrade system can facilitate online installation of the container-based software components (e.g., applications) in object oriented computing environments. Moreover, online software upgrades can be achieved without interrupting online services which are provided by the container-based software components. The multi-stage online upgrade system can be implemented so as to allow interaction with an upgrade management entity (e.g., an application developer or system administrator). This allows controlling and/or monitoring of the online upgrade operations.

Abstract: A technique for adjusting a bias-generator in a phase locked loop after fabrication of the phase locked loop is provided. The technique involves use of an adjustment circuit operatively connected to the bias-generator, where the adjustment circuit is controllable to facilitate a modification of a voltage output by the bias-generator. Such control of the voltage output by the bias-generator allows a designer to achieve a desired phase locked loop performance characteristic after the phase locked loop has been fabricated.

Abstract: A method and apparatus for testing processes in a computer system are described. In a software process, there exist many test points in the execution of the process where stress testing may be applied. The process is executed with stress testing applied at selected test points and test intervals. The selected test points are based on prime numbers and varied for successive execution iterations. An efficient distribution of evaluated test points is achieved, and all possible test points are ultimately evaluated within a small number of execution iterations. In one embodiment, the total number of test points is first determined. A first execution run is evaluated at selected test points that correspond to prime numbers greater than the square root of the total number of test points.

Abstract: Apparatus, methods, and computer program products are disclosed that improve the performance of multi-threaded computer applications that use objects (within an object collection) which require exclusive thread access. The invention monitors interrelationships between the objects in the object collection and provides mechanisms to lock the minimal set of these objects for the exclusive thread access. When these objects are locked, independent or unrelated objects are left unlocked and can, in turn, be locked by other threads. Because a minimal set of objects are locked other threads that access the object collection are less likely to be blocked by the lock. Thus, these other threads are more likely to be able to simultaneously access objects in the object collection.

Abstract: A computer implemented method and a computer program product includes a first computer readable code construct configured to handle request messages. This comprises receiving a request message and having an associated user name which is associated with a remote user on a network. Further, making an access determination to determine whether the forwarding of the request message is authorized, and finally when forwarding of the request message is authorized, the message to a target system is forwarded.

Abstract: A method and system is provided that processes the content of a document separately from information used to describe the structure of the content in the document. Content can be text, alphanumeric data, or any other information contained in a document. Initially, the method provides a content entity capable of storing and manipulating the content stored in a storage area. The manipulation of content in the storage area includes inserting content in the content entity identified by a start position and a stop position, removing content from the content entity, and retrieving content from the storage area. A separate document entity is provided that uses element entities to represent the structure of the text without the content. The document entity is used to retrieve information from the element entities and determine the location of content in the content entity.

Abstract: The present invention provides logic to write data to a multi-ported memory array. The memory array is comprised of a plurality of memory banks and a common write word line shared by the memory banks. The memory array includes a plurality of write buffers, wherein each write buffer is associated with one of the memory banks. The memory array further comprises a selector module for selecting a write buffer to write data into its associated memory bank. The memory array further includes a writing module within the write buffer for writing data into the selected memory bank by way of a signal to the memory bank.

Abstract: Quotient digit selection logic using a three-bit carry propagate adder is presented. An enhanced quotient digit selection function prevents the working partial remainder from becoming negative if the result is exact. The enhanced quotient digit selection logic chooses a quotient digit of zero instead of a quotient digit of one when the actual partial remainder is zero. Using a four bit estimated partial remainder where the upper four bits are zero, a possible carry propagation into fourth most significant bit is detected. This can be accomplished by looking at the fourth most significant sum and carry bits of the redundant partial remainder. If they are both zero, then a carry propagation out of that bit position into the least significant position of the estimated partial remainder is not possible, and a quotient digit of zero is chosen. This provides a one cycle savings since negative partial remainders no longer need to be restored before calculating the sticky bit.

Abstract: The present mechanism relates to a method and apparatus for generating responses to queries to a document retrieval system. The system responds to a specific request for information by locating and ranking portions of text that may contain the information sought. It locates small relevant passages of text (called “hit passages”) and ranks them according to an estimate of the degree to which they correspond to the information sought. The system minimizes the number of these hit passages that need to be examined before an information seeker has either found the desired information or can safely conclude that the information sought is not in the collection of texts.

Abstract: A system and method for memory allocation from a heap comprising memory blocks of a uniform fixed size. Each memory block has a status bit. A binary status key stores a Boolean value indicating free memory. The heap is scanned in order until a sequence of a requested quantity of free contiguous memory blocks is found or NULL is returned. Each scanned free memory block is marked un-free by assigning its status bit to the logical negative of the binary status key. If the end of the heap is reached before a sequence of sufficient quantity is found, all reachable blocks are marked as free. The binary status key is flipped such that all memory blocks which were marked free are now un-free, and vice versa. Any memory block whose corresponding structure has become unreferenced is reclaimed for future use. The scan then continues from the beginning of the heap. In another embodiment, a memory allocation for a partitioned data structure from a heap of fixed-size memory blocks may be used.

Abstract: Methods and apparatus for creating a mechanism for rearranging a plurality of objects in memory are disclosed. A frequency of accesses in memory of one or more fields associated with the plurality of objects with respect to one another during execution of a computer application are determined. A mechanism for rearranging the plurality of objects in the memory in accordance with the determined frequency of accesses in memory of data referenced by the one or more fields associated with the plurality of objects with respect to one another is then generated.

Abstract: A method and apparatus for providing memory functionality to object-oriented client software components of a computer system having a CPU using a first set of memory classes, each class of the first set being platform-independent; a second set of memory classes, each class of the second set being a subclass of a class of the first set and being platform-dependent; and performing client component memory functions by accessing only objects of classes of the first set. Descriptions of the classes and methods are provided, enabling platform-independent device drivers to be implemented.

Abstract: A memory array includes a plurality of memory cells logically arranged in M rows and N columns, wherein N is the number of memory cells per word of digital information and M is the number of words within the array. A plurality of N data output lines are associated with each of the N columns of the array for selectively retrieving output data from a word located at a predetermined word address in the array. Each data output line is selectively shared by each of the M memory cells within its associated column. Each of the cell output lines of the M memory cells in each of the N columns are logically OR-ed together to provide the output data retrieved by each data output line associated with each of the N columns.

Abstract: A computer system comprising a chassis and housing removable servers supported in subchassis, each chassis having optional front or read cable access. Power and signal connectivity to the servers may be made from the front or rear of the system. The subchassis may be half the width of the chassis or a quarter of a width of the chassis. The subchassis further include an upper bay and a lower bay as well as a plurality of field replaceable units, which all may be access through the front of the chassis. One or more of the field replaceable units connect to the system through a midplane, located within the subchassis.

Abstract: A system for analyzing test result data from a plurality of test systems capable of producing the test result data in disparate formats is provided. The system includes a data processing block, a memory data structure, and a database. The data processing block is designed to receive the test result data in the disparate formats so as to produce an identifiable result data. The memory data structure is designed to store the identifiable result data in a table format. The database stores the identifiable result data obtained from the memory data structure. The identifiable result data has a uniform format for analyzing the test result data from the plurality of test systems.

Abstract: A method includes scheduling instructions within a trace disregarding data dependencies from off trace basic blocks. After scheduling, errors caused by instruction movement are corrected. By disregarding data dependencies from off trace basic blocks, more parallelism is exposed resulting in more instruction motion. In this manner, efficiency is maximized.

Abstract: An analysis facility analyzes simulation output resulting from a simulator of an electrical component, such as a microprocessor. The simulation output contains waveform representations of at least one data signal and a clock signal. The analysis facility analyzes the waveform representations and the simulation output to produce a report regarding signaling performance metrics, such as data jitter, setup times and hold times. The analysis facility may be customized by the user specifying parameters. For example, the user may specify what portion of the time frame for which simulation results produced are to be analyzed by the analysis facility. The user may also specify parameters such as cycle time and reference voltage values, including an indeterminate state region.

Abstract: Provided are a method, system, and program for rendering a visualization of network devices in a computer user interface. A rendering is made of device representations of a plurality of devices in a network and of connection representations of connections between devices, wherein the connection representation between each pair of connected devices comprises a line extending between the two connected devices that forms approximately a ninety degree angle.