Abstract: A method and apparatus for interconnecting a first device and a second device in a network. The first device and the second device are connected to a plurality of interfaces. The plurality of interfaces emulate a single high-speed interface. According to an embodiment of the present invention, a first identifier is assigned to the first interface and the second interface at the first device. According to another embodiment of the present invention, one of the plurality of interfaces is selected to transmit a packet of data.

Abstract: An intuitive scrolling feedback mechanism is provided to enable novice and infrequent computer users to understand and to utilize the scrolling functionality offered by a computing device. Scrolling feedback is provided by displaying a portion of a set of information in a display area. In addition, a control region is displayed, comprising one or more activable controls. These controls, when activated by a user via a user interface, cause a different portion of the set of information to be displayed in the display area. In addition, a status region is displayed, comprising a plurality of location indicators. A subset of the location indicators is displayed in a first manner (e.g. a darker color), while the remainder of the location indicators is displayed in a second and different manner (e.g. a lighter color). The subset of the indicators is determined based upon the portion of the set of information that is currently being displayed in the display region.

Abstract: Systems and methods for increasing the execution speed of virtual machine instructions for a function are provided. A portion of the virtual machine instructions of the function are compiled into native machine instructions so that the function includes both virtual and native machine instructions. Execution of the native machine instructions may be accomplished by overwriting a virtual machine instruction of the function with a virtual machine instruction that specifies execution of the native machine instructions. Additionally, the original virtual machine instruction may be stored so that the original virtual machine instructions can be regenerated.

Abstract: An improved mechanism for managing an object cache is disclosed. An object cache manager receives a request for an object resident in an object cache. A determination is made as to whether the requested object is currently within a particular portion of the object cache. If the requested object is within this particular portion, then the object cache manager keeps the requested object within this portion of the cache by maintaining the requested object at its current position relative to other objects in the object cache. By removing the overhead of repositioning objects within a particular portion of the object cache, the efficiency of object cache management is significantly improved.

Abstract: Protocols that provide more efficient operation in dynamic and heterogeneous networking environments are defined. The protocols present a range of levels of error control and sequence order control. Traffic in a link between neighboring network devices is segregated into flows. Each flow is managed in accordance with a selected protocol. It is possible to simultaneously employ different protocols for respective flows within the link.

Abstract: Methods and systems consistent with the present invention provide an improved object-relational mapping tool used to maintain information in relational database tables that do not utilize primary keys. The improved object-relational mapping tool uses a cursor update operation associated with relational database tables to maintain information contained in a relational database table without primary keys, including performing operations such as, delete or update on the table.

Abstract: A monitor interface cable for transmitting display data and command data between a computer system and a display monitor preferably including a microcontroller. The monitor interface cable enables both display and command data to be transmitted simultaneously from the computer system to the display monitor.

Abstract: A “firewall” apparatus is placed between a single bus master device and a multimaster I2C bus system. The firewall apparatus transforms all multimaster bus errors into simple NAK errors and isolates the single bus master from the multimaster bus. Therefore the single bus master needs only to retry transactions that receive unexpected NAKs and all complex multimaster issues, such as bus collisions, transaction termination and bus recovery, associated with the actual error that occurred on the multimaster bus are handled by the firewall apparatus. In accordance with one embodiment, when the single bus master attempts to launch a transaction at a time when the multimaster I2C bus is busy, the firewall apparatus absorbs the address driven by the single bus master and then stalls the transaction until the firewall apparatus is able to successfully acquire and drive the address on the multimaster bus. The firewall apparatus is implemented in a preferred embodiment by a programmed microcontroller.

Abstract: The present invention is method and system capable of delivering video across the Internet using the hypertext transfer protocol. Client objects periodically request to view a uniform resource locator that is aliased to a servlet. For each request, the servlet retrieves and delivers a video image to the requesting client object. The invention can simultaneously deliver images to a variety of client objects, regardless of whether they are requesting the images at the same rate.

Abstract: A floating point total order comparator circuit for comparing a first floating point operand and a second floating point operand includes a first analysis circuit for determining a format of the first floating point operand based upon floating point status information encoded within the first floating point operand, a second analysis circuit for determining a format of the second floating point operand based upon floating point status information encoded within the second floating point operand, and a result generator circuit coupled to the analysis circuits for producing a result indicating a total order comparative relationship between the first floating point operand and the second floating point operand based on the format of the first floating point operand and the format of the second floating point operand. The result can condition the outcome of a floating point instruction.

Abstract: An efficient method of sub-typing an object in an object oriented computing environment is provided. In one embodiment, the sub-typing method loads an input object having an object type, whereby an embedded array and a cache are searched for an object sub-typing data structure corresponding to the requested supertype. Any found object sub-typing data structures are associated with the input object. In some embodiments, if the object sub-typing data structure is not initially found, an overflow array is searched and the cache is updated with the object sub-typing data structure when the object sub-typing data structure is included in the overflow array. A system and software product is further provided in other embodiments whereby information associated with a particular object sub-type is obtained.

Abstract: A bridge for a multi-processor system includes bus interfaces for connection to an I/O bus of a first processing set, an I/O bus of a second processing set and a device bus. It also comprises a bridge control mechanism configured to be operable, in an operational mode to permit access by at least one of the first and second processing sets to bridge resources and to the device bus and, in an error mode, to prevent access by the processing sets to the device bus and to permit restricted access to at least one of the processing sets to at least predetermined bridge resources. By providing restricted access to selected parameters held in the bridge during an error mode, the bridge can act as a secure repository for information which can be used by the processing sets to investigate the error and hopefully to recover therefrom, while preventing I/O devices connected to device bus from being corrupted by a faulty processing set. Storage in the bridge provides for buffering data pending resolution of the error.

Abstract: A water-cooled system and method for cooling electronic components. The system includes a surface. At least one electronic component is coupled to the surface, the at least one electronic component including an integrated circuit. A closed-loop fluidic circuit is coupled to the surface for removing heat from the integrated circuit. The closed-loop fluidic circuit includes a heat exchanger. A blower is coupled to the surface, the blower having a first port, a second port, and an impeller that rotates around an axis. The blower is oriented such that the axis is perpendicular to the surface and non-intersecting with the heat exchanger, wherein the blower moves air through the heat exchanger.

Abstract: A memory cell is provided to store a speculative data value until either a later speculative data value is generated or until the stored speculative data is determined to be the desired data, e.g. no longer speculative. At such time, the invention allows the stored speculative data to quickly and easily be stored as permanent data and further speculative data values to be stored.

Abstract: Method and apparatus for detecting and analyzing effects of noise in a digital circuit that arises from a coupling of signals produced by switching of a first gate and a second gate in a timed relationship. Where each of a first gate and a second gate can switch within a selected switching time interval, the gate switching effects are combined and the second gate output signal is analyzed with reference to the first gate input signal. Otherwise, the gate switching effects are not combined. When the second gate output signal satisfies at least one of three criteria, this condition is interpreted as indicating that the second gate permits propagation of a noise pulse produced at the first gate.

Abstract: Structures for providing devices that include resistive paths specifically designed to provide a predetermined resistance between the bulk material of the device and a well tie contact. By providing a resistive path, an equivalent RC circuit is introduced to the device that allows the bulk material potential to track the gate potential, thereby advantageously lowering the threshold voltage as the device turns on and raising the threshold voltage as the device turns off. In addition, the introduction of the resistive path also allows the bulk material potential to be controlled and stabilize at an equilibrium potential between switching events.

Abstract: Methods and apparatus for implementing priority inversion avoidance protocols and deterministic locking where an API is used to select objects in a multi-threaded computer system are disclosed. In one aspect of the invention, an enhanced monitor is associated with one or more selected objects by way of an associated API. The enhanced monitor is arranged to set behavior for a lock associated with the selected objects as determined by a user defined behavior object included within the enhanced monitor. In this arrangement, only the selected one or more objects are associated with the enhanced monitor.

Abstract: A method and apparatus may be employed for maintaining cooling efficiency during air mover failure. An electrical enclosure may include a heat-generating thermal load, multiple air movers configured to remove heat from the thermal load, and a backward-airflow reducing device configured to reduce the amount of air that can be drawn backwards through one of the air movers if that air mover fails. The backward-airflow reducing device may be a valve configured to open while the air mover if functioning and to close when the air mover is not functioning.