Patents Assigned to Sun Microsystems
  • Publication number: 20030033346
    Abstract: Provided is a method, system, and program for managing multiple resources in a system. A user request for an operation is received that requires performing separate element operations with respect to multiple resources in the system. In response to the user request, commands are communicated to multiple elements, wherein each element is capable of managing one of the resources in the system. For each element receiving at least one of the communicated commands, the element interprets the received commands and performs the element operation requested by the received command with respect to the managed resource. All the element operations performed by all the elements in response to receiving the commands implements the user requested operation.
    Type: Application
    Filed: August 10, 2001
    Publication date: February 13, 2003
    Applicant: Sun Microsystems, Inc.
    Inventors: Mark A. Carlson, Rowan E. da Silva
  • Patent number: 6519702
    Abstract: A system for limiting security attacks on a computer system that operate by executing computer instructions embedded in data received from an external source. The system receives the data from the external source and performs a transformation on the data that causes any computer instructions encoded in the data to be unexecutable. After the data is transformed, the system stores the data in the computer system's memory. When the data is needed, the system retrieves the data and reverses the transformation. In this way, data from an external source is stored in memory in an unexecutable form, thereby making it impossible to execute malicious code embedded in the data. According to one aspect of the present invention, the data is transformed using a random number, so that the data can only be converted back to its original form with an inverse transformation using the same random number.
    Type: Grant
    Filed: January 22, 1999
    Date of Patent: February 11, 2003
    Assignee: Sun Microsystems, Inc.
    Inventor: Emrys J. Williams
  • Patent number: 6519646
    Abstract: A method and apparatus for encoding characteristics for the retrieval of information. Depending on the characteristics, some methods for retrieving information may be preferred. If information is too large to utilize UDP, then TCP may be preferred. In addition, if information is not cacheable, then it is preferable to retrieve the information directly from the server instead of searching the cache first. A URL (Uniform Resource Locator) is utilized on the internet to specify the application protocol (e.g., http), the domain name (e.g., www.sun.com), and file location (e.g., /users/hcn/index.html). The suffix of a file indicator is utilized to identify how to process the data or information subsequent to retrieval. One or more embodiments of the invention provide for encoding characteristics of data to be transferred that indicates or hints at an optimal method to retrieve the data. For example, the URL may specify that TCP is the preferred transfer protocol, thereby avoiding an attempted transfer using UDP.
    Type: Grant
    Filed: September 1, 1998
    Date of Patent: February 11, 2003
    Assignee: Sun Microsystems, Inc.
    Inventors: Amit Gupta, Elliot Poger, Christoph Schuba
  • Patent number: 6519717
    Abstract: A system and method for improving the isolation and diagnosis of hardware faults in a computing system wherein means are provided for indicating whether unusable data has previously triggered diagnosis of the hardware fault that caused the data to be unusable. If diagnosis has not been performed, the flag is not set. If diagnosis has already been performed, the flag is set. One embodiment comprises an interface which is used to convey data from one subsystem to another. When the interface receives data from the first subsystem, the data is examined to determine whether it contains an uncorrectable error (including missing data.) If the data contains an uncorrectable error, the interface examines the flag corresponding to the data to determine whether hardware fault diagnosis has already been initiated. If diagnosis has already been initiated, the data is passed to the second subsystem without initiating further diagnosis.
    Type: Grant
    Filed: October 6, 1999
    Date of Patent: February 11, 2003
    Assignee: Sun Microsystems Inc.
    Inventors: Emrys Williams, Robert Cypher
  • Patent number: 6519140
    Abstract: A bezel assembly for a computer enclosure includes a bezel and a hinge capable of hingedly joining the bezel to the computer enclosure. A computer system includes an enclosure, a bezel, and a hinge capable of hingedly joining the bezel to the enclosure. A method of replacing a first component with a second component in a computer system enclosure having a hinged bezel includes pivoting the hinged bezel away from the computer system enclosure and removing the first component from the computer system enclosure. The method further includes inserting the second component into the computer system enclosure and pivoting the hinged bezel toward the computer system such that the hinged bezel is adjacent the computer system enclosure.
    Type: Grant
    Filed: September 13, 2001
    Date of Patent: February 11, 2003
    Assignee: Sun Microsystems, Inc.
    Inventors: David J. Kim, William W. Ruckman, Milton C. Lee, Dimitry Struve
  • Patent number: 6519756
    Abstract: A method and apparatus for building an integrated circuit. A description of the logical operation of a module in a hardware description language is provided, which includes annotations in the form of design directives. An interpreting process is configured to read the annotations and identify which logical and physical design tools are needed to process each module in the description, as well as the order in which to invoke the logical physical design tools. Dependencies in the execution of the design tools on the various modules of the description are analyzed to determine where the processing of modules may be performed in parallel to optimize execution.
    Type: Grant
    Filed: October 5, 1999
    Date of Patent: February 11, 2003
    Assignee: Sun Microsystems, Inc.
    Inventors: Russell Kao, Zhaoyun Xing
  • Patent number: 6519615
    Abstract: A method and system for leasing storage locations in a distributed processing system is provided. Consistent with this method and system, a client requests access to storage locations for a period of time (lease period) from a server, such as the file system manager. Responsive to this request, the server invokes a lease period algorithm, which considers various factors to determine a lease period during which time the client may access the storage locations. After a lease is granted, the server sends an object to the client that advises the client of the lease period and that provides the client with behavior to modify the lease, like canceling the lease or renewing the lease. The server supports concurrent leases, exact leases, and leases for various types of access. After all leases to a storage location expire, the server reclaims the storage location.
    Type: Grant
    Filed: October 18, 2000
    Date of Patent: February 11, 2003
    Assignee: Sun Microsystems, Inc.
    Inventors: Ann M. Wollrath, James H. Waldo, Kenneth C. R. C. Arnold
  • Patent number: 6518792
    Abstract: A method and circuitry for pre-emphasizing transmitted logic signals. The method and circuitry may be applied to single-ended center-taped terminated I/O lines. In one embodiment, a driver circuit may be configured for monitoring the logic values (i.e. logic 0, logic 1, or logic low, logic high) of signals transmitted by the driver circuit. The driver circuit may compare the logic value of a next logic signal to be transmitted with a first previously transmitted signal and a second previously transmitted signal. Pre-emphasis of the next logic signal may occur based on the logic value of the next logic signal to be transmitted as well as the logic values of the first and second logic signals. If the first and second logic signals have the same logic value, and the next logic signal has a different value, the next logic value may be pre-emphasized.
    Type: Grant
    Filed: June 11, 2001
    Date of Patent: February 11, 2003
    Assignee: Sun Microsystems, Inc.
    Inventors: Jyh-Ming Jong, Prabhansu Chakrabarti, Leo Yuan
  • Patent number: 6519694
    Abstract: In a RISC or CISC processor supporting the IEEE 754 Not-a-Number (NaN) standard and of the kind comprising a load/store unit, a register unit and an arithmetic logic unit, and wherein the load/store unit has an error flag for marking a datum loaded to the load/store unit following a load which has completed, but resulted in an error, the processor is provided with a bit pattern generator operatively arranged in an output path from the load/store unit to at least one of the register unit and the arithmetic logic unit so that a Not-a-Number value for the invalid datum is loaded into a destination one of the floating-point registers or the arithmetic logic unit. The arithmetic logic unit is configured to propagate the Not-a-Number value as a Quiet-Not-a-Number (QNaN) value through its operations. The QNaN value may be tested for in a datum by a system software command code provided for that purpose.
    Type: Grant
    Filed: February 4, 1999
    Date of Patent: February 11, 2003
    Assignee: Sun Microsystems, Inc.
    Inventor: Jeremy G Harris
  • Patent number: 6519704
    Abstract: A fault-tolerant computer architecture is described wherein the effect of hardware faults is diminished. The architecture employs a main data bus having a plurality of interface slots for interconnecting conventional computer sub-systems. The number and type of sub-systems may vary considerably, however, a central processor sub-system which encompasses the inventive elements of the invention is always included. The central processor sub-system employs a plurality of central processing modules operating in parallel in a substantially synchronized manner. One of the central processing modules operates as a master central processing module, and is the only module capable of reading data from and writing data to the main data bus. The master central processing module is initially chosen arbitrarily from among the central processing modules.
    Type: Grant
    Filed: March 22, 1999
    Date of Patent: February 11, 2003
    Assignee: Sun Microsystems, Inc.
    Inventors: David C. Liddell, Emrys J. Williams
  • Patent number: 6519747
    Abstract: One embodiment of the present invention provides a system for defining signal timing for an integrated circuit device. The system operates by first creating a virtual timing reference plane for the integrated circuit device. A first signal line is then routed from a semiconductor die within the integrated circuit package to a first external connection of the integrated circuit package. Next, the system generates a first escape pattern for a first circuit trace on a printed circuit board from the first external connection to the virtual timing reference plane. This first escape pattern specifies a route from where the first external connection meets the printed circuit board to the virtual timing reference plane. Finally, the system establishes a first set of signal timings for a combination of the first signal line and the first circuit trace at the virtual timing reference plane.
    Type: Grant
    Filed: April 18, 2001
    Date of Patent: February 11, 2003
    Assignee: Sun Microsystems, Inc.
    Inventors: Satyanarayana Nishtala, Jayarama N. Shenoy, Tai-Yu Chou, Michael C. Freda
  • Publication number: 20030028865
    Abstract: Improved techniques for representation of objects in a Java programming environment are disclosed. The techniques are highly suitable for representation of Java objects inside virtual machines, especially those that operate with limited resources (e.g., embedded systems. A cluster of Java object representations is disclosed. Each of the Java object representations provide a reference to a Java object and a reference to the class associated with the Java object. Accordingly, a two-tier representation is provided which allows efficient implementation of applications which need to access information regarding both Java objects and classes. This means that the processing required to perform applications such as garbage collection is reduced. In addition, one of the references in the two-tier representation can be implemented to provide direct access to the internal class representation associated with the object. As a result, quick access to information regarding Java objects can be achieved.
    Type: Application
    Filed: July 31, 2001
    Publication date: February 6, 2003
    Applicant: Sun Microsystems, Inc.
    Inventors: Stepan Sokolov, David Wallman
  • Publication number: 20030028752
    Abstract: A method providing an application computer program to be written independently of the structure of a directory information tree. The application program makes calls to an innovative API, the API accessing the structure of the directory information tree in an innovative template. If the structure of the directory information tree is changed, the template is changed, but the application is not changed.
    Type: Application
    Filed: August 2, 2001
    Publication date: February 6, 2003
    Applicant: SUN Microsystems
    Inventors: Chi-Hung Fu, Hin Man, Dilli Dorai, Prasanta Behera
  • Publication number: 20030028741
    Abstract: Techniques for implementation of Java heaps are disclosed. The techniques can be implemented in a Java virtual machine operating in a Java computing environment. A Java heap potion comprising two or more designated portions is disclosed. Each of the designated heap portions can be designated to store only a particular Java logical component (e.g., Java objects, Java class representation, native components, etc.) A designated heap portion can be implemented as a memory pool. In other words, two or more designated heap portions can collectively represent a memory pool designated for a particular Java logical component. The memory pools allow for dynamic management of the designated heap portions. As a result, the performance of the virtual machines, especially those operating with relatively limited resources is improved.
    Type: Application
    Filed: July 31, 2001
    Publication date: February 6, 2003
    Applicant: Sun Microsystems, Inc.
    Inventors: Stepan Sokolov, David Wallman
  • Patent number: 6516344
    Abstract: A system for reducing network traffic for remote file system accesses receives requests at a local computer system for access to a file on the remote server. If the request is a read operation, and the operation is directed to an unallocated region of the file on the remote server, the system returns a block of null values to the requestor without receiving the block of null values from the remote server. Otherwise, the system sends a request to the remote server to read from the file. If the request is a write operation, and the operation is directed to an unallocated region of the file on the remote server, the system sends a request to the remote server to allocate storage for the write operation. Next, the system writes the data into a local cache. Later, the system copies the data from the cache to the remote storage.
    Type: Grant
    Filed: November 8, 1999
    Date of Patent: February 4, 2003
    Assignee: Sun Microsystems, Inc.
    Inventor: Siamak Nazari
  • Patent number: 6515501
    Abstract: An improved signal buffer configuration has been developed for transmitting communication signals across line traces between ICs on a printed circuit board, printed wiring board, multi-chip module, integrated circuit carrier or package, or other interconnect substrate. For example, in some realizations, multiple ICs having mismatched input and output impedances are mounted on an printed circuit board and communicate with each other via line traces. A signal buffer IC is placed in-line with the connecting line trace. The buffer is sized to fit within the pitch spacing of the line trace and contains an input impedance control circuit and an output impedance control circuit. These impedance control circuits are adapted to receive a control signal to set the input and output impedances of the buffer to correspond to the impedances of the connecting line traces. In this manner, the impedances between the ICs connected by this line trace are effectively matched and transmission line errors between them are reduced.
    Type: Grant
    Filed: June 1, 2001
    Date of Patent: February 4, 2003
    Assignee: Sun Microsystems, Inc.
    Inventors: Robert J. Bosnyak, Jose M. Cruz-Albrecht
  • Patent number: 6515527
    Abstract: A method for increasing a transition time period for an edge transition of a clock signal has been developed. The method includes detecting an edge transition of a clock signal of a computer system. Next, additional system power consumption is initiated upon detection of the edge transition. This additional power consumption will lengthen the edge transition time period of the clock signal.
    Type: Grant
    Filed: June 22, 2001
    Date of Patent: February 4, 2003
    Assignee: Sun Microsystems, Inc.
    Inventors: Tyler J. Thorp, Brian W. Amick, Dean liu
  • Patent number: 6516349
    Abstract: A content provider manager has been develop for use in an information services such as a portal or desktop application to provide for “pluggable” content that may be modified simply through changes to the set of content provider components encoded in a repository therefor. Content providers served to clients (e.g., browsers) by an information service are dynamically loaded and instantiated within the execution environment of the information service in correspondence with changes in the repository. In some configurations, a single repository provides a mechanism for additions to, removals from and/or changes in the set of content providing components served by multiple information service installations. Although the techniques described are more generally applicable, they are particularly useful in implementations of dynamic content applications, including user customizable web portal and personalized desktop, e.g.
    Type: Grant
    Filed: September 7, 1999
    Date of Patent: February 4, 2003
    Assignee: Sun Microsystems, Inc.
    Inventor: Noah Lieberman
  • Patent number: 6516422
    Abstract: A system and method for providing redundant, synchronized clocks in a computer system. Upon a failure of a master clock signal, the system switches over to a slave clock signal synchronized with the master clock signal. Switching logic is coupled to receive a first clock signal and a second clock signal. The switching logic selects either the first clock signal or the second clock signal as a local clock signal. The switching logic further monitors the first clock signal for a failure. If a failure is monitored, the switching logic accepts the second clock signal as the local clock signal in place of the first clock signal. One or more clock local loads operate according to the local clock signal. The switching logic may control the input to a phase locked loop (PLL) that provides the local clock signal to the local clock loads. The method includes a PLL synchronizing an output clock signal with the master clock signal. The output clock signal is used by at least one local clock load for timing.
    Type: Grant
    Filed: May 27, 1999
    Date of Patent: February 4, 2003
    Assignee: Sun Microsystems, Inc.
    Inventors: Drew G. Doblar, Leo Yuan, Emrys J. Williams
  • Patent number: RE37987
    Abstract: Elements on a network are selectively unmanaged by a network manager. An element is not managed when it is placed in a Pending state. Traps and events from the element in the Pending state are handled but not processed. The element can be automatically placed in the Pending state if a trap or event has been generated by that element.
    Type: Grant
    Filed: October 12, 2000
    Date of Patent: February 11, 2003
    Assignee: Sun Microsystems, Inc.
    Inventors: Sundararajan Yamunachari, Govindarajan Rangarajan