Abstract: A system including an application configured to request a key, a keystore configured to provide the key, wherein the keystore comprises a non-application specific directory, and an application-specific subdirectory.

Abstract: A comparison routine for comparing two data strings includes pre-processing, copying letters and digits into local buffers, comparing the contents of the local buffers using a left-to-right, walk-forward scanning algorithm, including selecting a first item from each buffer and comparing them and, if the two first items are the same, advancing to the next two items from each buffer, continuing with the comparison of subsequent buffer items until all pairs of items have been compared as long as no mismatch of items is found, and when a mismatch is encountered, the algorithm looks ahead in the data strings, searching for an identifiable pattern. A pair of independent search pointers are initially set to a first character in each data buffer and adjusted if a matching character pattern is found. A processing loop sequentially tests for a number of character patterns.

Abstract: One embodiment of the present invention provides a system that facilitates high-sensitivity detection of an anomaly in telemetry data from an electronic system using a telemetric impulsional response fingerprint of the telemetry data. During operation, the system applies a sudden impulse step change to one or more operational parameters of the electronic system during operation. Next, the system generates a three-dimensional (3D) telemetric impulsional response fingerprint (TIRF) surface from a dynamic response in the telemetry data to the sudden impulse step change. The system then determines from the 3D TIRF surface whether the telemetry data contains an anomaly.

Abstract: In a distributed computing environment, a message gate may be the message endpoint for a client or service to communicate with another client or service. Message gates may be pre-generated and built into the device. For example, message gates may be generated during the build of embedded software as a means of including a built-in secure message endpoint that does not have to be constructed at runtime. A generation tool may be provided for the pre-construction of gates. The generation tool may include an XML parser, a code generator and a code compiler. In one embodiment, the code generator may be a Java source code generator and the code compiler may be a Java code compiler. During the build of the software for which built-in message gates is desired, the generation tool is run with input from all the relevant XML schemas for which gates are desired. The parser may receive a message schema corresponding to each service or service type that a message interface will be desired in the device.

Abstract: A method for propagating reference and modification bit values into a translation table. The method includes issuing a write instruction including a virtual address, translating the virtual address to a corresponding physical address in a corresponding entry in a TLB, writing data to the corresponding physical address, setting at least one of a reference bit value or a modification bit value in the corresponding entry in the TLB, analyzing the TLB to identify any set reference bit values and set modification bit values, updating a corresponding entry in a translation table for each one of the identified set reference bit values and the identified set modification bit values and resetting the identified set reference bit values and the identified set modification bit values in the TLB.

Abstract: One embodiment of the present invention provides a system that efficiently marks cache lines in a multi-processor computer system. The system starts by receiving a load request for a cache line from a requesting thread. Upon receiving the load request, the system loads a copy of the cache line into a local cache for the requesting thread. The system then load-marks the copy of the cache line in the local cache by incrementing a reader count value contained in metadata for the copy of the cache line, regardless of the cache coherency protocol status of the copy of the cache line, whereby the system updates the metadata in the local copy of the cache line without obtaining exclusive access to the cache line.

Abstract: A system that generates a dynamic power-flux map for a set of computer systems. During operation the system determines the locations of the computer systems. Next, the system receives dynamic traces of power consumption for the computer systems, wherein a dynamic trace of power consumption for a given computer system is generated based on dynamic traces of monitored inferential variables for the given computer system. The system then correlates the locations of the computer systems with the dynamic traces of power consumption for the computer systems, and generates the dynamic power-flux map for the set of computer systems based on the correlated locations and the dynamic traces for the computer systems.

Abstract: In general, the invention relates to a method for creating a virtual network path. The method includes instantiating a number of virtual network interface cards (VNICs) on a number of virtual machines, where each virtual machines is located in one of the computers, each of the computers is connected using a chassis interconnect, and the computers share a physical network interface. The method further includes populating a virtual switching table associated with the VNICs and implementing the virtual network path using the virtual switching table. The virtual network path includes a first virtual wire between a first VNIC and a second VNIC, wherein the first VNIC is located in a first computer and wherein the second VNIC is located in a second computer selected from the plurality of computers.

Abstract: In general, embodiments of the invention relates to a method for controlling network traffic in a chassis. The method includes assigning control of a network express manager located in the chassis to a control virtual machine selected from a number of virtual machines. The method further includes configuring the network express manager, by the control virtual machine, where the network express manager is configured to route network traffic in the chassis. The method further includes implementing a virtual network path using the network express manager, where the virtual network path includes a virtual wire between a first VNIC and a second VNIC, where the first VNIC is located in a first computer and the second VNIC is located in a second computer.

Abstract: A device, system, and method are directed towards managing threads in a computer system with one or more processing units, each processing unit having a corresponding hardware resource. Threads are characterized based on their use or requirements for access to the hardware resource. The threads are distributed among the processing units in a configuration that leaves at least one processing unit with threads that have an aggregate zero or low usage of the hardware resource. Power may be reduced or turned off to the instances of the hardware resource that have zero or low usage. Distribution may be based on one or more of a number of specifications or factors, such as user power management specifications, power usage, performance, and other factors.

Abstract: In general, the invention relates to a method for monitoring virtual wires. The method includes selecting a first virtual wire to monitor, wherein the first virtual wire connects a first virtual network interface card (VNIC) located on a first computer to a second VNIC located on a second computer, where the first computer and the second computer are connected to a chassis, and where the first virtual wire is implemented by the chassis. The method further includes collecting usage statistics associated with the first virtual wire, and performing a first action using the collected usage statistics associated with the first virtual wire.

Abstract: In general, in one aspect, the invention relates to a method for scaling an application. The method includes executing a first instance of the application on a first computer in a chassis, where the first instance of the application is associated with a first VNIC and a second VNIC executing on the first computer. The method further includes loading a second instance of the application on a second computer in the chassis, where the second instance of the application is associated with a third VNIC and a fourth VNIC executing on the second computer. The method further includes re-programming a network express manager in the chassis to direct a portion of network traffic directed to the first VNIC to the third VNIC and executing the second instance of the application after the re-programming.

Abstract: One embodiment of the present invention provides a system that monitors a physical variable associated with an electronic component within a computer system. During operation, the system receives telemetry signals of the physical variable which are collected by one or more physical sensors associated with the electronic component. The system also collects electromagnetic interference (EMI) signals generated by the electronic component. Next, the system builds an inferential model for the physical variable by correlating the EMI signals with the telemetry signals. The system then uses the inferential model to infer values for the physical variable from the EMI signals.

Abstract: In general in one aspect, the invention relates to a method for reconfiguring a virtual network path. The method includes populating a virtual switching table associated with virtual network interface cards (VNICs), implementing the virtual network path using the virtual switching table, where the virtual network path includes a first virtual wire between a first VNIC located in a first computer and a second VNIC located in a second computer, placing a first network packet and a second network packet in a receive buffer associated with the second VNIC, transmitting the first network packet to the second VNIC using the virtual switching table, migrating the second VNIC from the second computer to a third computer, updating the virtual switching table based on migrating the second VNIC, and transmitting the second network packet to the second VNIC in the third computer using the virtual switching table.

Abstract: A method for dependent trust in a computer system is provided. In this method, trust dependency relationships are defined among components of the computer system, specifying, for a component, which components it relies on in ensuring the integrity or confidentiality of its code or data. Subsequently, trust dependencies are resolved and the results are used in performing certain operations described in Trusted Computing Group standards including generating an attestation reply, sealing data, and unsealing data. In addition, methods for computing an integrity measurement for a Core Root of Trust for Measurement of a trust-dependent component are included. A system for dependent trust in a computer system is also described.

Abstract: In general, the invention relates to a method for migrating virtual machines. The method includes obtaining migration criteria for a first virtual machine (VM) where the migration criteria is a bandwidth constraint for the first VM. The method further includes sending a request comprising the migration criteria to a second computer in the chassis, receiving a response to request from the second computer, where response indicates that the second computer can satisfy the migration criteria. The method further includes suspending execution of the first VM on the first computer and obtaining information to migrate the first VM, migrating the first VM and a first VNIC associated with the first VM, updating a virtual switching table in the chassis to reflect the migration of the first VM; and resuming execution of the first VM on the second computer.

Abstract: A method of identifying a shared main memory page containing a physical address corresponding to a virtual address included in an issued write instruction. The method includes determining the selected virtual address is not within a reach of a TLB entry that is currently loaded in the TLB. If one of the BBR entries includes the selected virtual address, then identifying one of the BBR entries that includes the selected virtual address, calculating a new TLB entry that includes the selected virtual address and loading the new TLB entry in the TLB.

Abstract: The present invention provides apparatus and method for controlling the asymmetrical properties of the response of a magnetic sensor element to a magnetic field produced by the digital data in a magnetic storage device. The present invention also provides an apparatus and method for controlling the bias point of a magnetic field produced by a magnetic sensor element.

Abstract: Provided are a method, system, and an article of manufacture for detecting errors while accessing a storage device. A host system writes an identical initialization pattern into each block of a plurality of blocks while formatting the storage device. Each block of the plurality of blocks has a checksum field capable of containing a value. Any host system generates an error when data from a retrieved block from the plurality of blocks computes to a checksum that is different from the value contained within the checksum field for the retrieved block, and the retrieved block does not contain the initialization pattern.

Abstract: Efficient trace cache management during self-modifying code processing enables selective invalidation of entries of the trace cache, advantageously retaining some of the entries in the trace cache even during self-modifying code events. Instructions underlying trace cache entries are monitored for modification in groups, enabling advantageously reduced hardware. One or more translation ages are associated with each trace cache entry, and are determined when the entry is built by sampling current ages of memory blocks underlying the entry. When the entry is accessed and micro-operations therein are processed, the translation ages of the accessed entry are compared with the current ages of the memory blocks underlying the accessed entry. If any of the age comparisons fail, then the micro-operations are aborted and the entry is invalidated. When any portion of a memory block is modified, the current age of the modified memory block is incremented.