Abstract: Incoming requests to a data storage system are distributed among one or more peer node computer systems of the data storage system in accordance with a load spreading configuration. A hash value is computed from the request utilizing selected header information of the request. The hash value is utilized in selecting a peer node computer system to receive the request in accordance with the load spreading configuration, and the request is redirected to the selected peer node computer system. In one embodiment, the load spreading configuration is implemented at a layer 2 switch and the load spreading configuration is reconfigurable by a peer node computer system of the data storage system.

Abstract: A software compliance test is typically directed only at particular classes in the inheritance hierarchy. Inherited APIs (classes), which are not the focus of the test, may cause the application under test (AUT) to fail the compliance test since some of the underlying classes differ from a reference implementation. Accordingly, a verification tool employs the same version and implementation of inherited APIs in the reference implementation of these inherited APIs as the application under test. A dynamic class loader examines class inheritance references made by the application under test to determine if the class is included in the API to be tested, or if the class is outside the scope of the API to be tested. If the class corresponds to the API to be tested, then the dynamic loader uses the reference implementation of the API for comparison. Otherwise, the reference implementation employs the same inherited class references as the application under test.

Abstract: One embodiment of the present invention provides a system that proactively monitors and detects metal whisker growth in a target area within a computer system. During operation, the system collects target electromagnetic interference (EMI) signals using one or more antennas positioned in the vicinity of the target area. Next, the system analyzes the target EMI signals to proactively detect the onset of metal whisker growth in the target area.

Abstract: A method and circuit for capturing and observing the internal state of an integrated circuit that utilizes a scan chain capable of capturing the functional state of an integrated circuit during functional testing without interrupting the functional testing. The functional state may be captured by and shifted out of the scan chain concurrently with functional testing. The scan chain includes sequential elements, each having a functional state and a scan state that operate in parallel. The method and circuit may further include a signature analyzer for compressing the contents of the scan chain into a signature. The method and circuit may capture and compress multiple functional states into a combined signature.

Abstract: Method and apparatus for the dynamic generation of Stubs and Ties in RMI-IIOP implementations. In embodiments, dynamic RMI-IIOP may generate Stubs and Ties as needed at runtime, rather than statically generating Stubs and Ties. In embodiments, the dynamic RMI-IIOP mechanism may be implemented as part of the ORB architecture, rather than as part of the application server architecture. In one embodiment, Ties may be dynamically generated by the server-side ORB using reflection. In embodiments, different mechanisms may be provided for dynamically generating Stubs on the client-side ORB. These mechanisms may include a dynamic proxy mechanism and an external library mechanism. One embodiment may provide a pluggable interface to the client-side ORB through which different dynamic Stub mechanisms may be plugged in. Some embodiments of dynamic RMI-IIOP may be configured to load statically generated Stubs for client processes where dynamic Stubs are not supported.

Abstract: System and method for multiplatform implementation of abstract software modules in peer-to-peer networking environments. A module class may have one or more module specifications. Each module specification may have one or more module implementations configured to execute within a particular execution environment. A unique module class identifier may be assigned to the module class. A unique module specification identifier may be assigned to each module specification of the module class. In one embodiment, a module specification advertisement may be generated for each module specification. A module implementation advertisement may be generated for each module implementation. In one embodiment, the module specification identifier of the corresponding module specification is included in each module implementation advertisement.

Abstract: System and method for the unique naming of resources in networked environments including peer-to-peer network environments. Embodiments may be used to generate network resource identifiers that uniquely identify resources such as processes over time and across the networked environment. One embodiment may be implemented as a resource name generator that generates unique identifiers for resources in networked environments. One embodiment may generate unique network resource identifiers for processes from information including, but not limited to, a host address that uniquely identifies on the network the host machine of the resource for which the unique network resource identifier is being generated, a current time (e.g. obtained from the host machine or alternatively from an external source such as an atomic time server), and a process identifier of the process that uniquely identifies the process among current processes on the host machine.

Abstract: A memory subsystem. A memory subsystem includes a memory controller coupled to a processor and a plurality of N memory modules. The memory controller is directly coupled to convey information to the Nth memory module through a downstream link, and is directly coupled to receive information from a first memory module through an upstream link. Each of the memory modules may be coupled to a prior memory module via a downstream link. Information conveyed from the memory controller to a particular memory module is conveyed to the Nth memory module through the downstream link and, as necessary, through additional downstream links to the particular memory module. Each of the memory modules may be coupled to receive data from a subsequent memory module via an upstream link. Information conveyed from a memory module to the memory controller is conveyed from the memory module through upstream links to the memory controller.

Abstract: A Compact Peripheral Component Interconnect (CPCI) system is provided that allows an Intelligent Platform Management Interface (IPMI) controller to be virtualized across many interested client entities. The system may include one or more interfaces that are provided by a virtualizing entity to allow a client application to obtain a handle to a virtual micro-controller, interfaces that are provided to reserve exclusive rights on certain IPMI commands on a particular virtual controller, and/or interfaces that are provided to request for a particular type of asynchronous message received on an IPMI micro-controller. In addition, the system may provide a reservation of IPMI sequence numbers over a virtual client and a usage of the IPMI sequence numbers to decide the intended virtual controller. The system may also be used to perform the many independent management tasks.

Abstract: An autonomic grid computing mechanism. In embodiments, peer-to-peer platform protocols may be integrated with a grid computing system. Embodiments may use peer-to-peer platform protocols as the transport for the grid computing system. Embodiments may provide one or more of, but not limited to, the following capabilities to grid computing systems: self-deployment and self-configuration, self-updating, self-healing, node removal, master node backup, monitoring, administration, load balancing, grid brokering, decentralized grid, and multi-grid support. Peer-to-peer platform protocols may be used to automatically configure compute nodes. When a node comes up, the node searches for a master node using the peer-to-peer platform. When the node finds a master node, it provides node information to the master node using the peer-to-peer platform. The master node may send the node grid configuration information using the peer-to-peer platform and the node may self-configure as a compute node.

Abstract: A system and method for providing advertisements in a peer-to-peer networking environment is described. In one embodiment, the peer-to-peer protocols may use advertisements to describe and publish the existence of peer resources. An advertisement may be defined as a structured, language neutral metadata structure that names, describes, and publishes the existence of a peer-to-peer platform resource, such as a peer, a peer group, a pipe, or a service. In one embodiment, user-defined advertisement subtypes (for example, using XML schemas) may be formed from these basic types. A peer in a peer-to-peer network may publish a resource advertisement to make the resource corresponding to the advertisement available to other peers on the network. Peers may discover published advertisements by broadcasting discovery query messages. Other peers may respond to discovery query messages by sending response messages that may include advertisements.

Abstract: A first data communication device (e.g., a thin client) receives data from a second communication device (e.g., a server or central computer) over a network. The first data communication device detects an actual bandwidth associated with receiving data from the second data communication device. Based on an actual detected bandwidth associated with receiving the data, the first data communication device generates a bandwidth metric identifying a proposed data rate for transmitting future data from the second communication device to the first data communication device. The first communication device transmits the bandwidth metric to the second data communication device for future data transmissions. Based on use of this technique, the second communication device transmits at or near a maximum possible bandwidth supported by a network link supporting transmission of data to the first data communication device.

Abstract: A software agent assembles prefetch hint instructions or prefixes defined in an instruction set architecture, the instructions/prefixes conveying prefetch hint information to a processor enabled to execute instructions according to the instruction set architecture. The prefetch hints are directed to control operation of one or more hardware memory prefetcher units included in the processor, providing for increased efficiency in memory prefetching operations. The hints may optionally provide any combination of parameters describing a memory reference traffic pattern to search for, when to begin searching, when to terminate prefetching, and how aggressively to prefetch. Thus the hardware prefetchers are enabled to make improved traffic prediction, providing more accurate results using reduced hardware resources. The hints may include any combination of specific pattern hints (one/two/N-dimensional strides, indirect, and indirect-stride), modifiers including sparse and region, and a prefetch-stop directive.

Abstract: System and method for dynamic loading of remote classes. Using embodiments, remote classes may be loaded dynamically by a default class loader without the use of separate, custom class loaders. The remote class loader mechanism may locate on remote systems classes needed by code executing on the local system but not locally stored, and which therefore cannot be located and loaded by the default class loader. After locating the classes, the remote class loader mechanism may obtain copies of the classes and save them to a location indicated by the class path of the default class loader. The default class loader can then locate and load the classes from the location indicated by the class path.

Abstract: Method and apparatus for RMI-IIOP implementation using Java serialization as a data encoding mechanism. Embodiments may provide a mechanism to use Java serialization rather than, or as an alternative to, CORBA Common Data Representation (CDR), for the marshaling and unmarshaling of data in RMI-IIOP message exchanges. In one embodiment, a server-side Object Request Broker (ORB) may be configured to support the encoding of data in RMI-IIOP messages in accordance with CDR encoding and Java serialization encoding. A client-side ORB may optionally use Java serialization or CDR as the data encoding format for RMI-IIOP messages to invoke the associated object on the server. Response messages from the server to the client may include data encoded according to Java serialization or CDR.

Abstract: A method for reading a block, involving receiving a request to obtain the block, wherein the request comprises a block pointer, determining a block endianness by reading an endianness bit, obtaining the block using the block pointer, and byte-swapping data in the block to obtain a byte-swapped block, if a host endianness does not match the block endianness.

Abstract: A multithreaded processor including a shared functional unit. In one embodiment, the multithreaded processor includes a functional unit coupled to a multithreaded instruction source that may request access to use the functional unit. The multithreaded processor may also include a processing unit that is coupled to request access to use the functional unit. The functional unit may be configured to execute one of an instruction provided by the multithreaded instruction source and an operation provided by the processing unit in a given cycle dependent upon which of the multithreaded instruction source and the processing unit has a higher priority.

Abstract: Many conventional lock-free data structures exploit techniques that are possible only because state-of-the-art 64-bit processors are still running 32-bit operating systems and applications. As software catches up to hardware, “64-bit-clean” lock-free data structures, which cannot use such techniques, are needed. We present several 64-bit-clean lock-free implementations: including load-linked/store conditional variables of arbitrary size, a FIFO queue, and a freelist. In addition to being portable to 64-bit software (or more generally full-architectural-width pointer operations), our implementations also improve on existing techniques in that they are (or can be) space-adaptive and do not require a priori knowledge of the number of threads that will access them.

Abstract: An integrated circuit test system. The test system includes a controller and an integrated circuit coupled to a voltage source and a current monitor. The controller causes the voltage source to supply a voltage to the integrated circuit, receives a signal from the current monitor indicating a power dissipation of the integrated circuit, and causes the voltage source to reduce the voltage until the signal from the current monitor indicates the power dissipation of the integrated circuit is less than a predetermined threshold. The controller stores in the integrated circuit in a non-volatile storage register that is accessible via a subset of access pins, a value corresponding to the voltage supplied to the integrated circuit when the power dissipation of the integrated circuit is less than the predetermined threshold. The subset of access pins provides at least one function in addition to accessing the non-volatile storage register.

Abstract: A multidata framework is provided to allow multiple payload buffers to be associated with a single multidata message. In the multidata framework of the present invention, a number of payload buffers are associated with the multidata following allocation of the multidata header buffer. The number of payload buffers can reside at disjoint virtual address locations in memory. Each payload buffer is assigned an index for identification purposes. A number of packets are defined to represent the multidata message. Each packet includes a header portion and a payload portion. The payload portion is defined as a set of payload spans. Each payload span is mapped to the payload portion of the appropriate packet by an appropriate payload buffer index and address range in the appropriate payload buffer. Thus, a packet's payload portion can include payload spans that are located at disjoint virtual address location in memory.