Abstract: Methods and apparatus for a first component to asynchronously invoke a second component are provided. In one embodiment of the invention, a computer-implemented method for a first component to invoke a second component asynchronously in an object-oriented computing environment is provided. A request is received from a first component to invoke a second component. The scope of the received request is maintained. A thread is provided for identifying the received request and invoking the second component, wherein the thread identifies an exception listener for handling exceptions associated with the invocation of the second component.

Abstract: A task executing at a server receives a request to package program code for remote execution on a client, and determines the software components that already reside at the client. The task uses this information to formulate a set of instructions to another task that creates the package. The created package is transmitted to the client, and program execution begins.

Abstract: A modular computer system mechanical interconnection includes a primary chassis having a first opening and a secondary chassis attached to the primary chassis and having a second opening, wherein the first opening and the second opening are generally aligned. The apparatus further includes a backplate covering the aligned first opening and second opening.

Abstract: A translation-lookaside buffer includes a content-addressable memory (CAM) cell to generate a CAM current signal with a first transistor configuration having a set of transistors of a predetermined size and connection. A reference current circuit generates a reference current signal with a second transistor configuration corresponding to the first transistor configuration, with the exception of the size and connection of selected transistors. A match sense amplifier selectively generates a match signal in response to the CAM current signal and the reference current signal.

Abstract: One embodiment of the present invention provides a system for allocating storage space for objects within a persistent object system. The persistent object system includes an object heap that is organized into a young generation region and an old generation region. The system uses the young generation region for newly created objects and uses the old generation region for objects that have not been removed by several garbage collection cycles. The system allocates storage space for new (transient) objects in the young generation region of the object heap. Periodically, the system copies the transient objects from the object heap to a stable store to form a checkpoint of the system state. Transient objects become persistent objects when they are copied to the stable store. Persistent objects are removed from the object heap when the system is stopped and when room is needed in the object heap for additional objects.

Abstract: The present invention comprises a method and apparatus for detection motion in video in which frames from an incoming video stream are digitized. The pixels of each incoming digitized frame are compared to the corresponding pixels of a reference frame, and differences between incoming pixels and reference pixels are determined. If the pixel difference for a pixel exceeds an applicable pixel difference threshold, the pixel is considered to be “different”. If the number of “different” pixels for a frame exceeds an applicable frame difference threshold, motion is considered to have occurred, and a motion detection signal is emitted. In one or more other embodiments, the applicable frame difference threshold is adjusted depending upon the current average motion being exhibited by the most recent frames, thereby taking into account “ambient” motion and minimizing the effects of phase lag.

Abstract: Embodiments consistent with the principles of the present invention provide improved results, compared to IEEE Std. 754, for floating point operations used in interval arithmetic calculations. One embodiment consistent with the principles of the present invention provides a method of enhancing support of an interval computation when performing a floating point arithmetic operation, comprising the steps, performed by a processor, of receiving a first floating point operand, receiving a second floating point operand, executing the floating point arithmetic operation on the first floating point operand and the second floating point operand, determining whether a NaN substitution is necessary, producing a floating point result if the NaN substitution is determined to be unnecessary, and substituting an alternative value as the floating point result if the NaN substitution is determined to be necessary.

Abstract: A method for searching, retrieving and displaying data from email storage locations is disclosed. The method of the present invention utilizes a search feature working with an email application to retrieve data from stored email messages. The search feature locates and retrieves data based upon a user-input search parameter. The retrieved data is inserted into a newly created document. The data is edited to redact any data that is duplicative.

Abstract: A system and method for performing Electronic Invoice Presentment and Payment (EIPP) dispute resolution processing with line item granularity is disclosed. A server makes available to a purchasing entity one or more invoices that each contain one or more line items that have been provided by a providing entity. A designated approver associated with the purchasing entity approves or rejects the line items and submits these decisions to the server. In response to disputed line items, the server initiates a dispute resolution process that includes making an indication of the disputed line items available to the providing entity, facilitating a provider resolution process whereby resolvers associated with the provider may dispute or approve the disputed line items reflected in the indication, and making the results of the provider resolution process available to the purchasing entity.

Abstract: A computer bus rack includes at least one circuit board. The circuit board has an increased density of add-on card slots, with the at least one circuit board having a front side and a back side, and the rack comprising a first plurality of slots coupled to the front side, and a second plurality of slots coupled to the back side. The first and second plurality of slots are arranged such that corresponding ones of the first and second slots are in substantial alignment, respectively. Also provided are a plurality of connectors having respective connector-pins extended in a direction substantially perpendicular to and away from the circuit board and having a column and row arrangement within the connectors. The connectors are affixed to the circuit board in alignment with the first and second plurality of slots, and each one of the plurality of connectors has connector-pins that are physically distinct from connector-pins of connectors of the other slots.

Abstract: A system and method for performing XML integration strategies in an server based system is disclosed. A requesting entity generates a request message for information managed by a server system. The request message is passed to a communications servlet operating within the server system. The servlet ensures the request message is in XML format and includes a transformer tag that designates the type of corresponding response message required. The XML servlet validates the request message to ensure it conforms to a particular document type definition. If so, the request message is parsed into an object model, and transferred to a manager process for processing the request. Then, the manager process produces a response message corresponding to the request massage. The response message is eventually passed to a transformer where the transformer tag is checked to determine what type of response message is required by the requesting entity.

Abstract: An improved signal buffer configuration has been developed for transmitting communication signals across line traces between ICs on a printed circuit board, printed wiring board, multi-chip module, integrated circuit carrier or package, or other interconnect substrate. For example, in some realizations, multiple ICs having mismatched input and output impedances are mounted on an printed circuit board and communicate with each other via line traces. A signal buffer IC is placed in-line with the connecting line trace. The buffer is sized to fit within the pitch spacing of the line trace and contains an input impedance control circuit and an output impedance control circuit. These impedance control circuits are adapted to receive a control signal to set the input and output impedances of the buffer to correspond to the impedances of the connecting line traces. In this manner, the impedances between the ICs connected by this line trace are effectively matched and transmission line errors between them are reduced.

Abstract: A system and method for performing Electronic Invoice Presentment and Payment (EIPP) processing at a line item granularity is disclosed. A server enables a purchasing entity to designate approvers for selected departments within the purchasing entity. The server receives from a providing entity invoices that each include one or more line items. The server processes the invoices and stores line item data associated with each line item in a database. Using the line items included in the invoices, the server determines departments that each line item is associated with and whether each department has a designated approver. In response to a notification message from the server, an approver may request access to invoice information associated with their department. The server accesses the database and makes available only information associated with line items included in the invoices that are associated with the approver's corresponding department.

Abstract: The present invention provides memory structures for efficient tracking and recycling of physical register assignments. This approach reduces the size of the memory structures needed to track the usage of physical registers and the recycling of these registers.

Abstract: The present invention provides an automated solution for generating a question document and an answer document from a database of questions and answers. The solution utilizes an extensible markup language to define the database. The database is then converted into a first Document Object Model (DOM) tree. The first DOM tree may then be used in prompting a user to enter the number of questions from each section to be generated. Once this input is received, nodes from the first DOM tree are randomly selected using the data received from the input. These randomly selected nodes are then used to create a second DOM tree representing the quiz or test. This second DOM tree may then be converted to a readable or printable format using a transformation, such as an stylesheet language transformation.

Abstract: Systems and methods for increasing the execution speed of virtual machine instructions for a function are provided. A portion of the virtual machine instructions of the function are compiled into native machine instructions so that the function includes both virtual and native machine instructions. Execution of the native machine instructions may be accomplished by overwriting a virtual machine instruction of the function with a virtual machine instruction that specifies execution of the native machine instructions. Additionally, the original virtual machine instruction may be stored so that the original virtual machine instructions can be regenerated.

Abstract: A graphics system configured to apply multiple layers of texture information to primitives. The graphics system receives parameters defining a primitive and performs a size test on the primitive. If the size test cannot guarantee that a fragment size of the primitive is less than or equal to a fragment capacity of a texture accumulation buffer, the primitive is divided into subprimitives, and the graphics system applies the multiple layers of texture to fragments which intersect the primitive. The graphics system switches from a current layer to the layer next when it has applied textures corresponding to the current layer to all the fragments intersecting the primitive. The graphics system stores color values associated with the primitive fragments in the texture accumulation buffer between the application of successive texture layers.

Abstract: A computer graphics system that utilizes a super-sampled sample buffer and a programmable sample-to-pixel calculation unit for refreshing the display, wherein the graphics system may adjust filtering to reduce artifacts or implement display effects. In one embodiment, the graphics system may have a graphics processor, a super-sampled sample buffer, and a sample-to-pixel calculation unit. The graphics processor renders a plurality of samples and stores them into a sample buffer. The sample-to-pixel calculation unit reads the samples from the super-sampled sample buffer and filters or convolves the samples into respective output pixels which are then provided to refresh the display. The sample-to-pixel calculation unit may selectively adjust the filtering of stored samples to reduce artifacts, e.g., is operable to selectively adjust the filtering of stored samples in neighboring frames to reduce artifacts between the neighboring frames.

Abstract: A platform independent analysis architecture analyzes memory images for computer programs. The analysis architecture is platform independent in that it is not tied to a particular version of a computer program and is not dependent on the presence or absence of patches. In addition, the analysis architecture is not tied to the hardware architecture on which the analysis architecture runs. The analysis architecture dynamically determines data type definitions for a computer program to account for the hardware architecture on which the computer program runs, the version of the computer program that is running and the presence or absence of patches. As a result, accurate views of data types may be discerned at run time so that the views of the data types may be employed in analyzing memory images such as crash dumps and run time dumps. This analysis architectures greatly assists parties in debugging computer programs as a result.

Abstract: Apparatus, methods and computer program products are disclosed that allows a thread-unaware routine that accesses an operation-dependent temporary data structure to be shared by multiple threads in a multi-threaded computing environment. The programmer for an operation provides three routines—a pre-processing routine, a operation routine, and a post-processing routine. The pre-processing routine allocates the operation-dependent temporary data structure. The operation routine accesses the operation-dependent temporary data structure to perform its operation for each thread that invokes the operation routine. The post-processing routine deallocates the operation-dependent temporary data structure when it is no longer needed.