Abstract: A memory cache method and apparatus with two memory execution pipelines, each having a translation lookaside buffer (TLB). Memory instructions are executed in the first pipeline (324) by searching a data cache (310) and a prefetch cache (320). A large data TLB (330) provides memory for storing address translations for the first pipeline (324) A second pipeline (328) executes memory instructions by accessing the prefetch cache (320). A second micro-TLB (340) is associated with the second pipeline (328). It is loaded in anticipation of data that will be referenced by the second pipeline (328). A history file (360) is also provided to retain information on previous instructions to aid in deciding when to prefetch data. Prefetch logic (370) determines when to prefetch data, and steering logic (380) routes certain instructions to the second pipeline (328) to increase system performance.

Abstract: Programmable logic structures include logic blocks that operate at very low supply voltages. According to the invention, a pass transistor is positioned between logic blocks. Since the logic blocks of the invention operate at very low supply voltages, the pass transistor can be overdriven on, thereby reducing the added resistance. In one embodiment of the invention, the pass transistor is a low threshold transistor. In this embodiment, the pass transistor is also overdriven off to reduce leakage current and further isolate the logic blocks.

Abstract: An apparatus and method for selectably including a mass storage device in an expansion card space of a computer system, particularly an expansion card area lacking a space dedicated solely for the mass storage device. An apparatus according to the invention includes a mass storage frame, and an interface board to couple the mass storage device to an expansion card slot on backplane in the computer system. A computer system includes the apparatus. Another computer system includes a removable support frame for supporting a mass storage device, the removal of which allows a larger expansion card or an additional expansion card to be inserted into the backplane.

Abstract: Buried platform wells are specifically used to electrically interact with the platform transistors of the invention. The dopant concentration distribution of the buried platform wells is used to change the threshold voltage of the platform transistors of the invention by introducing a tail dopant concentration into the active region of the platform transistors. The platform transistors of the invention can also be used in conjunction with standard transistors, on a single structure, to provide both low and relatively high threshold voltage transistors on a single structure. Consequently, using the method and structure of the invention, considerable versatility and design flexibility are achieved with minimum additional structural complexity.

Abstract: A method for providing a floating point product consistent with the present invention includes multiplying a subprecise operand and a non-subprecise operand using a plurality of intermediate stages. The method further includes correcting an error introduced by the subprecise operand by performing an operation in conjunction with a one of the plurality of intermediate stages utilizing a compensating summand.

Abstract: Methods and apparatus for reducing computing overhead by creating fast, local-only objects in a distributed client/server based computing system are disclosed. In one aspect of the invention, within an object-based computing system, a method for creating an object reference that is associated with a local-only servant object includes implementing a first base class to create a first object that represents the object reference, and obtaining a local-only create closure. An operation is called on a second base class using the local-only create closure. The operation creates a server-side representation associated with the local-only servant object, and is stored in the first object that represents the object reference. In one embodiment, creating the local-only create closure includes creating a skeleton object and calling a local m-table builder for the skeleton object.

Abstract: An interactive applet for testing a user in a web-based learning environment. The interactive applet is embedded in a course page of a web-based curriculum. The applet provides a set of images to a user regarding the information presented in the course and instructs the user to match each image with a corresponding description in a set of descriptions. The applet provides feedback to the user, and allows the user to revise an incorrect answer.

Abstract: An embodiment of the invention is a floating point flag combining or accumulating circuit comprising an analysis circuit that receives a plurality of floating point operands, each having encoded status flag information, and a result assembler. The analysis circuit analyzes the plurality of floating point operands and provides an indication of one or more predetermined formats in which the plurality of floating point operands are represented. The result assembler receives the indication from the analysis circuit and assembles an accumulated result that represents a value and combines the encoded status flag information from at least two of the plurality of floating point operands.

Abstract: A floating point operand testing circuit includes an analysis circuit and a result generator circuit coupled to the analysis circuit. The analysis circuit determines the status of a floating point operand based upon data within the operand. An operand buffer may supply the operand to the analysis circuit. The result generator circuit is responsive to at least one control signal and asserts a result signal if the floating point analysis circuit matches the floating point status to a predetermined format specified by the control signal. The result signal can condition the outcome of a floating point instruction. The result generator may also respond to multiple control signals asserted when testing a single operand for different formats, such as not-a-number (NaN), infinity, normalized, denormalized, invalid operation, overflow, underflow, division by zero, exact, and inexact.

Abstract: A logarithm unit computes an integer part of a logarithm of a floating point operand according to an embodiment of the present invention. The logarithm unit analyzes a format of the floating point operand and generates at least one signal representative of the format. The logarithm unit determines a magnitude of an unbiased exponent of the floating point operand as an intermediate result based on the at least one signal, wherein the unbiased exponent is represented by unbiased exponent bits. Still further, the logarithm unit determines an exponent field and a fraction field high part of the intermediate result.

Abstract: A floating point max/min circuit for determining the maximum or minimum of two floating point operands includes a first analysis circuit configured to determine a format of a first floating point operand of the two floating point operands based upon floating point status information encoded within the first floating point operand, a second analysis circuit configured to determine a format of a second floating point operand of the two floating point operands based upon floating point status information encoded within the second floating point operand, a decision circuit, coupled to the first analysis circuit and to the second analysis circuit and responding to a function control signal that indicates the threshold condition is one of a maximum of the two floating point operands and a minimum of the two floating point operands, for generating at least one assembly control signal based on the format of a first floating point operand, the format of a second floating point operand, and the function control signal,

Abstract: A floating point comparator circuit for comparing a plurality of floating point operands includes a plurality of analysis circuits, one for each of the floating point operands, configured to determine a format of each of the floating point operands based upon floating point status information encoded within each of the floating point operands, and a result generator circuit coupled to the analysis circuits, the result generator circuit configured to generate a result signal based on the format determined by each analysis circuit and based on a comparative relationship among the floating point operands. The format of each of the floating point operands may be from a group comprising: not-a-number (NaN), infinity, normalized, denormalized, zero, invalid operation, overflow, underflow, division by zero, exact, and inexact.

Abstract: A method and system determine a high part of a floating point operand. Exponent field bits and fraction field bits of a result are set to a zero if the determined format is an infinity format or an overflow format. The exponent field bits and the fraction field bits of the result are set to corresponding exponent field bits and corresponding fraction field bits of the floating point operand if the determined format is a not-a-number (NaN) format. At least one of the fraction field bits of the result is adaptively cleared if the determined format is a denormalized format or a delimited format.

Abstract: A system and method for automatically selecting decoupling capacitors for an electronic device. The system determines a localized drive strength for each component in the electronic device. Based on a summation of drive strengths for components in a given area of the electronic device, the system determines whether a decoupling capacitor is necessary to provide local power bus stability.

Abstract: A method is provided to facilitate the re-creation of a destroyed database system by saving the database configuration data into a database configuration file. A human-readable database configuration file is created by retrieving configuration data from the system databases as well as the user databases. The database system can be configured so that periodically a procedure is automatically run to create the database configuration file. The procedure also creates scripts which can be executed to re-create a database.

Abstract: A method and apparatus for local advertising. Internet Service Providers (ISPs) or proxies owned by an ISP insert advertisements transmitted from a web host to a client. The advertisement may be stored in the proxy's cache or may be retrieved from a web server for an advertiser. By providing the ISP with the ability to insert the advertisement, advertisements appear on small web sites that do not normally attract advertisers. Additionally, due to the number of advertisements placed by an ISP, small advertisers may have their advertisement appear in connection with frequently used web sites. One or more embodiments of the invention provide for an ISP to collect and store demographic information such as the user's age, residence, credit history, etc. Additionally, stored information may include web sites the user has accessed, time spent on each web site, and any searches performed by the user.

Abstract: Remote method invocation using a generic proxy class. A client machine transmits a call for invocation of a method of a remote object including an identifier for the method object. A server machine receives the identifier and uses generic code to invoke the method object and return an indication of the invoked method along with any relevant parameters.

Abstract: A one-hot Muller C-element, wherein an event received on each of a plurality of inputs results in an event being output, can be implemented with complementary inputs and a true transistor pair comprising one transistor having a gate coupled to a first true input and another transistor having a gate coupled to a second true input; a true arm comprising the true transistor pair, coupled in series between a complement output and ground, and a true pull-up transistor, coupled between the complement output and a source; a true arm pull-up logic gate, coupled at its inputs to complement input wires of the one-hot Muller C-element and coupled at its output to a gate of the true pull-up transistor; a complement transistor pair comprising one transistor having a gate coupled to a first complement input and another transistor having a gate coupled to a second complement input; a complement arm comprising the complement transistor pair, coupled in series between a true output and ground, and a complement pull-up transis

Abstract: A client/server computer system comprising: a communication link; a plurality of server computers including a dual-role proxy server computer connected to the communication link; a storage device connected to the communication link for storing information; and at least one client computer connected to the communication link. The client computer generates requests to the proxy server computer for processing certain information on the storage device. In response, the proxy server computer accesses said information on the storage device and associates program instructions to the information for processing the information. Thereafter, the proxy server computer processes the information according to the program instructions.

Abstract: Methods and apparatus for speculatively locking an object are disclosed. According to one aspect of the present invention, a method for acquiring use of an object using a current thread includes a determination of whether a first bit included in the object is set to indicate that the object is speculatively owned by a speculative owner thread. When the object is speculatively owned, the speculative owner thread is allowed to use the object without locking the object. The method also includes checking a stored identifier that is associated with the object and identifies the speculative owner thread, as well as determining whether the stored identifier identifies the current thread. When the stored identifier identifies the current thread, the current thread already has use of the object; i.e., the current thread is the speculative owner thread.