Abstract: Methods and apparatus for implementing an atomic monitor wait operation are disclosed. According to one aspect of the present invention, a computer-implemented method for implementing an atomic monitor wait operation includes creating a semaphore specific to a first thread. The semaphore is then placed in a wait queue associated with an object whose object lock is owned by the first thread in order to, in one implementation, preserve queue order. The first thread then exits a monitor associated with the object by, in one embodiment, releasing the object lock. The first thread then suspends execution until the semaphore receives notification that the object lock is available.

Abstract: One embodiment of the present invention provides a system for amplifying an input signal received from a capacitive sensor. The system includes an input for receiving an input signal from the capacitive sensor and an amplifier that amplifies the input signal to produce an output signal. This amplifier includes a pull-up circuit that pulls the output signal up to a high voltage when the input signal exceeds a threshold voltage. It also includes a pull-down circuit that pulls the output signal down to a low voltage when the input signal falls below the threshold voltage. After the output signal is pulled up to the high voltage, the pull-up circuit enters a refractory state in which the pull-up circuit uses a limited current, and the pull-down circuit enters a receptive state in which the pull-down circuit is sensitized to react to small changes in the input signal.

Abstract: A mechanism for dispatching a sequence of packets via a telecommunications network includes a queue for packets for transmission and a queue controller responsive to receipt of a new packet for transmission to compare parameters of the new packet to parameters of any packet already in the queue, the queue controller determining whether to queue or drop the new packet depending on the result of the comparison(s). The queue can be implemented as a linked list of packet entries with individual pointers to the respective packets concerned. The queue entries can include details relating to the packet including data relating to the information flow and also the packet identity. In a TCP environment, the flow information can include the source IP address and the source TCP port, as well as the destination IP address and the destination TCP port. The identity information can include sequence numbers and acknowledgement numbers for the packet concerned.

Abstract: A telephone device and method for operating the telephone device. The telephone device has one bi-directional line connecting the telephone device to central office switching equipment. A memory in the telephone device contains at least one nontelephony application program. An application in the memory of the telephone device provides a method that determines when the telephone device is in an off-hook condition. The method then determines that at least one nontelephony application program command has been requested. In response to receiving the request, the method executes the at least one nontelephony application program command while the telphone device is in the off-hook condition.

Abstract: A HASS testing system provides for testing and tuning of a bus system of an electronic device having a bus interface coupled with a bus characterized by a number of parameters.

Abstract: A carrier assembly for a storage device includes a body portion for mounting to the storage device, a side extension of the body portion extending laterally beyond the first lateral side of the storage device, and a light conduit provided on the side extension. The light conduit is adapted to transmit light signals from a first end of the light conduit to a second end of the light conduit. The first end of the light conduit positioned to receive the light signals from a light source positioned laterally adjacent to the first lateral side of the storage device.

Abstract: A method and system providing for electrical testing of an integrated semiconductor substrate having at least two signal processing layers. The substrate may be provided with a protective layer of plastic, silicon, silicon oxide, silicon nitride or the like. A selected region of one substrate layer to be tested electrically is exposed by etching or otherwise forming a controllably small aperture any overlying substrate layer(s) away to expos at least one selected circuit trace in the selected region and applying a selected electrical signal to the trace. Optionally, a second aperture, spaced apart from the first aperture, can be formed to expose a second selected circuit trace so that propagation of a signal in one or more substrate circuits can be tested. The aperture cross-sectional shapes may be linear or curvilinear polygons or other suitable shapes.

Abstract: A circuit board retaining assembly for coupling a component to a chassis without concern for the loss of mounting hardware, such as for coupling computer hardware to a computer chassis, and for doing so particularly when the component is in operation. The retaining assembly includes a mounting bracket for mounting the assembly to the chassis, a lever extending from the mounting bracket, and a lever biasing member for pivotally biasing the lever away from the chassis when the component is installed in or removed from the chassis. The mounting bracket includes at least one lever opening for receiving the lever. The lever includes a first end for releasably coupling the component to the chassis. The lever-biasing member is disposed between the mounting bracket and the lever to bias the lever away from the chassis when it is disengaged from the chassis.

Abstract: A method for improving integrated circuit by using a patterned bump layout on a layer of the integrated circuit is provided. The method creates various bump structures by varying an angle between a line from a reference bump to a first bump and a line from the reference bump to a second bump. By varying the angle, a designer may generate a particular bump structure that meets the needs of a particular design. Further, a particular bump placement may be repeated across all or a portion of the metal layer in order to create a patterned bump layout.

Abstract: The present invention provides a method and apparatus for efficient electronics positioning and connection systems. In one embodiment of the present invention, electronic components are inserted into a connection rack from the front such that connections face the front side of the connection rack. In another embodiment of the present invention, electronic components are inserted into a connection rack from a side such that connections face the front side of the connection rack. In one embodiment, a connection rack is positioned with the back side against a wall. In another embodiment two connection racks are positioned such that the back side of a first connection rack is against the back side of a second connection rack. In one embodiment, a power supply is positioned near the top of the connection rack. A common power line couples the power supply to the electronic components. Thus, the need for heat-producing power supplies in each component is eliminated.

Abstract: A system for protecting data and correcting bit errors due to component failures includes a check bits generation unit which receives and encodes data to be protected. The check bits generation unit effectively partitions the data into a plurality of logical groups. The check bits generation unit generates a parity bit for each of the logical groups, and additionally generates a global error correction. The global error correction code is equivalent to the result of generating individual error correction codes for each logical group and combining them in a predetermined manner. An error correction unit is coupled to receive the plurality of data bits and the check bits following storage or transmission. A global syndrome code is generated such that, with knowledge of the specific logical groups that have a single bit error, a value indicative of the location of the error in such groups may be derived from the global syndrome code.

Abstract: Low voltage latches are designed such that all the transistors included in the latch are low threshold transistors and voltage scalability of the latches of the invention is further increased by designing latches with uniform stack height components. One embodiment of the invention allows for minimum supply voltages of 60 millivolts, an improvement of over thirteen hundred percent compared with the typical prior art minimum voltage requirement of 800 millivolts.

Abstract: Methods and systems for enabling communications between a first private network and a second private network configured from nodes in a public network. When communicating a packet from the first private network to the second private network, a computer receives a packet from a source node in the first private network. The computer then determines whether the packet is destined for the second private network. Thereafter, if the packet is destined for the second private network, the computer forwards the packet to a destination node in the second private network. When communicating a packet from the second private network to the first private network, a computer receives a packet from a source node in the second private network. The computer then determines whether the packet is destined for the second private network. Thereafter, if the packet is not destined for the second private network, the computer forwards the packet to a destination node in the first private network.

Abstract: Apparatus and methods for segmenting sets of distinct entities into groups with associated boundaries, wherein the associated boundaries have an associated logic are disclosed. The interaction of an object, a set of objects, another group, or combinations thereof with a group's associated boundary is accounted for by the logic of the invention such that the group and its associated boundary are modified with respect to the interaction.

Abstract: A graphical user interface (GUI) application executed on a computer system is provided that generates a text component in a graphical user interface (GUI). Initially, a user interface style is selected for the text component displayed on a GUI. This can be automatically selected by the GUT application or a user. The GUI application then delegates implementation of the user interface style within the text component to a text user interface object and delegates implementation of a text editor within the text component to an editor kit object. The editor kit object generates the text editor for the text component customized according to the type of text being edited. The text user interface object then displays the text component and the text editor with the selected user interface style.

Abstract: One embodiment of the present invention provides a system for efficiently perform a modification (cmod) operation in solving a system of linear algebraic equations involving a sparse coefficient matrix. The system operates by identifying supernodes in the sparse matrix, wherein each supernode comprises a set of contiguous columns having a substantially similar pattern of non-zero elements. In solving the equation, the system performs a cmod operation between a source supernode and a destination supernode. As part of this cmod operation, the system determines a subset of the source supernode that will be used in creating an update for the destination supernode. The system partitions the subset into a plurality of tiles, each tile being a rectangular shape of fixed dimensions chosen so as to substantially optimize a computational performance of the cmod operation on a particular computer architecture.

Abstract: A system, method and computer program product for searching for, and retrieving, profile (or directory) attributes based on other attributes of the target profile and that of associated profiles. In a specific implementation, the LDAP RFC 2254 string search syntax may be utilized to allow multiple related search filters to be specified at one time. The first of the sequence of query strings defined is used as a filter to retrieve candidate results and the succeeding filters, or query strings, are used to determine if a specific profile or directory should even be considered.

Abstract: A handheld computing device is used to copy files from the screen of a fixed computer. The display of the handheld device is linked to that of the underlying computer and file and directory icons together with their underlying files are copied to the handheld device. Files from the handheld device can also be transferred to the fixed computer. When a user is running a program on the fixed computer, he may capture the state of that computer and transfer everything needed to permit execution of that program to continue uninterrupted on the handheld device. Thus files and executing programs may be lifted from the fixed computer and used on the handheld device.

Abstract: A method for synchronizing two data sets includes computing a signature for a first data set in a first address space and a signature for a second data set in a second address space using a one-way hash function and comparing the signatures for the first and second data sets to determine whether they are identical. If the signatures are not identical, the method further includes identifying an area of difference between the first data set and the second data set and transferring data corresponding to the area of difference between the first data set and the second data set from the first data set to the second data set.

Abstract: A multiprocessor system is disclosed that employs an apparatus and method for caging a redundant component to allow testing of the redundant component without interfering with normal system operation. In one embodiment the multiprocessor system includes at least two system controllers and a set of processing nodes interconnected by a network. The system controllers allocate and configure system resources, and the processing nodes each include a node interface that couple the nodes to the system controllers. The node interfaces can be individually and separately configured in a caged mode and an uncaged mode. In the uncaged mode, the node interface communicates information from either of the system controllers to other components in the processing node. In the caged mode, the node interface censors information from at least one of the system controllers.