Abstract: A method for automatic extraction of design properties of a hardware design, is provided. The method includes running a hardware design simulation to generate simulation results for the hardware design. The simulation results are then analyzed to extract properties. The extracted properties can be a powerful tool for the design engineers and the test-writers to learn more about the functional coverage of the test suites.
Abstract: Methods and apparatuses are disclosed for automatically generating software and configuring software application installation. Some embodiments may include a method of configuring one or more hardware resources within an enterprise, the method comprising the acts of installing at least one software application on the one or more hardware resources, orienting one or more logical areas within the one or more hardware resources, implementing one or more communication protocols between the one or more logical areas, and generating infrastructure for the at least one software application during the act of installing, wherein the infrastructure is based on predetermined choices.
Abstract: Methods and apparatuses are presented for reducing the power consumed in an in-line memory module. In some embodiments, the method may include monitoring a memory requirement of a computer system, the computer system comprising a plurality of memory modules. In the event that the memory requirement changes, unmapping at least one of the plurality of memory modules and maintaining a low power state for the at least one unmapped memory module. The method may further comprise selectively re-initializing the plurality of memory modules such that the at least one unmapped memory module remains in a low power state while the remainder of the plurality of memory modules are in a non-low power state. Where, in the event that the memory requirement changes again, the method also may comprise re-programming the memory controller with an identifier associated with the at least one unmapped memory module.
Abstract: In a computer system that uses a “snapshot-at-the-beginning” garbage collector and in which write barrier code is generated for pointer write instructions in order to support the operation of the garbage collector, a static analysis of the computer program source code is performed prior to generating compiled code for the application and garbage collector in order to identify source code instructions that, at runtime, will perform initializing pointer writes as indicated by the fact that they overwrite memory locations that contain a predetermined pre-write value, such as NULL. The identified instructions are then compiled in a conventional manner, but no write barrier code is generated for them. Thus, at runtime, those instructions that perform initializing writes will incur no write barrier cost penalty.
Abstract: An apparatus for redundancy of a memory array includes a primary memory array including a plurality of memory cells, one or more of which are defective. A redundant array includes a CAM array that includes a plurality of memory cells. The CAM array is addressed by the address of a defective memory location within the primary memory array and provides a match identification and a resource identification. The redundant array also includes a translation array wherein an offset to configure an input/output multiplexer is stored. The redundant array also includes a redundant data array including a plurality of memory cells wherein one or more memory cells of the redundant data array are used instead of one or more defective memory cells of the primary array.
Type:
Grant
Filed:
June 18, 2008
Date of Patent:
March 23, 2010
Assignee:
Sun Microsystems, Inc.
Inventors:
Ioannis Orginos, Mamun Rashid, Mark E. Steigerwald
Abstract: In one embodiment, a method and apparatus for a mechanism for data migration across networks is disclosed. The method includes: randomly selecting a template from a local cache at an agent, the template indicating one or more characteristics of event data entities the agent is searching for; querying, via random connections from the agent, one or more other connected agents for the event data entities matching the template; if a matching event data entity for the template is found, returning the matching event data entity to the local cache of the agent; and if a matching event data entity for the template is not found, diffusing the template to the one or more other connected agents via a data diffusion process. Other embodiments are also disclosed.
Abstract: A multiple-core processor providing flexible mapping of processor cores to cache banks. In one embodiment, a processor may include a cache including a number of cache banks. The processor may further include a number of processor cores configured to access the cache banks, as well as core/bank mapping logic coupled to the cache banks and processor cores. The core/bank mapping logic may be configurable to map a cache bank select portion of a memory address specified by a given one of the processor cores to any one of the cache banks.
Type:
Grant
Filed:
February 23, 2005
Date of Patent:
March 23, 2010
Assignee:
Sun Microsystems, Inc.
Inventors:
Ricky C. Hetherington, Manish K. Shah, Gregory F. Grohoski, Bikram Saha
Abstract: Methods and systems consistent with the present invention establish a virtual network on top of current IP network naming schemes. The virtual network uses a separate layer to create a modification to the IP packet format that is used to separate network behavior from addressing. As a result of the modification to the packet format, any type of delivery method may be assigned to any address or group of addresses. The virtual network also maintains secure communications between nodes, while providing the flexibility of assigning delivery methods independent of the delivery addresses.
Type:
Grant
Filed:
August 11, 2005
Date of Patent:
March 23, 2010
Assignee:
Sun Microsystems, Inc.
Inventors:
Germano Caronni, Amit Gupta, Sandeep Kulmar, Tom R. Markson, Christoph L. Schuba, Glenn C. Scott
Abstract: A method for remote services authentication in an internet hosted environment includes a high level process and functionality for a secure, practical and logically optimized inter-network authentication mechanism by employees, partners and customers of an enterprise into the hosted Internet site. The lightweight authentication and authorization mechanism can be most effectively implemented in Java as part of the application or web server servlet. The method for remote services authentication includes initial secure password establishment, subsequent authentication and authorization, as well as authentication and authorization upon resuming previously run sessions with the hosted server using Internet cookies.
Abstract: A fan assembly for an electronic device is provided. The assembly comprises a fan housing, at least one bracket member, and at least one retention peg. The fan housing defines a recess therein for directing heat away from a electrical components positioned within the electronic device. The bracket member supports the fan housing within the electronic device. The retention peg is disposed about the bracket member and includes a plurality of ribs for insertion into the recess to retain the bracket member to the fan housing.
Type:
Grant
Filed:
August 28, 2008
Date of Patent:
March 23, 2010
Assignee:
Sun Microsystems, Inc.
Inventors:
Clifford B. Willis, William A. De Meulenaere, Brett C. Ong
Abstract: We present a technique for implementing obstruction-free atomic multi-target transactions that target special “transactionable” locations in shared memory. A programming interface for using operations based on these transactions can be structured in several ways, including as n-word compare-and-swap (NCAS) operations or as atomic sequences of single-word loads and stores (e.g., as transactional memory).
Type:
Grant
Filed:
July 16, 2003
Date of Patent:
March 23, 2010
Assignee:
Sun Microsystems, Inc.
Inventors:
Mark S. Moir, Victor M. Luchangco, Maurice Herlihy
Abstract: A method for locating a free resource involves maintaining an address space containing a plurality of regions, wherein each of the plurality of regions is mapped with a server to obtain a mapping, transmitting a request for the free resource from a client to a request address that belongs to one of the plurality of regions, determining a selected server using the mapping, and directing the request for the free resource to the selected server.
Type:
Grant
Filed:
February 10, 2005
Date of Patent:
March 23, 2010
Assignee:
Sun Microsystems, Inc.
Inventors:
Germano Caronni, Raphael J. Rom, Glenn Carter Scott
Abstract: For a flexible error trace mechanism, embodiments may be implemented for C/C++ interface libraries, or in programs written in C/C++ or other programming languages. In one embodiment, when an error occurs in a function call, a trace element may be recorded that may include the source file name, function name, line number and other information that may be used to identify the error. In one embodiment, the library function may call a plurality of library functions in a function call stack. For each of the plurality of library functions, if the library function generates an error, an error trace element may be added to the error trace. After completion of the library function, the program may obtain the error trace for the library function. The error(s), if any, may be debugged using the information in the obtained error trace.
Type:
Grant
Filed:
August 28, 2003
Date of Patent:
March 23, 2010
Assignee:
Sun Microsystems, Inc.
Inventors:
Amy H. Kang, Joseph F. Di Pol, Linda K. Schneider, Christopher S. Kasso
Abstract: A method for analyzing an application involving obtaining a thread dump of a plurality of threads executing the application, analyzing the thread dump to obtain a result using an aggregation mechanism, and determining a potential error location in source code of the application using the result.
Abstract: Kernel and user stack data is stored in relocatable memory. A kernel thread or a user thread can move its own stack data by creating a relocation request and adding the relocation request to a queue of a dedicated thread. The dedicated thread performs the relocation on behalf of the requesting kernel or user thread.
Type:
Grant
Filed:
October 12, 2004
Date of Patent:
March 23, 2010
Assignee:
Sun Microsystems, Inc.
Inventors:
Udayakumar Cholleti, Viswanath Knishnamurthy, Stan J. Studzinski
Abstract: System and method for disconnected operation of thin-client applications. In embodiments, a thin client on a client system may be used to access an application on a server via a network. Prior to the thin client disconnecting from the application, a version of the application including at least a portion of the application logic of the application may be downloaded to the client system to be accessed using the thin client during disconnected operation of the client system. After reconnection of the thin client to the application, changes made, if any, to application data on the client system may be integrated into the application data on the server.
Abstract: A system and method is provided for designing (or re-architecting) a personal digital assistant (PDA) as a portable thin client of a network. The portable thin client is a small, stateless, “plug and work” computer whose main function is to process all input and output for the user, as well as to manage communication with at least one server. All other computational tasks (or services) for the user of the PDA are performed on the server which is shared amongst a community of thin clients. As a result of re-architecting the PDA as a portable thin client, there is no need to download application(s) and operating system(s) running the application(s) to the PDA because the server—through the network—provides these services. In addition, no data is lost when a PDA is faulty or has to be changed.
Abstract: An apparatus and method for implementing a unified hash algorithm pipeline. In one embodiment, a cryptographic unit may include hash logic configured to compute a hash value of a data block according to a hash algorithm, where the hash algorithm is dynamically selectable from a plurality of hash algorithms, and where the hash logic comprises a plurality of pipeline stages each configured to compute a portion of the hash algorithm. The cryptographic unit may further include a word buffer configured to store the data block during computing by the hash logic.
Type:
Grant
Filed:
October 19, 2004
Date of Patent:
March 23, 2010
Assignee:
Sun Microsystems, Inc.
Inventors:
Christopher H. Olson, Leonard D. Rarick, Gregory F. Grohoski
Abstract: A method for detecting a race condition using static analysis that includes determining a first permit set and a second permit set, and performing a static analysis, wherein the static analysis comprises using the first permit set and the second permit set to detect a race condition, wherein the static analysis is performed before accessing critical data and includes determining whether the intersection of the first permit set and the second permit set is empty, and if the intersection of the first permit set and the second permit set is empty, then outputting a value indicating the detection of a race condition.
Abstract: Techniques for providing and using schema data for markup languages are disclosed. A schema model can be used to generate signed (or verifiable) schema data (e.g., XML schema data). The model can be used as a standard model that provides enhanced security and better performance. As a result, schema data can be verified more efficiently. A base class for XML schema data is provided. The base class can be instantiated to generate an XML schema file (or document). A digital signature can then be applied to the XML schema file to generate a signed XML schema file (or document). Furthermore, the resolution of data can be achieved more efficiently for markup languages because the resolution of data can be achieved systematically. In addition, techniques for storing and using signed schema data for markup languages are disclosed. An XML library can be used to store XML schema data that has been verified (or authenticated).