Abstract: A ring oscillator includes an oscillation module, a first delay module, and a second delay module. The oscillation module is disposed in a first delay loop and a second delay loop and includes a first number of latches connected in series. The oscillation module has two input ends and two output ends, and the two input ends are respectively connected to a first node and a second node. The first delay module is disposed in the first delay loop and has an input end connected to a first output end of the oscillation module and an output end connected to the first node. The second delay module is disposed in the second delay loop and has an input end connected to a second output end of the oscillation module and an output end connected to the second node.

Abstract: Increasing transparency of one or more micro-displays. A method includes attaching a transparent cover to at least a portion of a semiconductor wafer. The at least a portion of the semiconductor wafer includes the one or more micro-displays. The one or more micro-displays include one or more active silicon areas. The method further includes, after the transparent cover has been attached to the at least a portion of the semiconductor wafer, removing silicon between one or more of the active silicon areas, causing the one or more micro-displays to have a transparency of at least 50%.

Abstract: A preparation method of a semiconductor structure includes: providing a substrate, and forming a groove on the substrate by etching; forming a first dielectric layer on a side wall of the groove; forming a first electrode on the bottom of the groove and on an inner surface of the first dielectric layer; forming a second dielectric layer on a surface of the first electrode; and forming a second electrode on a surface of the second dielectric layer.

Abstract: A radio frequency (RF) communication system may include a first radio and a second radio being relatively movable. The first radio may include an RF transceiver configured to operate on a selected RF channel from among a plurality of different RF channels, and a controller coupled to the RF transceiver. The controller may be configured to obtain historical RF spectral data over time, position and RF channel, as the first and second radios move relative to one another, determine at least one power null from the historical RF spectral data, and dynamically select an RF channel from among the plurality thereof based upon the at least one power null.

Abstract: A method for manufacturing a semiconductor memory includes: providing a portion to be processed, and performing a preset process step on the portion to be processed at least after a minimum waiting time; before performing the preset process step, performing a thermal oxidation process on the portion to be processed; and before performing the preset process step, performing a cleaning process, the cleaning process being used to remove oxides from the surface of the portion to be processed, the oxides being wholly or partly generated by the thermal oxidation process.

Abstract: The present disclosure provides an electrostatic protection device and an electrostatic protection circuit. The electrostatic protection device includes: a discharge transistor, located on a substrate for discharging electrostatic charges; and a first pad, located on a first metal layer and electrically connected to a drain region of the discharge transistor; wherein a projection of the first pad on the substrate partially overlaps a projection of the drain region on the substrate.

Abstract: A memory test method includes: testing a first memory to acquire defect information of the first memory; acquiring repair information of the first memory according to the defect information of the first memory; and storing the repair information of the first memory in a second memory. In the technical solutions provided in the embodiments of the present disclosure, other memories may be used to store the repair information of the currently tested memory, so that the storage space can be increased and the test efficiency can be improved.

Abstract: The present disclosure provides a standard cell template and a semiconductor structure. The standard cell template includes a first well region and a second well region, arranged along a first direction; a first gate pattern, located in the first well region and extending along the first direction, for defining a first gate; a second gate pattern, located in the second well region and extending along the first direction, for defining a second gate; and a gate electrical connection pattern, located between the first gate pattern and the second gate pattern, for defining a gate electrical connection structure; where the gate electrical connection structure is arranged on the same layer as the first gate and the second gate to electrically connect the first gate and/or the second gate.

Abstract: Methods, systems, and computer readable media for network traffic generation using machine learning. An example method includes collecting first traffic from a production data center environment. At least a portion of the first traffic comprises live computer network traffic transiting the production data center environment. The method includes collecting second traffic from an emulated data center testbed device. At least a portion of the second traffic comprises testbed traffic that transits an emulated data center switching fabric of the emulated data center testbed device. The method includes training a traffic generation inference engine using the first traffic and the second traffic. The method includes generating, using the traffic generation inference engine, test traffic to test or stimulate a network system under test (SUT).

Abstract: A state detection circuit for an anti-fuse memory cell includes: amplifier, having first input terminal connected with first reference voltage, second input terminal connected with first node and output terminal connected with second node; anti-fuse memory cell array, including anti-fuse memory cell sub-arrays, bit lines of sub-arrays are connected with first node, word lines of sub-arrays are connected with controller and each sub-array includes anti-fuse memory cells; first switch element, having first terminal connected with power supply, second terminal connected with first node and control terminal connected with second node; second switch element, having first terminal connected with power supply, second terminal connected with third node and control terminal connected with second node; third switch element, having first terminal connected with third node, grounded second terminal and control terminal connected with controller; and comparator, having first and second input terminals connected with third

Abstract: The present disclosure discloses a semiconductor memory preparation method and a semiconductor memory, relating to the technical field of semiconductors. The method includes: providing a semiconductor substrate in which transistors are formed and have an array layout; forming a film stack structure on the semiconductor substrate; forming through holes penetrating the film stack structure to expose sources of the transistors; epitaxially growing a storage node contact layer on exposed surfaces of the sources of the transistors; and forming a bottom electrode of a capacitor on a surface of the storage node contact layer.

Abstract: A method for manufacturing a semiconductor device, including: acquiring a substrate, wherein a gate structure is formed on the substrate; implanting first ions into the substrate to form pre-amorphized regions at two sides of the gate structure respectively; implanting second ions into the pre-amorphized regions to form amorphized regions in the pre-amorphized regions respectively; forming first sidewalls each at a respective one of the two sides of the gate structure; performing a second doping process to form first doped regions in the amorphized regions; forming second sidewalls each at a side of a respective first sidewall; and forming a heavily-doped source region and a heavily-doped drain region in the first doped regions respectively.

Abstract: Wastewater is treated though primary treatment of the water by way of a micro-sieve to produce a primary effluent and primary sludge. There is secondary treatment of the primary effluent by way of a membrane bioreactor (MBR) or an integrated fixed film activated sludge (IFAS) reactor to produce a secondary effluent and a waste activated sludge. The micro-sieve may have openings of 250 microns or less, for example about 150 microns. In a process, a gas transfer membrane is immersed in water. Pressurized air flows into the gas transfer membrane. An exhaust gas is withdrawn from the gas transfer membrane and used to produce bubbles from an aerator immersed in the water.

Abstract: A memory device includes: a plurality of channels, each including a memory cell array, the memory cell array including a normal cell array, the normal cell array including normal memory cells, and each of the normal memory cells being a volatile memory cell; a testing control circuit, configured to control testing of the normal cell array in the plurality of channels in response to a testing instruction, and to determine an access address of a normal memory cell failing the testing in the normal cell array in the plurality of channels to be a failure address; and a non-volatile memory cell array which includes a plurality of non-volatile memory cells and is configured to receive and store the failure address from the testing control circuit.

Abstract: A system for monitoring an environment can be used for monitoring concentrations of airborne contaminants in a plurality of process areas in a clean room. The system includes: a sampling device, configured to collect environmental samples from process areas and including a system sampling pipeline, the environmental sample including air; an analysis device, connected to an output end of the system sampling pipeline; an air supply device, connected to the system sampling pipeline and configured to provide a purge gas to the system sampling pipeline; and a humidification device, configured to provide water mist and connected between the air supply device and the system sampling pipeline.

Abstract: A semiconductor structure manufacturing method includes that a substrate is provided, in which the substrate includes a substrate layer and a plurality of bit line structures arranged on the substrate layer in a first direction, the substrate layer includes shallow trench isolation structures, active areas, and a plurality of word line structures arranged in a second direction, and two adjacent bit line structures and two adjacent word line structures define a conductive contact region, and the conductive contact region exposing part of a corresponding active area; a conducting layer is formed between the bit line structures, the conducting layer covering the substrate layer, and the conducting layer extending along the first direction; part of the conducting layer is removed with the conducting layer corresponding to the conductive contact region retained to form first capacitor wires; and an isolation layer is formed, which fills gaps between the first capacitor wires.

Abstract: A microphone acquires audio data of a user's speech. The audio data is processed to determine sentiment data indicative of perceived emotional content of the speech. For example, the sentiment data may include values for one or more of valence that is based on a particular change in pitch over time or activation that is based on speech pace. A simplified user interface provides the user with a graphical representation based on the sentiment data and associated descriptors. For example, a visual indicator such as a dot may be shown at particular coordinates onscreen that correspond to the sentiment data. Text descriptors may also be presented near the dot. As the user continues speaking, and new audio data is processed, the interface is dynamically updated. The user may use this information to assess their state of mind, facilitate interactions with others, and so forth.

Abstract: Retention features are provided for joining at least two structural components in a fixtureless assembly system. A first structure including a groove may be configured to contain at least one adhesive, and a second structure may include a tongue configured to contact the at least one adhesive to join the first and second structures. The first structure may also include at least one window that receives electromagnetic (EM) radiation from an EM radiation source into the groove. The at least one adhesive is configured to cure at a first rate upon exposure to one of time or heating, and the at least one adhesive is configured to cure at a second rate faster than the first rate upon exposure to the EM radiation.

Abstract: Methods, systems, and computer readable media for exposing data processing unit (DPU) traffic in a smartswitch are disclosed. One example method occurs at a smartswitch controller implemented using at least one processor, the method comprising: receiving connection information for communicating with an in-line traffic processing agent; generating, using the connection information, one or more switching rules for causing traffic associated with a target DPU of a smartswitch to be directed to the in-line traffic processing agent; and providing the one or more switching rules to the smartswitch or another entity.

Abstract: The presently disclosed subject matter generally relates to recyclable insulation material for shipping containers, groceries bags, etc., machines for making the recyclable insulation material, and methods for the making the recyclable insulation material. In one aspect, a method of forming an insulation product may include forming a continuous sheet of paper into a plurality of flexible loops defining a plurality of air channels extending in a direction that is substantially perpendicular with a machine direction of the continuous sheet of paper. The method may also include immediately attaching a first layer of paper and a second layer of paper to the plurality of flexible loops as they are formed so that the continuous sheet of paper retains the plurality of flexible loops between the first layer and the second layer and that the plurality of flexible loops remain unattached with respect to one another.