Abstract: A manufacturing method of a memory includes: providing a substrate and a bit line contact layer; forming a dummy bit line structure on top of the bit line contact layer; forming a spacer layer on the sidewall of both the dummy bit line structure and the bit line contact layer; forming a dielectric layer on the sidewall of the spacer layer; forming a sacrificial layer filling the area between adjacent dummy bit line structures, wherein the sacrificial layer covers the sidewall of the dielectric layer; after the sacrificial layer is formed, removing the dummy bit line structure; forming a bit line conductive portion which fills the hole and covers the bit line contact layer; and, after the bit line conductive portion is formed, removing the spacer layer.

Abstract: A wafer transferring device includes a first placement slot and a second placement slot of wafer slots having two electrically conductive polar plates to form capacitance, the first polar plate on which is being placed a wafer is of a shape-deformable material, the distance between the first polar plate and the second polar plate is decreased upon placement of a wafer onto the first polar plate, between the polar plates are connected a detection circuit and a power supply, variations in distance between the two polar plates will cause variations in capacitance values of the capacitance, and states of wafers being placed on the first placement slot and the second placement slot can be determined according to variations in the capacitance value to which the first placement slot corresponds and in the capacitance value to which the second placement slot corresponds.

Abstract: A semiconductor memory includes storage arrays, at least one verification module and gating circuits. Each verification module corresponds to multiple storage arrays. The verification module is configured to verify whether an error occurs in data information of the corresponding storage arrays. Each verification module is connected to a group of global data buses. The gating circuits are respectively connected to the storage arrays and the global data buses, and the gating circuits are configured to control on and off of a data transmission path connecting the global data buses to the storage arrays.

Abstract: A pedal assembly for an exercise and rehabilitation device can include a disk having an axis of rotation. A central aperture can be formed in the disk along the axis. Spokes can extend radially from adjacent the central aperture toward a perimeter of the disk. The disk can be formed from a first material. In addition, a crank can be coupled to one of the spokes of the disk. The crank can have a hub concentric with the central aperture. Pedal apertures can extend along a radial length of the crank. The crank can be formed from a metallic material that differs from the first material. A pedal having a spindle can be interchangeably and releasably mounted to the pedal apertures in the crank.

Abstract: A method for manufacturing a buried word line transistor can include the following operations. A semiconductor substrate having an active region is provided. A first trench is formed in the active region. A first insulation layer is formed on a side wall of the first trench. A bottom portion of the first trench is etched to form a second trench. A gate oxide layer is formed on a side wall of the first insulation layer and a bottom portion and a side wall of the second trench. A barrier layer is formed at a bottom portion and portion of a side wall of the gate oxide layer. A metal filler layer is formed on an inner side of the barrier layer. The first insulation layer is removed to form a side trench. A second insulation layer is formed at a top end of the side trench. A sealed air spacer layer is formed.

Abstract: A system includes a treatment device configured to be manipulated by a user while the user performs a treatment plan and a patient interface associated with the treatment device. The system also includes a computing device configured to: receive treatment data pertaining to the user who uses the treatment device to perform the treatment plan; write to an associated memory, for access at a computing device of a healthcare provider, treatment information; communicate with an interface, at the computing device of the healthcare provider; and modify at least one of the at least one aspect and any other aspect of the treatment plan in response to receiving treatment plan input including at least one modification to the at least one of the at least one aspect and any other aspect of the treatment plan.

Abstract: A bonding pad structure includes a bonding pad layer, and an expansion stagnating block that is at least wrapped by the bonding pad layer partially. The expansion stagnating block is subjected to high-temperature tempering treatment. A semiconductor structure, a semiconductor package structure and a method for preparing the same are also provided.

Abstract: The present application discloses a semiconductor structure. The semiconductor structure includes: a substrate, the substrate being provided with a conductive structure; a first lower electrode and a second lower electrode sequentially stacked, the first lower electrode being located between the second lower electrode and the substrate, and the first lower electrode being electrically connected to the conductive structure; a first dielectric layer and a first upper electrode, the first dielectric layer covering a sidewall surface of the first lower electrode, and the first upper electrode being located on one side of the first dielectric layer away from the first lower electrode; and a second dielectric layer and a second upper electrode, the second dielectric layer covering an inner wall and a bottom surface of the second lower electrode, and the second upper electrode filling the recess of the second lower electrode.

Abstract: A memory device includes: a plurality of channels, each including a memory cell array, the memory cell array including a normal cell array, the normal cell array including normal memory cells, and each of the normal memory cells being a volatile memory cell; a testing control circuit, configured to control testing of the normal cell array in the plurality of channels in response to a testing instruction, and to determine an access address of a normal memory cell failing the testing in the normal cell array in the plurality of channels to be a failure address; and a non-volatile memory cell array which includes a plurality of non-volatile memory cells and is configured to receive and store the failure address from the testing control circuit.

Abstract: A system for monitoring an environment can be used for monitoring concentrations of airborne contaminants in a plurality of process areas in a clean room. The system includes: a sampling device, configured to collect environmental samples from process areas and including a system sampling pipeline, the environmental sample including air; an analysis device, connected to an output end of the system sampling pipeline; an air supply device, connected to the system sampling pipeline and configured to provide a purge gas to the system sampling pipeline; and a humidification device, configured to provide water mist and connected between the air supply device and the system sampling pipeline.

Abstract: A current test circuit can include a sampling resister array with a control end connected with a main control component, a first end is connected with a power conversion circuit, and a second end configured to be connected with a component to be tested. The sampling resistor array includes at least two sampling branches, each having an analog switch and a sampling resistor connected serially. In the test, the main control component can generate a control signal according to the operating state of the component and gate at least one sampling branch of the sampling resistor array through the control signal, obtain voltage values at two ends of the sampling resistor array through a voltage test assembly, and determine the current of the component according to the voltage values at two ends of the sampling resistor array and resistance values of the sampling resistor array.

Abstract: The disclosure provides a three-dimensional circuit assembly including a printed circuit board comprising a top film surface and a bottom film surface opposite to the top film surface. The three-dimensional circuit assembly may also include a first layer of a composite material bonded or laminated on the top film surface. The three-dimensional circuit assembly may further include a second layer of the composite material bonded or laminated on the bottom film surface of the printed circuit board.

Abstract: A method for cooling a hybrid electric aircraft propulsion system comprises transporting a coolant through a two-phase pumped loop (TPPL) in thermal contact with an electrical machine and a plurality of power modules to be cooled, where the TPPL includes: a parallel arrangement of cold plates; an evaporator; a condenser; a first control valve; a liquid receiver; and a pump. A sensor positioned upstream of the cold plates, and in some cases upstream of the liquid receiver, measures pressure and/or temperature of a return stream of the coolant and transmits measurement data to a first controller electrically connected to the first control valve. The first controller regulates flow of a first liquid stream through the first control valve based on the pressure and/or temperature measured by the sensor, thereby keeping the return stream at a temperature within a predetermined temperature range.

Abstract: Embodiments in accordance with the present disclosure are directed to blood transfer apparatuses, sleeve-puncturing assemblies, and methods thereof. An example blood transfer apparatus includes a sleeve-puncturing assembly comprising a sleeve and a hollow conduit. The sleeve is configured and arranged with longitudinal portions to be placed over or engage a blood collection container. The sleeve has an open end that engages with a portion of the blood collection container and another end that provides containment of the blood collection container while the open end is engaged with the portion of the blood collection container. The sleeve further includes a lateral portion to provide support the hollow conduit. The hollow conduit and the longitudinal portions of the sleeve engage with the blood collection container and a blood collection container to provide sufficient pressure while engaged to pull a predetermined amount of plasma or serum from the blood collection container.

Abstract: Devices and techniques are generally described for fraud detection. A machine learning model is used to determine a first fraud risk score for a first transaction. The machine learning model includes a first set of weights. A first covariance matrix is determined for the machine learning model based at least in part on the first fraud risk score. A second set of weights for the machine learning model is determined. The second set of weights is determined based on the first set of weights and the first covariance matrix. In various examples, the machine learning model with the second set of weights is used to determine a second fraud risk score for a second transaction. A fraud decision surface is determined and the second fraud risk score is compared to the fraud decision surface. Data indicating that the second transaction is fraudulent is sent to a computing device.

Abstract: A system for monitoring the movement of objects, structures, models of structures, cables and the like provides for the acquisition of images with an optical sensing device such as a video camera fixedly mounted at a selected distance from the item studied, in which the images are arranged into frames divided into pixels which are characterized by an intensity reflected or emitted over a selected time interval, and a data processing system to calculate a physical displacement as function of time of the item being studied or a portion of the item being studied based on an output from the video camera, and in some embodiments the system visually distinguishes one or more locations in the frame to indicate a difference in the phase of motion for multiple objects appearing in the frame.

Abstract: Techniques for improving database searches are described herein.

Abstract: A system is disclosed for protection of a lithium ion battery. The system includes a first light source and a first optical guide including first and second ends. The first optical guide is in optical communication with the light source at the first end of the first optical guide. A first material is disposed on an exterior surface of the first optical guide in fluid communication with an exterior surface of the lithium ion battery. The first material is optically responsive to a first gas indicative of an overheat condition or combustion of the lithium ion battery. A first light detector is in optical communication with the second end of the first optical guide.

Abstract: Aspects of the present disclosure relate to optical devices and related methods that facilitate independent control of movement of lenses and image sensors in camera systems. In one example, an image sensor is movable independently of and relative to a lens, and the lens is movable independently of the image sensor. In one example, an optical device includes a lens, and an image sensor disposed below the lens. The image sensor is movable relative to the lens. The optical device includes a plurality of magnets disposed about the lens, a plurality of vertical coil structures coiled in one or more vertical planes, and one or more horizontal coil structures coiled in one or more horizontal planes. The plurality of vertical coil structures are configured to, when powered, move the image sensor relative to the lens. The one or more horizontal coil structures are configured to, when powered, move the lens.

Abstract: A magnetic memory device includes a first electrode, a second electrode, and a layer stack located between the first electrode and the second electrode. The layer stack includes a reference layer, a tunnel barrier layer, a free layer, and a magnetoelectric multiferroic layer including at least one crystalline grain. The magnetization of the magnetoelectric multiferroic layer may be axial, canted, or in-plane. For axial or canted magnetization of the magnetoelectric multiferroic layer, a deterministic switching of the free layer may be achieved through coupling with the axial component of magnetization of the magnetoelectric multiferroic layer. Alternatively, the in-plane magnetization of the magnetoelectric multiferroic layer may be employed to induce precession of the magnetization angle of the free layer.