Patents Assigned to Teradyne, Inc.
  • Patent number: 11340260
    Abstract: A probe card in an automated test equipment (ATE) and methods for operating the same for testing electronic devices. The probe card may be a portion of a vertical-type probe card assembly in which pads on a circuit board are contacted by probe pins. The probe card has a pad geometry that compensates for misalignment with corresponding probe pins due to manufacturing error or a mismatch of coefficient of thermal expansion, enabling reliable operation of the ATE over a wide range of test temperatures. The pad array may have a plurality of elongated pads, each of uniquely designed size, tilt angle, and/or center location, with the characteristics of each pad being dependent on a distance between each pad and a centroid of the pad array, such that a probe pin to pad location errors can be mitigated.
    Type: Grant
    Filed: December 24, 2019
    Date of Patent: May 24, 2022
    Assignee: Teradyne, Inc.
    Inventors: Brian Brecht, Steve Ledford
  • Patent number: 11333683
    Abstract: A probe card in an automated test equipment (ATE) is disclosed. The probe card may be a portion of a vertical-type probe card assembly in which pads on a circuit board are contacted by probe pins, with vertical vias in the circuit board interconnecting various conductive elements. Disclosed herein is a transposed via arrangement within a circuit board for a probe card, where adjacent vias are offset towards each other such that the inductance between the adjacent vias may be reduced to provide a desirable impedance during high frequency signal and/or power transmission.
    Type: Grant
    Filed: December 24, 2019
    Date of Patent: May 17, 2022
    Assignee: Teradyne, Inc.
    Inventor: Brian Brecht
  • Patent number: 11325263
    Abstract: Embodiments included herein are directed towards a system and method for robotic control. The system may include a graphical user interface configured to allow a user to access a data storage unit associated with a robot. The system may further include a configurable portion including the data storage unit, a manipulator controller, and a data transfer layer. The system may also include a generic portion configured to parse the configurable portion to generate a robotic controller.
    Type: Grant
    Filed: June 29, 2018
    Date of Patent: May 10, 2022
    Assignee: Teradyne, Inc.
    Inventors: Xi Chen, Douglas E. Barker
  • Patent number: 11285616
    Abstract: The specification and drawings present a robotic coating application system and a method for coating at least one part with a robotic coating application system. The robotic coating application system may comprise an enclosure configured to receive at least one part. The robotic coating application system may further comprise at least one robot configured to operate at least partially within the enclosure. The robotic coating application system may also comprise a graphical user interface to display a model of the at least one part and allow a user to select a portion or subportion of the model for application of a coating. The coating may be automatically applied to the at least one part based upon, at least in part, the user-selected portion or subportion.
    Type: Grant
    Filed: September 11, 2018
    Date of Patent: March 29, 2022
    Assignee: Teradyne, Inc.
    Inventors: Ryan S. Penning, Ralph F. Polimeni, Jr., Brett L. Limone, James D. English
  • Patent number: 11283436
    Abstract: Circuitry and methods of operating the same to delay a signal by a precise and variable amount. One embodiment is directed to a high speed delay line used in automated test equipment. The inventors have recognized and appreciated that an input signal having high data rate may be split into parallel split signals having lower data rates that are delayed in respective parallel delay paths before being combined to generate a delayed signal. One advantage of delaying a signal in such a fashion is to provide high delay line timing accuracy at high data speeds, while using a compact circuit design using circuitry components of lower bandwidth with reduced power consumption, for example by using complementary metal-oxide-semiconductor (CMOS). A further advantage is that a high speed delay line may be constructed from multiple lower data rate parallel delay lines that are modular, simplifying circuit design.
    Type: Grant
    Filed: April 25, 2019
    Date of Patent: March 22, 2022
    Assignee: Teradyne, Inc.
    Inventors: Jan Paul Anthonie van der Wagt, Denis Zelenin
  • Patent number: 11280827
    Abstract: An example test system includes a test head and a probe card assembly connected to the test head. The probe card assembly includes: a probe card having electrical contacts, a stiffener connected to the probe card to impart rigidity to the probe card, and a heater to heat to at least part of the probe card assembly. A prober is configured to move a device under test (DUT) into contact with the electrical contacts of the probe card assembly.
    Type: Grant
    Filed: February 29, 2016
    Date of Patent: March 22, 2022
    Assignee: TERADYNE, INC.
    Inventors: Kevin A. Thompson, Isaac N Silva
  • Patent number: 11272616
    Abstract: An example apparatus includes a first printed circuit board (PCB) having a power layer, a ground layer, and a slot. The slot includes a first power electrical contact that is electrically connected to the power layer and a first ground electrical contact that is connected to the ground layer. The slot extends orthogonally or obliquely through multiple layers of the first PCB. A second PCB includes a second power electrical contact, a second ground electrical contact, and capacitors electrically connected between the second power electrical contact and the second ground electrical contact. The second PCB is configured for insertion into the slot to form an electrical connection between the first power electrical contact and the second power electrical contact and between the first ground electrical contact and the second ground electrical contact.
    Type: Grant
    Filed: July 24, 2020
    Date of Patent: March 8, 2022
    Assignee: TERADYNE, INC.
    Inventors: Brian Brecht, Roger A. Plante, Richard Pye, Julie Robison, Alfred M. Zakarian, William Patti, Mark Garcia, Shih-Fan Chen, Kenneth L. Degan, Heng-Kit Too
  • Publication number: 20220044715
    Abstract: Circuitry and methods of operating the same to strobe a DQ signal with a gated DQS signal are described. Some aspects are directed to a gating scheme to selectively pass a received strobe signal such as a DQS strobe signal based on a state of a drive enable (DE) signal in a drive circuit in the ATE, such that edges generated by the drive circuit are prevented from mistakenly strobing a received data signal such as a DQ signal.
    Type: Application
    Filed: August 10, 2020
    Publication date: February 10, 2022
    Applicant: Teradyne, Inc.
    Inventors: Ronald A. Sartschev, Jan Paul Anthonie van der Wagt, Nathan Nary, Grady Borders
  • Patent number: 11226621
    Abstract: Embodiments included herein are directed towards a robotic system and method. Embodiments may include a transportation mechanism having at least three legs and a computing device configured to receive a plurality of optimization components. Each optimization component may include a plurality of variables and the computing device may be further configured to perform a randomized simulation based upon, at least in part, each of the plurality of optimization components. The computing device may be further configured to provide one or more results of the randomized simulation to the transportation mechanism to enable locomotion via the at least three legs.
    Type: Grant
    Filed: February 14, 2019
    Date of Patent: January 18, 2022
    Assignee: TERADYNE, INC.
    Inventors: Ryan S. Penning, James D. English, Douglas E. Barker, Brett L. Limone, Paul Muench
  • Patent number: 11226390
    Abstract: An example method, such as a calibration method, includes: determining a geometry of an arrangement of cells that is perceived by a robot configured to move devices into, and out of, the cells; determining an expected location of a target cell among the cells; determining an offset from the expected location that is based on the geometry that is perceived by the robot; and calibrating the robot based on the offset.
    Type: Grant
    Filed: August 28, 2017
    Date of Patent: January 18, 2022
    Assignee: Teradyne, Inc.
    Inventor: Adnan Khalid
  • Patent number: 11221361
    Abstract: An example test system includes an output stage to source at least one of voltage or current to a channel of a test instrument; a tracking circuit to detect a channel voltage following the output stage and to control a supply voltage to the output stage based on the channel voltage; and a controller to determine a power dissipation of the output stage based on the supply voltage and the channel voltage, and to control the output stage based on the power dissipation in the output stage.
    Type: Grant
    Filed: September 3, 2019
    Date of Patent: January 11, 2022
    Assignee: TERADYNE, INC.
    Inventors: Jason A. Messier, Bryce M. Wynn, William Bowhers
  • Patent number: 11221365
    Abstract: An example test system includes a device interface board (DIB) having one or more signal transmission paths and an interface for connecting to one or more other components of the test system. Test circuitry is configured to inject test signals into the one or more signal transmission paths and to measure transmitted versions of the test signals at the interface to obtain measurement signals. One or more processing devices are configured to generate calibration factors based on differences between the injected test signals and the measurement signals, and to store the calibration factors in computer memory. The calibration factors are for correcting for effects on the test signals of the one or more signal transmission paths.
    Type: Grant
    Filed: March 11, 2020
    Date of Patent: January 11, 2022
    Assignee: Teradyne, Inc.
    Inventors: Stephen J. Lyons, David Tu
  • Patent number: 11215641
    Abstract: Probe pin arrangements in a vertical-type probe card assembly for an automated test equipment (ATE) are disclosed. In some embodiments, one or more additional conductive regions are provided in between adjacent probe pins. The additional conductive regions may reduce spacing between probe pins connected to adjacent probe card pads, and may in turn reduce or adjust inductance between the two probe cards pads to provide improved signal impedance matching or lower power impedance. In one embodiment, the additional conductive region is a short probe pin. In another embodiment, the additional conductive region is a protrusion on a vertical probe pin.
    Type: Grant
    Filed: December 24, 2019
    Date of Patent: January 4, 2022
    Assignee: Teradyne, Inc.
    Inventor: Brian Brecht
  • Patent number: 11203116
    Abstract: A computing system is provided for training one or more machine learning models to perform at least a portion of a robotic task of a physical robotic system by monitoring a model-based control algorithm associated with the physical robotic system perform at least a portion of the robotic task. One or more robotic task predictions may be defined, via the one or more machine learning models, based upon, at least in part, the training of the one or more machine learning models. The one or more robotic task predictions may be provided to the model-based control algorithm associated with the physical robotic system. The robotic task may be performed, via the model-based control algorithm associated with the robotic system, on the physical robotic system based upon, at least in part, the one or more robotic task predictions defined by the one or more machine learning models.
    Type: Grant
    Filed: August 2, 2019
    Date of Patent: December 21, 2021
    Assignee: TERADYNE, INC.
    Inventors: David Demirdjian, Eric Lenhart Truebenbach
  • Patent number: 11187745
    Abstract: An example method of stabilizing a voltage at a device under test (DUT) includes identifying one or more characteristics of a deviation in a first voltage to appear at the DUT. The deviation may result from a digital signal and a concomitant transient current in the DUT. The digital signal may be part of a test flow to be sent over one or more test channels of automatic test equipment (ATE) to the DUT. The one or more characteristics may be identified prior to sending the test flow to the DUT. The method also includes generating a second voltage to apply to the DUT. The second voltage may be based on the one or more characteristics and being shaped to reduce the deviation.
    Type: Grant
    Filed: October 30, 2019
    Date of Patent: November 30, 2021
    Assignee: TERADYNE, INC.
    Inventors: Jason A. Messier, Bryce M. Wynn, Anja Deric
  • Patent number: 11169203
    Abstract: Example systems for determining a configuration of a test system execute operations that include receiving first parameters specifying at least part of an operation of a test system; receiving second parameters specifying at least part of a first configuration of the test system; determining a second configuration of the test system based, at least in part, on the first parameters and the second parameters, with the second configuration being determined to impact a cost of test of the test system; generating, by one or more processing devices, data for a graphical user interface representing information about the second configuration and the cost of test; and outputting the data for the graphical user interface for rendering on a display device.
    Type: Grant
    Filed: September 26, 2018
    Date of Patent: November 9, 2021
    Assignee: TERADYNE, INC.
    Inventor: Randall T. Kramer
  • Patent number: 11162980
    Abstract: A probe card in an automated test equipment (ATE) is disclosed. The probe card may be a portion of a vertical-type probe card assembly in which pads on a circuit board are contacted by probe pins, with vertical vias in the circuit board interconnecting various conductive elements. Disclosed herein is a probe card having ground vias in a coaxial arrangement around a signal via that provide electromagnetic shielding to a signal via to reduce crosstalk between adjacent signal vias.
    Type: Grant
    Filed: December 24, 2019
    Date of Patent: November 2, 2021
    Assignee: Teradyne, Inc.
    Inventor: Brian Brecht
  • Patent number: 11156692
    Abstract: Example circuitry includes a first circuit to provide a low signal; a second circuit to provide a high signal, where the high signal has a greater voltage magnitude than the low signal; and a differential amplifier configured to receive the low signal from the first circuit and the high signal from the second circuit. The differential amplifier is for producing an output voltage that is based on the high signal and the low signal. The example circuitry includes a first measurement circuit to measure the output voltage; a second measurement circuit to measure the low signal at the first circuit; and processing logic to determine a differential measurement based on the output voltage measured by the first measurement circuit, the low signal measured by the second measurement circuit, and calibration values obtained for the circuitry.
    Type: Grant
    Filed: February 19, 2020
    Date of Patent: October 26, 2021
    Assignee: TERADYNE, INC.
    Inventor: Igor Golger
  • Patent number: 11159248
    Abstract: An example optical receiving device includes a photodiode to receive an optical signal, where the photodiode is configured to conduct a current that is based on an optical power of the optical signal, and a radio frequency (RF) gain circuitry to generate one or more analog electrical signals based on the current and based on gain provided by the RF gain circuitry. A power detector is configured to receive an analog electrical signal of the one or more analog electrical signals, to detect alternating current (AC) power of the optical signal based on the analog electrical signal, and to output a signal representing the AC power based on the detecting.
    Type: Grant
    Filed: December 18, 2019
    Date of Patent: October 26, 2021
    Assignee: TERADYNE, INC.
    Inventors: Tushar K. Gohel, Thomas D. Jacobs
  • Patent number: D938960
    Type: Grant
    Filed: March 27, 2019
    Date of Patent: December 21, 2021
    Assignee: TERADYNE, INC.
    Inventors: Eric Lenhart Truebenbach, Chris Behling, Peter Lustig