Abstract: An example test system includes a carrier having a test socket to receive a device to test. The test socket includes electrical connections. The test system also includes a lid assembly having a socket cap to contact the device to apply pressure to cause the device to connect electrically to the electrical connections. The socket cap includes a material having a thermal conductivity that exceeds a defined value. The lid assembly also includes one or more structures configured to provide surface area over which heat from the device dissipates. The one or more structures are made of a material having a thermal conductivity that exceeds the defined value.

Abstract: An example system includes a receptacle to house a device under test (DUT); an antenna for exchanging signals with the DUT, where at least some of the signals are for use in performing radiated testing of the DUT; and a cap configured to mate to the receptacle to form a housing to enclose the DUT. The housing is for isolating the DUT at least one of physically or electromagnetically.

Abstract: Disclosed herein are testing apparatus and methods to identify latent defects in IC devices based on capacitive coupling between bond wires. Bond wires may have latent defects that do not appear as hard shorts or hard opens at the time of testing, but may pose a high risk of developing into hard shorts or hard opens over time. A latent defect may form when two adjacent bond wires are disturbed to become close to each other. According to some embodiments, capacitive coupling between a pair of pins may be used to provide an indication of a near-short latent defect between bond wires connected to the pair of pins.

Abstract: An example test system includes robotics configured to operate on devices at a first level of precision, and stages configured to operate at levels of precision that are less than the first level of precision. Each of the stages may include parallel paths that are configured to pass the devices between adjacent stages.

Abstract: Disclosed herein are voltage driver circuits and methods of operating the same to provide a variable output voltage that is suitable for use in ATE to provide a large number of test signals with accurate voltage levels at high data rates using components that consume relatively low power. According to an aspect, a change in output current in a voltage driver related to changing output voltage may be offset by a stabilization current generated by a correction driver for the voltage driver, such that supply currents drawn from the supply voltages can remain substantially stable. The correction driver may be connected to one or more supply voltages, and programmed to output a stabilization current that offsets changes in supply currents arising from changing of the programmed output of the voltage driver circuit. Such a driver may enable a test system to more precisely test semiconductor devices.

Abstract: An example tool for disconnecting a connector from a circuit board includes: a first arm having first handle and a first notch, where the first notch is for engaging a first connector connected to the circuit board; and a second arm having a second handle and a second notch, where the second notch is for engaging a second connector connected to a cable. A hinge connects the first arm to the second arm. The hinge is biased so that, when the tool is not in use, the first handle and the second handle are farther apart than are the first notch and the second notch.

Abstract: An example apparatus includes a connection module. The example connection module includes a connection interface and a connection matrix having a root transmission line to conduct signals to and from the connection interface. The connection matrix also includes branch transmission lines that are connectable electrically to the root transmission line to conduct the signals to and from the root transmission line. Each of the branch transmission lines is part of an electrical pathway between a device and the root transmission line. A housing encloses the connection matrix and enables access to the connection interface. The root transmission line and the branch transmission lines are each multi-conductor transmission lines that conduct the signals in transverse electromagnetic (TEM) mode.

Abstract: An example test system includes instruments for controlling testing. Each instrument may be controlled by a processing unit. Each processing unit may be configured to operate on portions of a test program relevant to an instrument that the processing unit controls. A synchronization mechanism operates with at least some processing units to produce a synchronized sequence of actions, measurements, or measurements and actions at a test instrument interface absent intervention from a centralized controller.

Abstract: Aspects of the present application are directed to an automated test equipment (ATE) and methods for operating the same for testing high-power electronic components. The inventor has recognized and appreciated an ATE that provides both high-power alternating-current (AC) and direct-current (DC) testing in a single test system can lead to high throughput testing for high-power components with reduced system hardware complexity and cost. Aspects of the present application provide a synchronized inductor switch module and both a high-precision digitizer and a high-speed digitizer for capturing DC and AC characteristics of a high-power transistor.

Abstract: An example test system includes a test carrier to hold devices for test; a device shuttle to transport the devices; and a robot to move the devices between the test carrier and the device shuttle. The device shuttle is configured to move, towards a stage of the test system containing the robot, a first device among the devices that has not been tested. The device shuttle is configured to move in a first dimension. The robot is configured to move the first device from the device shuttle to the test carrier. The robot is configured to move in a second dimension that is different from the first dimension.

Abstract: Circuitry and methods of operating the same to delay a signal by a precise and variable amount. One embodiment is directed to a high speed delay line used in automated test equipment. The inventors have recognized and appreciated that an input signal having high data rate may be split into parallel split signals having lower data rates that are delayed in respective parallel delay paths before being combined to generate a delayed signal. One advantage of delaying a signal in such a fashion is to provide high delay line timing accuracy at high data speeds, while using a compact circuit design using circuitry components of lower bandwidth with reduced power consumption, for example by using complementary metal-oxide-semiconductor (CMOS). A further advantage is that a high speed delay line may be constructed from multiple lower data rate parallel delay lines that are modular, simplifying circuit design.

Abstract: Disclosed herein are voltage driver circuits and methods of operating the same. In some embodiments, a plurality of circuit slices are provided in a voltage driver circuit, each circuit slice has a time constant, and is controlled to switchably connect a driver output to either a high voltage level or a low voltage level, or to disconnect the driver output from both voltage levels. The circuit slices may provide an adjustable output impedance, which may be set to match the impedance of different loads. The circuit slices may also provide adjustable voltages with low power consumption, particularly in high speed applications. The circuit slices may also have programmable capacitors that may be adjusted to provide a programmable time domain behavior of the output voltage waveform, such as a programmable voltage peaking characteristic.

Abstract: Disclosed herein are voltage driver circuits and methods of operating the same to provide a variable output voltage that is suitable for use in ATE to provide a large number of test signals with accurate voltage levels at high data rates using components that consume relatively low power. According to an aspect, a change in output current in a voltage driver related to changing output voltage may be offset by a stabilization current generated by a correction driver for the voltage driver, such that supply currents drawn from the supply voltages can remain substantially stable. The correction driver may be connected to one or more supply voltages, and programmed to output a stabilization current that offsets changes in supply currents arising from changing of the programmed output of the voltage driver circuit. Such a driver may enable a test system to more precisely test semiconductor devices.

Abstract: Automatic test equipment with multiple components to generate highly accurate and stable analog test signals and method for operating the test system in semiconductor manufacturing process are disclosed. Output analog signals from existing test systems often fail the stability and accuracy requirement with less than 10 mV variations for testing certain electronic devices, due in part to environmental condition variations such as temperature fluctuations. Traditional compensation mechanisms for temperature variations involve time consuming and disruptive calibration procedures. Disclosed here is a system and method that provides near real-time monitoring and compensation for temperature-induced variations via a digital control mechanism that compensates for environmental variations in a time scale of less than 10 milliseconds and maintains the AC output analog signal with 10 milliVolt accuracy.

Abstract: An example test system includes a test carrier to receive a device to test. The test carrier includes test components to perform at least a structural test on the device. The example test system also includes a slot to receive the test carrier. The slot includes an interface to which the test carrier connects to enable the test carrier to communicate with a system that is part of the test system or external to the test system.

Abstract: In general, a test instrument includes a first processing system that is programmable to run one or more test programs to test a device interfaced to a test instrument, and that is programmed to control operation of the test instrument, and a second processing system that is dedicated to device testing. The second processing system being programmable to run one or more test programs to test the device, and the first processing system has a first application programming interface (API) and the second processing system has a second API, the first API and the second API being different APIs, the first API and the second API having at least some duplicate functions.

Abstract: Disclosed herein are voltage driver circuits and methods of operating the same. In some embodiments, a plurality of circuit slices are provided in a voltage driver circuit, each circuit slice is controlled to switchably connect a driver output to either a high voltage level or a low voltage level via a resistor, or to disconnect the driver output from both voltage levels. The circuit slices may provide an adjustable output impedance, which may be set to match the impedance of different loads. The circuit slices may also provide adjustable voltages with low power consumption, particularly in high speed applications. A calibration procedure is disclosed herein to generate a lookup table for how to selectively connect circuit slices to supply voltages given a target output voltage.

Abstract: An example method determines an error vector magnitude using automatic test equipment (ATE). The method includes demodulating data received at a first receiver to produce first symbol error vectors, where each first symbol error vector represents a difference between a predefined point on a constellation diagram and a first measured point on the constellation diagram generated based on at least part of the data received by the first receiver; demodulating the data received at a second receiver to produce second symbol error vectors, where each second symbol error vector represents a difference between the predefined point on the constellation diagram and a second measured point on the constellation diagram generated based on at least part of the data received by the second receiver; and determining the error vector magnitude for the data based on the first symbol error vectors and the second symbol error vectors.

Abstract: An example test system includes: a test rack including test slots; first and second shuttles that are configured to move contemporaneously to transport devices towards and away from trays, with at least some of the devices having been tested and at least some of the devices to be tested; first and second robots that are configured to move contemporaneously to move the devices that have been tested from test sockets in test carriers to the first and second shuttles, and to move the devices to be tested from the first and second shuttles to the test sockets in test carriers; and first and second test arms that are configured to move contemporaneously to move the test carriers between the first and second robots and the test rack.

Abstract: An example system includes non-transitory machine-readable storage storing calibration data sets. A calibration data set includes parameter values that vary non-linearly. Each of the calibration data sets is temperature-specific. The example system also includes channels over which signals pass to and from units under test (UUTs). A channel includes input circuitry to receive a signal of the signals and to obtain a first parameter based on the signal; and correction circuitry to obtain a second parameter based on the first parameter and based on the calibration data set. The second parameter includes a calibrated version of the first parameter. The calibration data set is selectable based on temperature.