Abstract: A digital processing device implemented on a single semiconductor substrate includes an nonvolatile memory for the storage of data and instructions that define operations on the data. The memory is connected to an inhibit logic interface which is in turn connected to an information bus. The information bus is connected to a central processor that performs the operations on data. An external interface is also connected to the information bus to provide information on the information bus to external devices. At least one security bit is provided for designating security status of information stored in the memory. Address logic is connected to the information bus to determine when information is being accessed from the memory. Security control circuitry is also provided and is connected to the central processing unit, the address logic, to determine when an instruction is being fetched by the central processing unit and if the instruction is being fetched from the memory.

Abstract: A direct a.c. supply converter for converting an N (.gtoreq.2) phase input voltage system into an a.c. output voltage system of different frequency, amplitude, and/or phase using width-modulated contributions from the phases of the input voltage system to produce the output voltage system suffers from the disadvantage that the maximum output voltage amplitude can be limited to the minimum instantaneous voltage of the input voltage system because of the arbitrary timing relationship between the two voltage systems. This limitation is relieved by the addition of a component at the N.sup.th harmonic of the input system frequency to the width-modulation so that the effective minimum instantaneous voltage of the input system is increased. An increase in the maximum output voltage amplitude can also be obtained by adding to the width-modulation a component at the P.sup.th harmonic of the output system frequency; this can be used along or in conjunction with the component at the N.sup.

Abstract: Using a process in accordance with the teachings of this invention, an integrated circuit may be fabricated providing refractory metal silicide layers, such as TiSi.sub.2, of differing thicknesses to provide optimal reductions in the sheet resistances of the regions in which refractory metal silicide layers are formed. In one embodiment of the present invention a field effect transistor having a polycrystalline silicon gate is fabricated to provide a gate having optimally minimized sheet resistance and source and drain regions having TiSi.sub.2 layers of the appropriate thickness to avoid punch-through leakage problems.

Abstract: An electronic system located upon a single semiconductor substrate including a plurality of isolated electronic subsystems located upon the semiconductor substrate. Each electronic subsystem includes a plurality of input/output lines. Several information bus lines are included that are connected to addressable transistors located between the individual bus lines and the input/output lines. An addressing means is connected to the addressable transistors for addressing each of the addressable transistors and for providing a first state signal indicating an ON condition to the first select group of said addressable transistors, electrically connecting the information bus lines to the input/output lines and a second state signal indicating an OFF condition to a second selected group of the addressable transistors, electrically isolating the information bus lines from the input/output lines. The addressable transistors maintain the state signal indicated condition.

Abstract: An amplifier for differentially driving a two wire line has two output terminals for connection to the line. The differential voltage on the line is monitored and a negative-feedback voltage derived therefrom is combined with the input signal voltage. This combination is applied to a reference impedance. The resulting current in this impedance controls the current fed to the line. In one embodiment the control is direct via controlled current sources for example precision current mirrors and in another embodiment a current mirror controls the current to one wire and the current to the other wire is controlled indirectly via circuitry arranged to maintain equal voltage excursions on the two wires of the line.

Abstract: The disclosure relates to a method for producing graded band gap mercury cadmium telluride, preferaby in narrow band gap mercury cadmium telluride, to reduce tunneling and the like by causing the surface region of the mercury cadmium telluride to lose mercury or by replacing the mercury with another group IIB element, such as cadmium or zinc. Cadmium or zinc films are deposited on the surface of a mercury cadmium telluride substrate and the substrate is then subjected to a low temperature anneal to replace the mercury at the substrate surface on a graded basis. In the case of a P-type mercury cadmium telluride substrate, the film can be that of a group I metal such as gold, silver or copper. Low temperature annealling is again used. The deposited film can be selectively disposed on the substrate to provide localized regions with graded band gas in the mercury cadmium telluride substrate.

Abstract: A computer vision apparatus for automatically inspecting printed labels is disclosed. A television type camera views a label under inspection and inputs an image thereof to a pattern recognition and analysis circuit for verification. A monitor with viewing screen, joystick and keypad is connected to the pattern recognition and analysis circuit for operator supervision of the system.

Abstract: A data processing apparatus capable of operating in a plurality of modes includes a technique for automatically determining the proper mode from user inputs. This invention is most applicable to small hand held or desk top data processing apparatuses which operate in one mode like a calculator and which include provisions for entering, editing and running computer programs in a higher order language. User inputs, such as those from an ordinary keyboard, are stored in an input buffer memory until an end-of-entry key is actuated. Depending upon the nature of the end-of-entry key and the particular set of keyboard entries stored in the input buffer memory, the apparatus automatically determines the required mode for processing the data in the input buffer, enters that selected mode and peforms the function required by the input characters.

Abstract: An MOS/LSI type dynamic RAM with single 5 V supply and grounded substrate employs a guard ring surrounding the cell array to prevent pattern sensitivity in testing. The guard ring is an N+ region biased at Vdd over a deep P+ region in a P-substrate, producing a built-in electric field which attracts diffusing minority carriers into a collecting junction. A standard process for making double-level poly memory devices is modified by adding a P+ implant and deep drive-in prior to field oxidation.

Abstract: A static random access memory wherein positive feedback is used in the bit line loads. The output of the first sense amplifier stage is fedback to the gates of depletion-made bit line load transistors, to provide positive feedback during the read or write operation. That is, since one of the complementary bit lines which the accessed memory cell is attempting to pull down sees a load impedance which gradually becomes higher and higher, the memory cell can pull down this bit line more rapidly. To accomplish this with stability, the first sense amplifier stage has less than unity open loop gain, and a succeeding sense amplifier stage is therefore used for further amplification.

Abstract: A dynamic MOS read/write memory has a substrate bias generator circuit which includes, in this example, four separate pump circuits. A first of these operates only during power-up to quickly produce the desired back bias; this pump circuit uses a high frequency oscillator and a low impedence drive, and cuts off to save power as soon as the necessary bias is reached. A second generates a smaller sustaining current, using a lower frequency oscillator and higher impedance drive; this functions to compensate for leakage during idle periods. The third and fourth pump circuits are driven by RAS and CAS, so these occur only when needed, and at a rate dependent upon the actual operating condition of the memory.

Abstract: A system for real-time digital signal processing employs a single-chip microcomputer device having separate on-chip program ROM and data RAM, with separate address and data paths for program and data. An external program address bus allows off-chip program fetch in an expansion mode, with the opcode returned by an external data bus. A bus interchange module allows transfer between the separate internal program and data busses in special circumstances. The internal busses are 16-bit, while the ALU and accumulator are 32-bit. A multiplier circuit produces a single state 16.times.16 multiply function separate from the ALU, with 32-bit output to the ALU. One input to the ALU passes through a 0-to-15 bit shifter with sign extension. The data RAM has an internal shift arrangement useful in processing convolution algorithms. An addressed location in the RAM is read out and also shifted to the next higher location in one instruction cycle.

Abstract: A high density multiprobe including a multiprobe on a semiconductor substrate with contact pads selectively positioned in relation to the contacts of a device to be tested. Each of the selectively positioned contacts on the multiprobe semiconductor substrate include an elevated conductive surface that makes physical and electrical contact with the contacts of the device to be tested. In addition, the elevated conductive surfaces on the multiprobe are conductively connected to interface terminals on the semiconductor substrate to allow test signals to be input and output from the multiprobe device during testing. The multiprobe semiconductor substrate is also capable of containing onboard circuitry including buffers and logic circuitry for processing the test signals to be sent to and received from the device under test. A multiprobe testing device is also disclosed that includes the multiprobe semiconductor substrate with elevated contacts to allow for the testing of a semiconductor device.

Abstract: An alloy for use in production of electromagnetic radiation detectors comprises (Hg,Cd,Zn,)Te for producing crystals with dislocation densities less than about 10.sup.4 cm.sup.-2. The elements are combined in accordance with the formula (Hg.sub.1-x-y Cd.sub.x Zn.sub.y)Te where x is about 10 to about 90 and y is about 0.6 to about 5.0 mole percent.

Abstract: The disclosure relates to a method of sealing the surface of an aluminum member, such as an aluminum foil, from the environment by first placing the foil in an H.sub.2 SO.sub.4 bath to form an oxide which normally will not provide a total seal of the aluminum from the environment and then placing the aluminum member with oxide thereon in an H.sub.3 PO.sub.4 bath to close the pores in the oxide layer and provide sealing of the aluminum from the environment. This process also passivates the silicon.

Abstract: An integrated circuit isolation technology wherein the nitride-sidewall methods of the prior art are improved by performing an undercut and backfill before the second nitride (the sidewall nitride which prevents encroachment) is added to the first nitride (which covers the moat areas). Thus, the butt joint between the two nitrides is made more secure, and localized bird's-beaking at the butt joint between the moat nitride and the sidewall nitride does not occur.

Abstract: Quantum-coupled devices, wherein at least two closely adjacent potential wells, (e.g. islands of GaAs in an AlGaAs lattice) are made small enough that the energy levels of carriers within the wells are discretely quantized. This means that, when the bias between the wells is adjusted to align energy levels of the two wells, tunneling will occur very rapidly, whereas when energy levels are not aligned, tunneling will be greatly reduced. To provide output coupling from these quantum-well devices to macroscopic currents, the output from the quantum-well devices is injected into localized states close to an extremely small metal line (e.g. 200 Angstroms square in section). These trapped charged perturb the resistance of a metal line significantly, so that a conventional sense amplifier can be used for differential sensing between two such narrow metal lines, to provide macroscopic outputs.

Abstract: The disclosure relates to a method of etching semiconductor material wherein the material is secured in an oxide coated aluminum foil which acts as an etchant mask. The portion of the material extending from one side of the foil can then be etched with a semiconductor material etchant with the remainder of the material being masked from the etchant by the foil.

Abstract: A thermal or pressure responsive switch has a base mounting a set of electrical contacts. A metallic snap acting disc support, placed on the base is provided with a bore which receives a pin to transfer motion from a disc mounted on the support to the set of electrical contacts upon snapping of the disc.A first embodiment has a pressure converter received on the disc support. The peripheral edge of the snap acting disc is received on a seat formed in the converter with an annular reaction ridge formed on the support.A second embodiment has a pressure converter with the peripheral edge of the snap acting disc received on a seat formed in the disc support and an annular force ridge on the converter is adapted to contact the upper surface of the disc. In either embodiment a layer of low friction plastic can be placed on both faces of the disc.A third embodiment has a flat metallic disc support with a recessed portion for receiving the disc and a continuous stop surface.

Abstract: A memory apparatus suitable for storing data for a high resolution bit mapped display includes large capacity (e.g. 64-k) semiconductor random access memory circuits in which to reduce the effective access time the circuits are operated and addressed in a repeating cycle including in succession reading from two or more addresses in sequence having the same row address component (i.e. in page mode), for example for the display, and writing into or reading from a randomly selected address.