Patents Assigned to Texas Instruments
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Patent number: 4545034Abstract: A transversly injected quasi-floating gate memory cell. A memory transistor in bulk silicon has a channel region in bulk silicon which is capacitatively coupled both to a thin polysilicon quasi-floating gate and to an overlying word line. The thin polysilicon level which comprises the floating gate is not coterminous with the channel region of the memory transistor, but the quasi-floating gate portion of the thin polysilicon layer is connected, through a polysilicon channel region, to a write bit line. The overlying word line thus addresses both the write transistor in a thin polysilicon level and also the memory transistor itself in the substrate.Type: GrantFiled: June 17, 1983Date of Patent: October 1, 1985Assignee: Texas Instruments IncorporatedInventors: Pallab Chatterjee, Hisashi Shichijo, John E. Leiss
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Patent number: 4544851Abstract: A digital synchronizer circuit including an input to receive an asynchronous level and a second input to receive an ansynchronous pulse. Both inputs are connected to the synchronizer input circuitry which will provide a level output for either type of input signal. This circuitry is connected to the remainder of the digital synchronizer which includes a latch connected to the level input and a level sensitive circuit connected to the output of the latch. The latch is constructed to provide a rapid transition between a logic "0" and "1". In addition, the latch is periodically cleared. The level sensitive circuit provides a propagation barrier to any metastable state that may be present in the latch. However, the level sensitive circuit is also constructed for rapid transition from a logic "0" to a logic "1" when such a state occurs within the latch. An additional latch is connected in a further embodiment to provide additional reliability of the synchronizer circuit.Type: GrantFiled: August 31, 1981Date of Patent: October 1, 1985Assignee: Texas Instruments IncorporatedInventors: Marvin Conrad, Karl M. Guttag, John V. Schabowski, Derek Roskell, Jim A. Carey, Brian Shore
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Patent number: 4543500Abstract: A random access read/write MOS memory device consisting of an array of rows and columns of one-transistor memory cells employs a bistable sense amplifier circuit at the center of each column. The sense amplifier is of the dynamic type in that coupling transistors connect the column line halves to the cross-coupled drive transistors. The sources of the driver transistors are connected to ground through a sequentially timed, three step grounding arrangement employing two transistors, one having a dual channel implanted to provide two different threshold voltages. Active load devices connected to the column line halves provide pull-up of the voltage on the one-going column line half to a full Vdd level.Type: GrantFiled: October 22, 1980Date of Patent: September 24, 1985Assignee: Texas Instruments IncorporatedInventors: Joseph C. McAlexander, III, Lionel S. White, Jr., G. R. Mohan Rao
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Patent number: 4543501Abstract: A random access read/write MOS memory device consisting of an array of rows and columns of one-transistor memory cells employs a bistable sense amplifier circuit at the center of each column. The sense amplifier is of the dynamic type in that coupling transistors connect the column line halves to the cross-coupled driver transistors. The sources of the driver transistors are connected to ground through a sequentially timed, three step grounding arrangement employing two transistors, one having a dual channel implanted to provide two different threshold voltages. Active load devices connected to the column line halves provide pull-up of the voltage on the one-going column line half to a full Vdd level.Type: GrantFiled: October 15, 1984Date of Patent: September 24, 1985Assignee: Texas Instruments IncorporatedInventors: Joseph C. McAlexander, III, Lionel S. White, Jr., G. R. Mohan Rao
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Patent number: 4542986Abstract: In an integrated laser/FLIR rangefinder a scanner position sensor comprising an LED of the array of LEDs of a forward looking infrared (FLIR) system, a reticle grating located at the image plane of LED optical path, and a silicon detector positioned to receive the light passing through the reticle grating for producing a plurality of signals in response to light passing through each grating slot. One of the signals is selected for the synchronization logic for controlling the charging and firing of the laser. If there is no range return a second signal is selected for adjusting the position of the timing pulse.Type: GrantFiled: March 7, 1983Date of Patent: September 24, 1985Assignee: Texas Instruments IncorporatedInventor: Barry N. Berdanier
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Patent number: 4542453Abstract: A single-chip microcomputer device contains on-chip program storage in a read-only memory (ROM), and this program may be corrected or updated by patching. The ROM addresses are applied to an off-chip memory device containing one bit for each potential ROM address, and each bit is set to mark the beginning address of code to be patched; an interrupt is signalled when one of these set bits is accessed by an address occurring during operation of the microcomputer. The interrupt causes the processor to branch to an off-chip program memory to insert the patch code. The patch ends in a branch back to the on-chip ROM.Type: GrantFiled: February 19, 1982Date of Patent: September 17, 1985Assignees: Texas Instruments Incorporated, IBM Corp.Inventors: Michael J. Patrick, David M. Snider
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Patent number: 4541167Abstract: The disclosure relates to a method manufacturing semiconductor devices which minimizes encroachment by utilizing a polycrystalline silicon (polysilicon) layer over a grown oxide on the substrate with a nitride layer positioned above the polysilicon layer. A patterned resist is then formed in the active device regions and the device is then etched in the regions where the resist has not been applied to remove the nitride layer, the polysilicon layer and the oxide layer in one embodiment and, in a second embodiment, also removes a portion of the substrate. The silicon substrate portion which is exposed is then oxidized by field oxidation to provide, in the first embodiment, an oxide layer which rises above the level of the polysilicon layer and, in the second embodiment, to a point equal to or slightly above the oxide layer beneath the polysilicon layer. The nitride and polysilicon layer are then stripped or, alternatively, the polysilicon layer can be oxidized.Type: GrantFiled: January 12, 1984Date of Patent: September 17, 1985Assignee: Texas Instruments IncorporatedInventors: Robert H. Havemann, Gordon P. Pollack
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Patent number: 4540226Abstract: An electronic connection socket for connecting an electronic package and including a body of nonconductive material, an electronic device fabricated upon a semiconductor substrate located upon the body. The electronic device includes several bonding pads. The socket includes a set of pins to provide interconnection to external electronic devices. The body also includes pin sockets providing interconnection to the electronic package. The pins and pin sockets of the body are also connected to the bonding pads of the electronic device. To provide the electrical interconnection between the electronic package, the electronic device located upon the semiconductor substrate in the socket body and the external circuitry connected to the body.Type: GrantFiled: January 3, 1983Date of Patent: September 10, 1985Assignee: Texas Instruments IncorporatedInventors: Raymond W. Thompson, Navinchandra Kalidas, John H. Abbott, David S. Laffitte
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Patent number: 4538756Abstract: Reinforced structural elements are produced by taking two or more sheets of the same or different malleable metal and applying a pattern of thermally decomposable stop-off material on an interfacial surface, solid phase green bonding the sheets one to another by squeezing them through squeezing rollers and sintering the sheets to improve the metallurgical bond therebetween. The composite can be formed into complex configurations having compound reentrant surfaces and then raised above a predetermined temperature to decompose the stop-off material to generate gas and inflate the sheets contiguous to the pattern. The stop-off material can be chosen to decompose essentially completely at a temperature above the predetermined temperature which facilitates forming prior to inflation or the material can include a portion which decomposes at the sintering temperature of the metallic sheets employed giving a two stage inflation.Type: GrantFiled: June 10, 1983Date of Patent: September 3, 1985Assignee: Texas Instruments IncorporatedInventors: George Trenkler, Richard G. Delagi
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Patent number: 4539528Abstract: A two-port monolithic microwave amplifier, which uses a distributed negative resistance diode with gain (such as an IMPATT diode) as an active element. The diode is tapered (increasing in width but not in thickness) so that, as the RF signal propagates along the diode, it sees a wider and wider active diode region. This diode is operated in the power-saturated region, so that, as the RF signal propagates along the diode, terminal voltage remains essentially constant, but the RF current increases. This configuration is inherently undirectional.Type: GrantFiled: August 31, 1983Date of Patent: September 3, 1985Assignee: Texas Instruments IncorporatedInventors: Burhan Bayraktaroglu, Bumman Kim, William Frensley
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Patent number: 4538343Abstract: A sidewall-nitride isolation technology avoids stress-induced defects, while permitting a heavy channel stop implant to avoid turn-on of the field oxide transistor, by performing a two-step silicon etch. The first channel stop implant is performed after the first silicon etch, before the sidewall nitride is deposited. A further silicon etch is performed after the sidewall nitride is in place, and a second channel stop implant follows. The first implant can be a light dose, to avoid excess subthreshold leakage in the active devices due to field-assisted turn on at the corners of the moat regions, and the second implant can be a very heavy dose to provide complete isolation without any danger of the channel stop species encroaching on the active device regions.Type: GrantFiled: June 15, 1984Date of Patent: September 3, 1985Assignee: Texas Instruments IncorporatedInventors: Gordon P. Pollack, Clarence Teng, William R. Hunter
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Patent number: 4539703Abstract: A video data acquisition system includes a vision system having a video camera for taking pictures of articles. The video acquisition system is adapted to acquire, digitize and select signals within a predetermined amplitude range as representations of pixels of the images of the pictures arranged in rows, columns and diagonal lines, and further adapted to provide a total count of pixels in rows, columns and diagonal lines. A hand-held application module for directing the operation of the vision system has teaching capabilities in conjunction with the system for causing the video camera to take repeated pictures of an article within its field of view in various positions to provide identity of the article. The video acquisition system includes means for computing the area and perimeter of the article and for computing the maximum moments and minimum moments, thereby providing an identification of the article and its orientation.Type: GrantFiled: March 5, 1982Date of Patent: September 3, 1985Assignee: Texas Instruments IncorporatedInventors: Melvin R. Clearman, Clyde H. Springen
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Patent number: 4539566Abstract: An auto notch system which automatically "notch" filters up to four interference signals (interferers) in the band from 50 KHz to 150 KHz comprises a signal detector, an adjustable notch filter, a bandpass receiver and a digital controller, plus the software that runs in the digital controller. The signal detector circuit has an antenna, a preamplifier and a group of "fixed" filters. The adjustable notch filters are four circuits, each includes an active notch type filter stage with a DAC (digital to analog converter) in series with the input resistor to allow gain control and another DAC that controls the current through a diode that is optically coupled to a light dependent resistor pair. The light resistor pair is in the filter loop and as the resistance varies the frequency response of the filter changes. Thus the frequency response is controlled by varying the diode current.Type: GrantFiled: November 4, 1982Date of Patent: September 3, 1985Assignee: Texas Instruments IncorporatedInventors: Claude A. Sharpe, Cecil C. Ho
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Patent number: 4538282Abstract: A PSK modem has a transmitter for converting input digital data into corresponding PSK signals modulated on a first carrier for transmission out and a receiver for receiving PSK signals and for converting those PSK signals into corresponding digital signals wherein the receiver has a phase locked loop used in demodulating the input PSK signal. The phase locked loop includes a low pass filter and an integrator connected in a circuit configuration so that the low pass filter output overrides the integrator output even if the output of the integrator is equal in magnitude to either of its input signals, thereby allowing the loop to lock. The integrator then adjusts itself slowly to reduce the DC output of the low pass filter and the steady state phase to 0. This permits the loop to free run in the absence of an input signal without losing lock.Type: GrantFiled: August 16, 1982Date of Patent: August 27, 1985Assignee: Texas Instruments IncorporatedInventor: James R. Hochschild
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Patent number: 4537365Abstract: An over-the-shoulder automotive safety seat belt system having a latch providing a tensionless comfort setting for the belt during use and having remotely operable thermostat metal means to release the latch and permit automatic belt retraction after use is shown to have an improved electrically operable latch release mechanism providing reliable latching and providing fast and reliable latch release operation at low power levels.Type: GrantFiled: July 6, 1982Date of Patent: August 27, 1985Assignee: Texas Instruments IncorporatedInventors: Henry Ty, Alfred J. White
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Patent number: 4538239Abstract: A system for real-time digital signal processing employs a single-chip mircocomputer device having separate on-chip program ROM and data RAM, with separate address and data paths for program and data. An external program address bus allows off-chip program fetch in an expansion mode, with the opcode returned by an external data bus. A bus interchange module allows transfer between the separate internal program and data busses in special circumstances. The internal busses are 16-bit, while the ALU and accumulator are 32-bit. An improved multiplier circuit produces a single state 16.times.16 multiply function separate from the ALU, with 32-bit output to the ALU; an array of static adders with carry feed-forward controlled by two-bit-at-a-time Booth's decoders, along with a dynamic carry-ripple adder, produces the one-state 16.times.16 multiply. One input to the ALU passes thorugh 0-to-15 bit shifter with sign extension.Type: GrantFiled: February 11, 1982Date of Patent: August 27, 1985Assignee: Texas Instruments IncorporatedInventor: Surendar S. Magar
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Patent number: 4538287Abstract: A floating gate amplifier in a charge-coupled device (CCD) permitting non-destructive readout, where the floating gate is conductively coupled through a high resistance element to a bias voltage. The floating gate is defined by a lower level of metallization which is embedded in an insulating layer and crosses the charge transfer channel. In one embodiment the floating gate is connected to the source of a metal-oxide-semiconductor transistor and the drain of the transistor is connected to an upper level conductor which is a bias line. In another embodiment, the anode of a diode is connected to the floating gate and the diode cathode is connected to the bias line. A pair of control gates adjacent to and partially overlapping the floating gate transfer charge packets and improve sensitivity. Reading is accomplished by detecting voltages induced on the floating gate by the charge packets.Type: GrantFiled: June 4, 1979Date of Patent: August 27, 1985Assignee: Texas Instruments IncorporatedInventors: Charles G. Roberts, Joseph E. Hall
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Patent number: 4538127Abstract: A magnetic field generator having a conductor winding shaped to lie over the surface of a cylinder such that four pairs of straight conductor elements lie parallel to the axis of symmetry (Z axis) of the cylinder equally spaced around its periphery. These elements are joined by 90 degree arc conductor elements. The winding is such that in the straight elements of each pair, current flow is the same direction while in adjacent peripheral elements, current flow is in opposite directions so that the magnetic field due to the current flowing through the peripheral elements is zero on the Z-axis while the current flow through the straight elements forms a quadripole magnetic field about the Z-axis. Modifications of the structure can be made to provide for six-pole, 8-pole, 12-pole, etc., structures. In each case, a single conductor formed into an appropriate sequence of meanders can be used to produce the desired structure, thereby simplifying fabrication.Type: GrantFiled: May 14, 1981Date of Patent: August 27, 1985Assignee: Texas Instruments IncorporatedInventor: Denis F. Spicer
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Patent number: 4536738Abstract: A programmable circuit arrangement is described which can be programmed by applying a programming voltage so that it delivers at its output a signal having a predetermined binary value. The circuit arrangement comprises an input means responsive to the programming voltage. Further, it comprises a conducting means connected to the input means and capable of being brought to a non-conductive state upon application of the programming voltage to the input means. The circuit arrangement further comprises an output means connected to the conductive means and delivering a signal having one binary value in the conductive state of the conductive means and the other binary value in the non-conductive state of the conductive means.Type: GrantFiled: January 24, 1983Date of Patent: August 20, 1985Assignee: Texas Instruments IncorporatedInventors: Horst Huse, Werner Elmer
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Patent number: RE31977Abstract: A digital computing system having an auto-incrementing memory subsystem includes one or more separate memories. Each memory in the memory subsystem has its own address counter which is automatically incremented to the next sequential address after each memory readout. In the case of plural memories, a page select enables memory readout only when a page designation portion of the address matches a unique page number associated with the memory. An automatic memory refresh is provided by a refresh address counter along with a refresh address incrementer in the case that a memory is a dynamic RAM. These features enable improved performance in the digital computing system by reducing the required CPU overhead for memory subsystem control.Type: GrantFiled: August 19, 1983Date of Patent: August 27, 1985Assignee: Texas Instruments IncorporatedInventor: Granville E. Ott