Abstract: Embodiments of the invention provide a system and method for chip to chip communications in electronic circuits. A router or switch receives data packets at input port ASICs. A routing table on the input port ASIC or on a routing ASIC is used to identify a destination port ASIC based upon header information in the data packet. The data packet is transmitted from the input port ASIC to the destination port ASIC using millimeter wave signals that are transmitted across a waveguide or a wireless interface.

Abstract: In certain embodiments, systems for receiving one or more echoes are provided. The system comprises a first attenuator, a first amplifier, and a second attenuator. The first attenuator is configured to receive the one or more echo signals, and generate a corresponding set of first attenuated echo signals, respectively, based on a number of signal strengths of the one or more echo signals. The first amplifier is configured to receive and amplify the set of first attenuated echo signals to thereby generate a set of first amplified echo signals corresponding to the one or more first attenuated echo signals, respectively. The second attenuator is configured to receive the set of first amplified echo signals and generate a set of second attenuated echo signals corresponding to the set of first amplified echo signals, respectively, based on a number of signal strengths of the set of first amplified echo signals, respectively.

Abstract: A wireless device includes a wireless transceiver configured to transmit to and receive from nodes in a wireless sensor network (WSN) and control logic coupled to the first wireless transceiver. The wireless transceiver transmits a wireless packet to a node in the WSN based on the transmission coinciding with a break in transmissions for a second wireless network. Based on the wireless transceiver being configured to transmit the wireless packets utilizing time synchronized channel hopping, slot frames for packet transmissions in the WSN are time offset so as not to coincide with transmissions made on the second wireless network. Based on the wireless transceiver being configured to transmit the packets utilizing coordinated sampled listening, wake up sequence transmissions for the WSN are time offset so as not to coincide with the transmissions made on the second wireless network.

Abstract: An integrated circuit is provided with a set of sensors for scaling voltage based on performance of the integrated circuit. The set of sensors are monitored, and sensor provides an output value indicative of a performance metric of the integrated circuit. The output values from the set of sensors are combined using a calibrated model to determine when a threshold value is reached. A change to an operating voltage for a portion of the integrated circuit is initiated in response to reaching the threshold.

Abstract: A packaged power supply module (100) comprising a chip (110) with a first power field effect transistor (FET) and a second chip (120) with a second FET conductively attached side-by-side onto a conductive carrier (130), the transistors having bond pads of a first area (210) and the carrier having bond pads of a second area (230) smaller than the first area. Conductive bumps (114, 115, 124, 125) attached to the transistor bond pads and conductive bumps (126) attached to the carrier bond pads have equal volume and are coplanar (150), the bumps on the transistor pads having a first height and the bumps on the carrier pads having a second height greater than the first height.

Abstract: Semiconductor components are often fabricated that include a nickel silicide layer, e.g., as part of a gate electrode in a transistor component, which may be formed by forming a layer of nickel on a silicon-containing area of the semiconductor substrate, followed by thermally annealing the semiconductor substrate to produce a nickel silicide. However, nickel may tend to diffuse into silicon during the thermal anneal, and may form crystals that undesirably increase the sheet resistance in the transistor. Carbon may be placed with the nickel to serve as a diffusion suppressant and/or to prevent nickel crystal formation during thermal annealing. Methods are disclosed for utilizing this technique, as well as semiconductor components formed in accordance with this technique.

Abstract: A calibration method to compensate for a sparsifying basis mismatch is provided. An analog signal is converted to a first digital signal at a sampling frequency that is less than a Nyquist frequency for the analog signal to generate a first digital signal. Each of a plurality of spectral terms is iteratively isolated from the first digital signal, and the offset for each of the plurality of spectral terms is iteratively determined. A dictionary is then constructed using the offset for each of the plurality of spectral terms, where the dictionary compensates for mismatch from a sparsifying basis.

Abstract: A die expansion bus efficiently couples a supplemental portion of a processing system to an original portion of the processing system on a die. The die expansion bus couples bus subsystems of the supplemental portion of the processing system to the bus subsystems of the original portion of the processing system. The original portion of the processing system is arranged to control the data resources of the supplemental portion of the processing system by accessing memory mapped control registers associated with the bus subsystems of the supplemental portion of the processing system.

Abstract: A method of apodizing for ultrasound beamforming includes providing filtered digital channel data representing echo data from target tissue in a plurality (k) of data channels and a predefined number of active channels (Nact). A software-based integrated apodization algorithm dynamically apodizes the digital channel data using a selected apodizing function h[n,k], n being the sample number. The integrated apodization algorithm applies dynamic aperture control to create an effective aperture by generating a parameter numApertureChannels (Nap[n]), where Nap[n]?Nact, and selecting Nap[n] particular data channels based on a dynamic beam focusing location for beamforming. Applied dynamic data scaling provides data normalization using a vector inner product between h[n,k] and a scale factor to generate normalized apodization factors hnorm [n,k]. The normalized apodization factors are applied to the digital channel data in the Nap[n] particular data channels to generate apodized and normalized digital channel data.

Abstract: An N-point Fast Fourier Transform (FFT) using mixed radix stages with in-place data sample storage may be performed by decomposing N into a product of R sequential mixed radix stages of radix-r(i). N data samples are partitioned into at least B memory banks, where B is equal to a largest radix of the R radix stages. Each input data sample to each radix-r(i) butterfly comes from r(i) different memory banks and the output data samples are written to the same memory locations in the r(i) memory banks. Determining from which memory bank the input data samples and output data samples of the butterflies are stored is done based on the radix size and sequential position of the radix stage. Determining the address of the input data samples and the output data samples within each memory bank is based on the radix size and sequential position of the radix stage.

Abstract: An analog-to-digital converter (ADC) function in which digital error correction is provided. Parallel ADC stages are synchronously clocked to convert an analog input signal into digital words; at least one of the digital outputs is encoded according to an error correction code. Decision logic circuitry decodes a code word comprised of the concatenation of the digital outputs from the parallel stages, to derive a digital output from which the digital output word corresponding to the analog input signal can be derived. The decision logic circuitry can provide an error signal used to correct the state of one or more bits of the digital output from one of the ADC stages, for the case of a systematic code; alternatively, the decision logic circuitry can directly decode the code word to provide the digital output. The architecture may be applied to stages in a pipelined ADC.

Abstract: A method of forming an electronic assembly includes dispensing a die attach material on a substrate into a recessed portion that includes an inner recessed portion of including a die pad. The die attach material is not dispensed on an outer raised flat portion of the die pad. A semiconductor die is attached directly on the outer raised flat portion and affixed to the die pad with said die attach material in said interior recessed portion but not on said outer raised flat portion.

Abstract: A method for calibrating automatic white balance (AWB) in a digital system is provided that includes capturing an image of a test target under a natural lighting condition, generating a first color temperature reference from the captured image, and outputting AWB configuration data for the digital system, wherein the AWB configuration data comprises the first color temperature reference and a second color temperature reference generated using the test target under simulated lighting conditions. A method for calibrating automatic white balance (AWB) in a digital system comprising a first imaging sensor is provided that includes receiving a reference for AWB that was generated using an image captured using a second imaging sensor, and compensating a histogram reference into a histogram reference for AWB for the first imaging sensor in the digital system based on R, G, B adjustment values from the second imaging sensor to the first imaging sensor.

Abstract: An apparatus comprises: a coarse voltage level comparator that generates a coarse voltage level comparison; a folder, a fine analog to digital (ADC) comparator coupled to an output of the folder, wherein an output of the fine ADC is cyclical; an up encoder coupled to an output of the fine ADC encoder, the up encoder configured to output a first value if the cyclical output of the fine ADC is in a defined downward transition; and a fold information generator coupled to an output of the up encoder, wherein the fold information generator is configured to generate a determination as to in which fold an analog voltage occurs.

Abstract: An output stage for a switched mode power supply has a high-side switch having a first power FET and a first speed-up FET monolithically integrated onto a first die. A low-side switch has a second power FET and a second speed-up FET monolithically integrated onto a second die. A semiconductor device has the power FET and the speed-up FET monolithically integrated in a “source-down” configuration. A method of operating an output stage of a switched mode power supply alternately turns on and off a high-side and a low-side switch and drives at least one of the switches with a speed-up FET monolithically integrated with the switch.

Abstract: There has been very little (if any) attention to address contamination diffusion within an integrated circuit (IC) because there are very few applications where a protective overcoat will be penetrated as part of the manufacturing process. Here, a sealing ring is provided that address this problem. Preferably, the sealing ring uses the combination of electrically conductive barrier rings and the tortuous migration path to allow an electronic device (i.e., thermopile), where a protective overcoat is penetrated during manufacture, to communicate with external devices while being isolated to prevent contamination.

Abstract: Compressive sensing is an emerging field that attempts to prevent the losses associated with data compression and improve efficiency overall, and compressive sensing looks to perform the compression before or during capture, before energy is wasted. Here, a reconstruction algorithm is proposed for a compressive sensing successive approximation register (SAR) analog-to-digital converter (ADC). Accordingly, an analog signal is converted to a first digital signal at a sampling frequency that is less than a Nyquist frequency for the analog signal, and a second digital signal is constructed from the first digital signal with a box constrained linear optimization process such that the second digital signal is approximately equal to an analog-to-digital conversion of the analog signal at the Nyquist frequency for the analog signal.

Abstract: A system and method are disclosed for capturing pre- and post-event data for random events using minimum power. Real-time data is captured and stored in a continuous loop in a segment of a first memory. Upon detection of a designated event, a second memory is powered-on and post-event data is stored to a segment of the second memory. After a designated data capture window, the second memory is powered-off and real-time data is captured in an unused segment of the first memory. The post-event data may be captured in the unused segment of the first memory and later transferred to the second memory. Auto-address logic monitors and controls the storage and retrieval of pre- and post-event in the first and second memory. An energy management system determines and controls which segments of the first and second memory should be powered-on or kept in the stasis mode to store event data.

Abstract: In an embodiment of the invention, a method of fabricating a floating-gate PMOSFET (p-type metal-oxide semiconductor field-effect transistor) is disclosed. A silicide blocking layer (e.g. oxide, nitride) is used not only to block areas from being silicided but to also form an insulator on top of a poly-silicon gate. The insulator along with a top electrode (control gate) forms a capacitor on top of the poly-silicon gate. The poly-silicon gate also serves at the bottom electrode of the capacitor. The capacitor can then be used to capacitively couple charge to the poly-silicon gate. Because the poly-silicon gate is surrounded by insulating material, the charge coupled to the poly-silicon gate may be stored for a long period of time after a programming operation.

Abstract: A battery cell tab monitoring apparatus includes a conductive element electrically connected between two battery cells. The conductive element is connected to a sensing circuit including a pull-down current source connected to pull current from the conductive element and/or a pull-up current source connected to drive current into the conductive element. A voltage measuring circuit is connected to sense voltages during operation of the pull-down current source and the pull-up current source to be used to determine the status of the conductive element. For instance, voltages beyond certain fixed or variable thresholds indicate that the conductive element is flexing or cracking, which can be a precursor to its breaking. Voltages beyond other fixed or variable thresholds indicate that the conductive element is fully disconnected. The current sources used to push and pull the sensing currents may be used to bring the battery cells into balance when an imbalance is detected.