Abstract: According to particular embodiments, an illumination system includes a light source that generates light for use in illuminating a spatial light modulator and an assembly of two optical elements spatially separated by a gap that receives the light from the light source, changes the shape of the light, and transmits the light onto the spatial light modulator.

Abstract: A method for semiconductor processing is provided, wherein a semiconductor wafer having undergone polishing is provided. The semiconductor wafer has an active region positioned between one or more moat regions, wherein the one or more moat regions have an oxide disposed therein. A top surface of the active region is recessed from a top surface of the moat region, therein defining a step having a step height associated therewith. A step height is measured, and a photoresist is formed over the semiconductor wafer. A modeled step height is further determined, wherein the modeled step height is based on the measured step height and a desired critical dimension of the photoresist. A dosage of energy is determined for patterning the photoresist, wherein the determination of the dosage of energy is based, at least in part, on the modeled step height. The photoresist is then patterned using the determined dosage of energy.

Abstract: Generally, with low drop out (LDO) regulators that use multiplexed power supplies, the transistors within the regulator can use a substantial amount of area. Here, a regulator is provided that uses a multiplexer to commonly control the back-gates of multiple power transistors within the LDO. By doing this, the area overhead that would normally be present with these switches (of the multiplexer) can be dramatically reduced without sacrificing performance.

Abstract: In one embodiment, a method of rendering stereoscopic images includes providing eyewear having a pair of lenses. Each lens is transitioned between an optically-shuttered state and an optically-transmissive state. The transitioning is in response to a voltage waveform applied substantially simultaneously to at least a portion of each lens. Each lens transitions between states in opposition to the other lens.

Abstract: An integrated circuit (25) formed at a semiconducting surface of a substrate including a common p-layer (38) includes functional circuitry (24) formed on the p-layer (38) including a plurality of terminals (IN, OUT, I/O) coupled to the functional circuitry (24). At least one ESD protection cell (30; in more detail 200) is connected to at least one of the plurality of terminals of the functional circuitry (24). The protection cell includes at least a first Nwell (37) formed in the p-layer (38), a p-doped diffusion (36) within the first Nwell (37) to form at least one Nwell diode comprising an anode (37) and a cathode (36). An NMOS transistor 200 is formed in or on the p-layer (38) comprising a n+ source (43), n+ drain (44) and a channel region comprising a p-region (41) between the source and drain, and a gate electrode (45) on a gate dielectric (46) on the channel region.

Abstract: A clock divider divides a high speed input clock signal by an odd, even or fractional divide ratio. The clock divider receives a divide factor value F representative of a divide ratio N, wherein the N may be an odd or an even integer. A fractional indicator indicates a fractional divide ratio when one and an integral divide ratio when zero. A count indicator is asserted every N/2 input clock cycles when N is even. The count indicator is asserted alternately N/2 input clock cycles and then 1+N/2 input clock cycles when N is odd. The clock divider synthesizes one period of an output clock signal in response to each assertion of the count indicator for a fractional divide ratio and synthesizes one period of the output clock signal in response to two assertions of the count indicator for an integral divide ratio.

Abstract: A method and structure for uncovering captive devices in a bonded wafer assembly comprising a top wafer and a bottom wafer. One embodiment method includes forming a plurality of cuts in the top wafer and removing a segment of the top wafer defined by the plurality of cuts. The bottom wafer remains unsingulated after the removal of the segment.

Abstract: An integrated circuit (IC) device includes an electromigration resistant feed line. The IC device includes a substrate including active circuitry. A back end of the line (BEOL) metallization stack includes an interconnect metal layer that is coupled to a bond pad by the EM resistant feed line. A bonding feature is on the bond pad. The feed line includes a uniform portion and patterned trace portion that extends to the bond pad which includes at least three sub-traces that are electrically in parallel. The sub-traces are sized so that a number of squares associated with each of the sub-traces are within a range of a mean number of squares for the sub-traces plus or minus twenty percent or a current density provided to the bonding feature through each sub-trace is within a range of a mean current density provided to the bonding feature plus or minus twenty percent.

Abstract: A method and apparatus for improving stability of histogram correlation based image and video processing algorithms. The method includes computing a histogram for target signal and reference signal for generating a target histogram and a reference histogram, performing low pass filtering of the input signal and the reference signal and producing smoothed histograms, and performing correlation on the smoothed histograms for improving stability of histogram correlation.

Abstract: A method of forming an integrated circuit (IC) includes providing a substrate having a topside semiconductor surface, wherein the topside semiconductor surface includes at least one of N+ buried layer regions and P+ buried layer regions. An epitaxial layer is grown on the topside semiconductor surface. Pwells are formed in the epitaxial layer. Nwells are formed in the epitaxial layer. NMOS devices are formed in and over the pwells, and PMOS devices are formed in and over the nwells.

Abstract: Apparatus for inspecting a semiconductor wafer (8) has a plurality of light sensors (2) arranged relative to a light source (1) and wafer inspection platform (4), so that images of different angle views of a surface of the wafer can be received and compared with corresponding images taken of a reference wafer to automatically detect defects based on image comparison. The light sensors (2) may receive superposed images of light (7) reflected directly from the light source (1) off the wafer surface and light (6) indirectly reflected off the wafer surface after first reflecting off a dome (3) with a diffusely reflecting inner surface (5) positioned over the platform (4).

Abstract: Disclosed embodiments comprise dynamic pulse width modulation (PWM) bit sequence selection techniques for use with video display devices. By dynamically selecting and applying a bit sequence based on the display image content and the limited dynamic range of human perception, the bit sequence used to display a given scene may be optimized in order to provide for increased bit depth or increased brightness. Generally one out of a plurality of available bit sequences would be applied to a given scene, with different bit sequences designated for displaying bright scenes and dark scenes. Alternatively, different bit sequences may be applied depending upon the amount of motion in a scene. Thus, a dynamic bit sequence selection technique may allow for a display device with increased bit depth and increased brightness.

Abstract: A method for associating handheld calculators with a network host system of a classroom network that includes receiving a service set identifier (SSID) of the classroom network by a handheld calculator, wherein the SSID includes a network mode indicator, and operating the handheld calculator according to the network mode indicator. The method may also include operating the handheld calculator in a configuration mode in which the handheld calculator sends a request for association to the network host system, wherein the request includes a unique identifier of the first handheld calculator, and acceptance of the request by the network host system, wherein authentication information for the handheld calculator is stored by the network host system to indicate that the first handheld calculator is associated with the classroom network.

Abstract: An integrated circuit containing an extended drain MOS transistor may be formed by forming a drift region implant mask with mask fingers abutting a channel region and extending to the source/channel active area, but not extending to a drain contact active area. Dopants implanted through the exposed fingers form lateral doping striations in the substrate under the mask fingers. An average doping density of the drift region under the gate is at least 25 percent less than an average doping density of the drift region at the drain contact active area. In one embodiment, the dopants diffuse laterally to form a continuous drift region. In another embodiment, substrate material between lateral doping striations remains an opposite conductivity type from the lateral doping striations.

Abstract: An address and command port interface selectively enables JTAG TAP domain operations and Trace domain operations within an IC. The port carries TMS and TDI input and TDO output on a single pin and receives a clock signal on a separate pin. The addressable two pin interface loads and updates instructions and data to the TAP domain within the IC. The instruction or data update operations in multiple ICs occur simultaneously. A process transmits data from an addressed target device to a controller using data frames, each data frame comprising a header bit and data bits. The logic level of the header bit is used to start, continue, and stop the data transmission to the controller. A data and clock signal interface between a controller and multiple target devices provides for each target device to be individually addressed and commanded to perform a JTAG or Trace operation.

Abstract: A GNSS receiver configured to detect a presence of at least one GNSS satellite signal in a received signal is provided. The GNSS receiver includes a buffer loaded with sample sets corresponding to the received signal and a Doppler derotation block configured to perform a Doppler derotation corresponding to at least one Doppler frequency on a sample set received from the buffer. The GNSS receiver further includes an accumulator block configured to perform a coherent accumulation of a plurality of sample sets upon or subsequent to the Doppler derotation corresponding to a Doppler frequency, and, a first memory configured to store the results of the coherent accumulation. A register array is configured to be loaded with the results stored in the first memory and a correlator engine is configured to generate correlation results by correlating the results in the register array with a plurality of code phases of GNSS satellites.

Abstract: An integrated circuit with SRAM cells containing dual passgate transistors and a read buffer, all connected to one word line is disclosed. The read buffer and one passgate transistor may be variously configured to a separate read data line and write data line, or a combined data line, in different embodiments. The read buffer in addressed SRAM cells may be biased during read operations. The read buffer in half-addressed SRAM cells may be biased or floated, depending on the configuration of the read data line and the write data line. The read buffer in addressed and half-addressed SRAM cells may be biased or floated, depending on the configuration of the read data line and the write data line.

Abstract: A transmitter is for use with multiple transmit antennas and includes a precoder unit configured to precode data for a transmission using a precoding matrix selected from a codebook, wherein the codebook corresponds to the following three transmission properties for an uplink transmission: 1) all precoding elements from the precoding matrix have a same magnitude, 2) each precoding element from the precoding matrix is taken from a set of finite values and 3) there is only one non-zero element in any row of the precoding matrix. The transmitter also includes a transmit unit configured to transmit the precoded data.

Abstract: A wireless receiver for multiple frequency bands reception includes a single receive radio frequency (RF) circuit (160, 170) having an RF bandpass substantially confined to encompass at least two non-overlapped such frequency bands at RF, a single in-phase and quadrature (approximately I, Q) pair of intermediate frequency (IF) sections (120I, 120Q) having an IF passband, and a mixer circuit (110) including an in-phase and quadrature (I,Q) pair of mixers (110I, 110Q) fed by said RF circuit (160, 170) and having a local oscillator (100) with in-phase and quadrature outputs coupled to said mixers (110I, 110Q) respectively, said mixer circuit (110) operable to inject and substantially overlap the at least two non-overlapped frequency bands with each other into the IQ IF sections (120I, 120Q) in the IF passband, the IF passband substantially confined to a bandwidth encompassing the thereby-overlapped frequency bands.

Abstract: A media over packet networking appliance provides a network interface, a voice transducer, and at least one integrated circuit assembly coupling the voice transducer to the network interface. The at least one integrated circuit assembly provides media over packet transmissions and holds bits defining reconstruction of a packet stream having a primary stage and a secondary stage. The secondary stage has one or more of linear predictive coding parameters, long term prediction lags, parity check, and adaptive and fixed codebook gains. The packet stream has an instance of single packet loss, and the reconstruction includes receiving a packet sequence represented by P(n)P(n?1)?, [Lost Packet], P(n+2)P(n+1)?, and P(n+3)P(n+2)?, obtaining as information from the secondary stage one or more of the linear predictive coding parameters, long term prediction lags, parity check, and adaptive and fixed codebook gains, and performing an excitation reconstruction utilizing said packet sequence thus received.