Abstract: A self-gating flip-flop circuit includes a flip-flop circuit and a clock circuit. The flip-flop circuit includes a clock input. The clock circuit is coupled to the clock input. The clock circuit includes a latch circuit, a reset circuit, and a gate circuit. The reset circuit is coupled to the latch circuit. The gate circuit is coupled to the latch circuit and the clock input.

Abstract: A method of de-blocking filtering a processed video is provided. The processed video includes a plurality of blocks and each block includes a plurality of sub-blocks. A current block of the plurality of blocks includes vertical edges and horizontal edges. The processed video further includes a set of control parameters and reconstructed pixels corresponding to the current block. A boundary strength index is estimated at the vertical edges and at the horizontal edges of the current block. The set of control parameters, the reconstructed pixels corresponding to the current block and partially filtered pixels corresponding to a set of adjacent sub-blocks are loaded. The vertical edges and the horizontal edges of the current block are filtered based on the boundary strength index and the set of control parameters such that a vertical edge of the current block is filtered before filtering at least one horizontal edge of the current block.

Abstract: A method of operating a wireless communication system is disclosed. The method includes receiving first and second parallel data streams. The first data stream is converted to a first frequency-domain data stream by a discrete Fourier transform (DFT) having NDFT0 size, where NDFT0 is a positive integer. The second data stream is converted to a second frequency-domain data stream by a DFT having NDFT1 size, where NDFT1 is a positive integer. The first and second frequency-domain data streams are mapped to respective subcarriers.

Abstract: A switched voltage converter may be controlled with load current feedforward control loop in addition to an output voltage feedback loop. The converter includes a first switch device that is controlled to open and close at a selected switching rate with a selected duty cycle. The first switch device is coupled in series with an inductor and conducts current through the inductor while the first switch is closed. A second switch device conducts current from the inductor to an output capacitor and to load while the first switch is open to produce an output voltage and a resulting load current through the load. The load current is measured in a continuous manner and a load current feedforward control signal is generated that is representative of the load current. The switch rate and/or duty cycle of the first switch is adjusted in response to the load current feedforward control signal.

Abstract: Configuration states for a computing device and/or associated peripherals (“profiles”) are stored in one or more non-volatile logic (“NVL”) arrays. Using the non-volatile sub-system for the computing device, triggers for reconfiguration of the respective device or peripherals are provided to an NVL array controller, which controls provision of the new profile(s) for the respective device or peripherals over a dedicated bus to a configuration register that stores the active profiles for the device and associated peripherals.

Abstract: A method of forming an interconnect structure for an integrated circuit. A dielectric stack is formed on the substrate including an etch-stop layer, a low-k or ULK dielectric layer, and a hard mask layer. The low-k or ULK dielectric is etched using at least two etching processes wherein each etching process is followed by an etch repair process where the etch repair process includes flowing at least one hydrocarbon into the reactor and generating a plasma. The photoresist may be removed using at least two ashing processes wherein each ashing process is followed by an ash repair process where the etch repair process includes flowing at least one hydrocarbon into the reactor and generating a plasma.

Abstract: Techniques of fabricating shallow trench isolation structures that reduce or minimize the number of trench cones during the formation of shallow trenches. The disclosed techniques introduce separate etch steps for etching shallow trenches with small feature dimensions and for etching shallow trenches with large feature dimensions. As an example, the disclosed techniques involve etching a first shallow trench in a first region of a substrate with a first etching parameter, and etching a second shallow trench in a second region of a substrate with a second etching parameter different from the first etching parameter. Among other things, the etching parameter may include an etching selectivity ratio of silicon to an etch retardant that contributes to cone formations. Because of the separate etch steps, the disclosed techniques allow the sidewall slopes between the first and second shallow trenches to be within a few degrees of deviation.

Abstract: A method for encoding a multi-view frame in a video encoder is provided that includes computing a depth quality sensitivity measure for a multi-view coding block in the multi-view frame, computing a depth-based perceptual quantization scale for a 2D coding block of the multi-view coding block, wherein the depth-based perceptual quantization scale is based on the depth quality sensitive measure and a base quantization scale for the 2D frame including the 2D coding block, and encoding the 2D coding block using the depth-based perceptual quantization scale.

Abstract: Methods and apparatus for providing high efficiency power amplifiers for both high and low output power levels are disclosed. An example apparatus includes a first amplifier to amplify a signal from a host device; and transmit the amplified signal to an antenna; a second amplifier to amplify the signal from the host device; and transmit the amplified signal to the antenna; and first, second, and third switches to: when the first and second switches are closed and the third switch is open, couple the first amplifier to the second amplifier in a parallel structure; and when the first and second switches are open and the third switch is closed, couple the first amplifier to the second amplifier in a stacked structure.

Abstract: Apparatus for communication across a capacitively coupled channel are disclosed herein. An example circuit includes a first plate substantially parallel to a substrate, thereby forming a first capacitance intermediate the first plate and the substrate. A second plate is substantially parallel to the substrate and the first plate, the first plate intermediate the substrate and the second plate. A third plate is substantially parallel to the substrate, thereby forming a second capacitance intermediate the third plate and the substrate. A fourth plate is substantially parallel to the substrate and the third plate, the third plate intermediate the substrate and the fourth plate. An inductor is connected to the first plate and the third plate, the inductor to, in combination with the first capacitance and the second capacitance, form an LC amplifier.

Abstract: A semiconductor package includes an integrated circuit formed on a semiconductor substrate. A stress buffer layer is provided on the integrated circuit. Further, a mold compound is provided on a surface of the stress buffer layer opposite the integrated circuit. The mold compound comprises a resin. The resin includes filler particles. The filler particles have multiple sizes with the largest of the particles having a size between 5 microns and 32 microns.

Abstract: Mechanical vibration may be sensed by a remotely located ultrasonic sensor. An ultrasonic wave may be transmitted from a transmitter to a vibrating surface, in which the transmitter is separated from the vibrating surface by a distance. A reflected portion of the ultrasonic wave that is reflected from the vibrating surface may be received by a receiver that is also separated from the vibrating surface by a distance. A measure of phase shift amplitude in the reflected portion of the ultrasonic wave may be determined and converted into an amplitude of a vibration of the vibrating surface.

Abstract: In accordance with some examples, a system comprises a substrate layer having an outer surface. The system also comprises a plurality of trenches extending from the outer surface into the substrate layer. The system then comprises a plurality of active regions with each active region positioned between a different pair of consecutive trenches of the plurality of trenches. The system also comprises a dielectric layer disposed in each of the plurality of trenches and on each of the plurality of active regions. The system then comprises a floating gate layer disposed on the dielectric layer and extending at least partially into each of the plurality of trenches.

Abstract: In accordance with at least one embodiment, an ESD device comprises: a semiconductor; a pad; a ground rail; a p-well formed in the semiconductor; a first p-type region formed in the p-well and electrically coupled to the ground rail; a first n-type region formed in the p-well and electrically coupled to the pad; a second n-type region formed in the p-well and electrically coupled to the ground rail; an n-well formed in the semiconductor; a first n-type region formed in the n-well; a first p-type region formed in the n-well and electrically coupled to the pad; and a second p-type region formed in the n-well and electrically coupled to the first n-type region formed in the n-well.

Abstract: A VBOOST generator includes, for example, a voltage regulator for generating a first power rail VX between the supply voltage VCC and ground. A clock generator is arranged to generate a clock signal oscillating between the supply voltage VCC and the voltage VCC?VX. A charge pump is arranged to couple the voltage VCC?VX to a first terminal of an on-substrate flyback capacitor during a first half-cycle of the first clock signal and is arranged to couple the voltage VCC to the first terminal of the flyback capacitor during a second half-cycle of the first clock signal. A pin is coupled to the substrate couples the voltage VCC+VX developed on a second terminal of the flyback capacitor during the second half-cycle of the first clock signal to an external bucket capacitor. A second charge pump is optionally included to increase the charging capacity of the VBOOST generator.

Abstract: A switch-mode power supply includes a DC-DC converter and metering circuitry that is coupled to the DC-DC converter. The metering circuitry includes scaling circuitry, a current source, a capacitor, switching circuitry, and a comparator. The scaling circuitry is configured to generate a reference current scaled to be a predetermined fraction of a peak current flowing in an inductor of the DC-DC converter. The current source is configured to output a first current that is one-half of the reference current. The capacitor is coupled to the current source. The switching circuitry is configured to switchably connect the current source to the capacitor. The comparator is coupled to the capacitor. The comparator is configured to generate a signal indicating that a voltage across the capacitor exceeds a threshold voltage.

Abstract: A pressure transducer includes a cavity, dipolar molecules disposed within the cavity, and pressure measurement circuitry. The pressure measurement circuitry is configured to measure a width of an absorption peak of the dipolar molecules, and to determine a value of pressure in the cavity based on the width of the absorption peak.

Abstract: Method and system to improve the performance of a video encoder. The method includes processing an initial video signal in a front-end image pre-processor to obtain a processed video signal and processor information respecting the signal, providing the processed video signal and the processor information to a video encoder, and encoding the video signal in the video encoder according to the processor information to provide an encoded video signal for storage. The system includes a video pre-processor connectable to receive an initial video signal. The video encoder in communication with the video pre-processor receives a processed video signal and a processor information. A storage medium in communication with the video encoder stores an encoded video signal.

Abstract: A motor control system for a permanent magnet synchronous motor (PMSM) uses two linear Hall devices to produce a first signal indicative of a strength of a first magnetic field component produced by a set of rotor magnets and to simultaneously produce a second signal indicative of a strength of second magnetic field component produced by the rotor magnets that is approximately orthogonal to the first magnetic field component. An angular position and angular velocity of the rotor is calculated based on the first signal and the second signal. A plurality of phase signals is produced based on the calculated angular position and angular velocity. Current in a plurality of field windings of the motor is controlled using the plurality of phase signals.

Abstract: A method for operating a multi-level converter is disclosed. A multi-level converter is provided with a plurality of switches connected in series and a flying capacitor connected to switch nodes of the plurality of switches. The switch nodes are biased initially to a fraction of an input voltage when the input voltage is initially applied to the plurality of switches. The flying capacitor is then precharged to a flying capacitor operating voltage. The multi-level converter is then operated after the flying capacitor is precharged by activating control signals to the plurality of switches. Diversion of precharge current by the plurality of switches may be performed while the flying capacitor is being precharged.