Abstract: A ceramic header configured to form a portion of an electronic device package includes a mounting portion configured to provide a mounting surface for an electronic device. In addition, the ceramic header includes one or more conductive input-output connectors operable to provide electrical connections from a first surface of the ceramic header to a second surface of the ceramic header. The ceramic header also includes one or more thermally polished surfaces.
Abstract: An apparatus to provide overvoltage protection is shown. The apparatus comprises a boost converter (having an output node, a sensing network, and an impedance network) and a zener diode. The zener diode is coupled to the output node and to the sensing network. The breakdown value of the zener diode is selected to be greater than a desired voltage drop across a load when the load is coupled to the output node, and the zener diode creates an overcurrent fault in the boost converter when the voltage at the output node is greater than its breakdown value.
Type:
Application
Filed:
January 27, 2009
Publication date:
July 29, 2010
Applicant:
Texas Instruments Incorporated
Inventors:
Ching-Yao Hung, Rama Venkatraman, Roman Korsunsky, Joseph Gerard Renauer
Abstract: A TAP linking module (21, 51) permits plural TAPs (TAPs 1-4) to be controlled and accessed from a test bus (13) via a single TAP interface (20).
Abstract: A method of tilting a micromirror includes providing a substrate, a sloped electrode outwardly from the substrate, and a sloped electrode positioning system outwardly from the substrate. The method also includes applying, by the sloped electrode positioning system, forces sufficient to position the sloped electrode in an orientation that slopes away from the substrate.
Abstract: A method for fabricating a semiconductor device includes forming a silicided gate utilizing a CMP stack. The CMP stack includes a first liner formed over the underlying semiconductor device and a first dielectric layer formed over the first liner layer. The first dielectric layer is formed to approximately the height of the gate. A second liner layer is formed over the first dielectric layer. Since the first dielectric layer is formed to approximately the height of the gate, the second liner over the moat regions is at approximately the height of the first liner over the gate. A CMP process is performed to expose the first liner over the top of the gate. Since the first dielectric layer is formed to the height of the gate, a portion of the second liner remains over the moat regions after the CMP process. Afterwards, the gate is exposed and a silicidation is performed to create a silicided gate.
Abstract: A process for protecting a MEMS device used in a UV illuminated application from damage due to a photochemical activation between the UV flux and package gas constituents, formed from the out-gassing of various lubricants and passivants put in the device package to prevent sticking of the MEMS device's moving parts. This process coats the exposed surfaces of the MEMS device and package's optical window surfaces with a metal-halide film to eliminate this photochemical activation and therefore significantly extend the reliability and lifetime of the MEMS device.
Type:
Grant
Filed:
April 28, 2004
Date of Patent:
July 27, 2010
Assignee:
Texas Instruments Incorporated
Inventors:
Walter M. Duncan, Simon Joshua Jacobs, Michael R. Douglass, Richard O. Gale
Abstract: A low-cost ceramic package, in land-grid array or ball-grid array configuration, for micromechanical components is fabricated by coating the whole integrated circuits wafer with a protective material, selectively etching the coating for solder ball attachment, singulating the chips, flip-chip assembling a chip onto the opening of a ceramic substrate, under filling the gaps between the solder joints with a polymeric encapsulant, removing the protective material form the components, and attaching a lid to the substrate for sealing the package. It is an aspect of the present invention to be applicable to a variety of different semiconductor micromechanical devices, for instance actuators, motors, sensors, spatial light modulators, and deformable mirror devices. In all applications, the invention achieves technical advantages as well as significant cost reduction and yield increase.
Abstract: The present application is directed a method for preparing a mask pattern database for proximity correction. The method comprises receiving data from a design database. Mask pattern data describing a first photomask pattern for forming first device features is generated. The first photomask pattern is to be corrected for proximity effects in a proximity correction process. A second set of data is accessed comprising information about second device features, wherein at least a portion of the second set of data is relevant to the proximity correction process. The second set of data is manipulated so as to improve the proximity correction process, as compared with the same proximity correction process in which the second set of data was included in the mask pattern database without being manipulated. At least a portion of the mask pattern data and at least a portion of the manipulated second set of data is included in the mask pattern database.
Abstract: A system for use in displaying modulated light includes a light source operable to generate a light beam. The system also includes a color wheel for receiving the light beam. The color wheel comprises a plurality of translucent segments. The plurality of translucent segments comprises a first number of blue segments, the first number of red segments, and a second number of green segments wherein the first number is greater than the second number and the second number is at least one.
Abstract: A video driver includes a current-to-voltage converter circuit that converts an analog input current to a corresponding analog voltage. Active termination circuitry is configured to synthesize an output impedance at an output thereof that substantially matches a load impedance to which the output is coupled, the active termination circuitry buffering the analog voltage to the output.
Type:
Grant
Filed:
December 20, 2006
Date of Patent:
July 27, 2010
Assignee:
Texas Instruments Incorporated
Inventors:
Vijaya B. Rentala, Baher Haroun, Bo Xia
Abstract: In accordance with the teachings of the present disclosure, a system and method for displaying an image are provided. In one embodiment, the method includes receiving a laser through a rotary diffuser. The rotational speed of the rotary diffuser may be continuously varied to reduce the effect of an image artifact in a light pattern. The image artifact may be caused by an imperfection in the rotary diffuser. The light pattern is projected on a display device.
Abstract: A method and semiconductor device for forming a uniformly thin dielectric layer on graphene. A metal or semiconductor layer is deposited on graphene which is located on the surface of a dielectric layer or on the surface of a substrate. The metal or semiconductor layer may act as a nucleation layer for graphene. The metal or semiconductor layer may be subjected to an oxidation process. A thin dielectric layer may then be formed on the graphene layer after the metal or semiconductor layer is oxidized. As a result of synthesizing a metal-oxide layer on graphene, which acts as a nucleation layer for the gate dielectric and buffer to graphene, a uniformly thin dielectric layer may be established on graphene without affecting the underlying characteristics of graphene.
Type:
Application
Filed:
January 22, 2009
Publication date:
July 22, 2010
Applicants:
Board of Regents, The University of Texas System, Texas Instruments, Inc.
Inventors:
Luigi Colombo, Sanjay Banerjee, Seyoung Kim, Emanuel Tutuc
Abstract: A method and apparatus for pictorially representing an algebraic expression. The method includes receiving an algebraic expression, displaying a pictorial representation of the algebraic expression, and determining the correct mathematical answer to the algebraic expression.
Abstract: This invention is a clamp circuit for a video input. The clamp circuit includes: a coupling capacitor; a differential amplifier comparing a video input to predetermined reference voltage; a clamp transistor having a gate connected to the output terminal of the differential amplifier and a source-drain path connected between a power supply voltage and a second terminal; a resistive element connecting the second terminal of the clamp transistor and the coupling capacitor; a first current sink carrying a first predetermined current from the coupling capacitor to ground; and a second current sink carrying a second predetermined current from the second terminal of the said clamp transistor to ground. The resistive element can be a transistor, a resistor, a diode or a switch.
Abstract: A method for actuating an amplifier to generally eliminate a pop is provided. Accordingly, a plurality of current sources is actuated in an input stage, and a plurality of bias voltages are applied to the input stage. After a predetermined period after the step of applying a plurality of bias voltages to the input stage and the step of actuating a plurality of current sources in an input stage, a control circuit is actuated, and a transistor within a control amplifier stage is turned on at a predetermined rate.
Abstract: System and method for creating a time alignment analog notch. An embodiment includes a digital power amplifier coupled to an enable signal line and to a digital control bits bus, and a matching network coupled to the digital power amplifier. The matching network to provide impedance matching and the digital power amplifier to produce a current based on a value on the digital control bits bus. The digital power amplifier comprises a selection circuit and a plurality of transistors. The transistors, controlled by outputs of the selection circuit, provide a current based on the value on the digital control bits bus. The adjustment of a delay between a signal on the enable signal line and the values on the digital control bits bus creates an analog notch at about Fs/2, where Fs is a sampling frequency of a sigma-delta modulator used to modulate data provided to the digital power amplifier.
Abstract: In support of data processing emulation, a data processing condition indicated by a predetermined number of digital data processing signals can be detected by applying the digital data processing signals to a lookup table (LUT) that is programmable according to how the digital data processing signals (23) indicate the data processing condition. The lookup table is responsive to said digital data processing signals for determining whether said data processing condition exists.
Abstract: The present invention relates to an electronic device for analog-to-digital conversion including a sigma-delta modulator (SD), a digital filter (FIL) for digital post processing of the output signal of the sigma-delta modulator (SD), a multiplexer (MUX) for switching the input (INSD) of the sigma-delta modulator between a first input signal (IN1) and a second input signal (IN2), a memory (MEM) adapted to hold the register content of the digital filter relating to the first input signal while the second input signal (IN2) is processed in the digital filter, and a controller (CNTL) to retrieve the register contents from the memory (MEM) when processing of the first input signal (IN1) in the digital filter is resumed.
Abstract: Reducing electromagnetic radiation from semiconductor devices. At least some of the illustrative embodiments are methods comprising driving a Boolean state to a signal pad of a semiconductor device (the driving through a transistor with a first drain-to-source impedance during the driving), and maintaining the Boolean state applied to the signal pad through the transistor with a second drain-to-source impedance, higher than the first drain-to-source impedance.
Type:
Grant
Filed:
May 8, 2008
Date of Patent:
July 20, 2010
Assignee:
Texas Instruments Incorporated
Inventors:
Kevin P. Lavery, Jim D. Childers, Pravin P. Patel
Abstract: A method implemented in a test system comprises a test debug system and a target system, said target system comprising a test access port that functions according to a plurality of states and also comprising an adapter. The method comprises the adapter transferring data to the test debug system while the test access port remains in a predefined state. The predefined state comprises a state in which no scans occur.