Abstract: A method of manufacturing a single-electron transistor device is provided. The method includes forming a thinned region in a silicon substrate, the thinned region offset by a non-selected region. The method also includes forming at least one quantum island from the thinned region by subjecting the thinned region to an annealing process. The non-selected region is aligned with the quantum island and tunnel junctions are formed between the quantum island and the non-selected region. The present invention also includes a single-electron device, and a method of manufacturing an integrated circuit that includes a single-electron device.
Type:
Application
Filed:
November 16, 2009
Publication date:
March 11, 2010
Applicant:
Texas Instruments Incorporated
Inventors:
Christoph Wasshuber, Gabriel George Barna, Olivier Alain Faynot
Abstract: A method for Orthogonal Frequency Division Multiplexing Access (OFDMA) ranging is provided. The method includes receiving a signal having OFDMA symbols. An FFT is performed on this signal. Matching ranging codes are found. The power for a given hypothesized ranging code is determined and compared to a power threshold to determine if the code was transmitted. The timing offset and power are reported as the result of ranging.
Abstract: In a method and system for regulating an output voltage, a linear voltage regulator (LVR) includes an adjustable shunt regulator (ASR) having a limited gain, a feedback circuit (FC), and a compensation resistor (CR). The limited gain causes the output voltage of the ASR to change in response to a change in an input current of the ASR. The FC generates a feedback voltage reference in proportion to the output voltage, the feedback voltage reference being provided to the ASR to control the output voltage. The CR is coupled to the ASR and the FC. The input current flows through the CR to provide a compensating voltage across the CR. The compensating voltage is provided to the feedback circuit to compensate the limited gain, thereby providing the output voltage that is substantially independent of the input current.
Type:
Grant
Filed:
August 8, 2007
Date of Patent:
March 9, 2010
Assignee:
Texas Instruments Incoporated
Inventors:
Ronald Andrew Michallick, Sean Michael Malolepszy, Rex Warren Pirkle
Abstract: An interface unit is provided for selectively testing a plurality of processor/cores. The interface unit includes an interface test access port (TAP) unit operable to receive test commands, and a logic unit coupled to the interface TAP unit and operable to generate control signals based on the received test commands to selectively generate a configuration of TAP units comprised in the plurality of processor/cores to receive test signals.
Abstract: A method, apparatus and system of a self-test output for high density BIST are disclosed. In one embodiment, an integrated circuit includes one or more memories, a BIST controller coupled to the one or more memories to perform write operation and to receive a PASS/FAIL signal from each embedded memory and one or more comparators coupled to the one or more memories latch mutually identical outputted data coming from the memories upon a rising edge of an ORDY signal. In addition, the comparators may compare the latched mutually identical outputted data and output associated PASS/FAIL signal to the BIST controller. The BIST controller registers the received PASS/FAIL result upon receiving the PASS/FAIL signal from the comparators. The integrated circuit may include output registers coupled to the BIST controller and the comparators output a data log substantially serially upon receiving a SHIFT/CLK signal from the BIST controller.
Abstract: A preamplifier circuit for a disk drive system is disclosed. The preamplifier circuit has first and second inputs that sense the voltage on either side of a magnetoresistive (MR) head element, which presents a varying resistance according to the localized magnetic field at a nearby disk surface. The preamplifier circuit includes a programmable input impedance circuit, which presents an impedance in parallel to feedback impedance at each of the first and second inputs. The parallel impedance presented by the programmable input impedance circuit is controlled by controlling a current source in the programmable input impedance circuit; a higher current results in a lower input impedance.
Abstract: Methods and apparatus for proximity detection of hard disk drive read heads are disclosed. A disclosed method comprises forming a first signal having a frequency, a first amplitude, and a first offset voltage, forming a second offset voltage substantially equal to the first offset voltage from the first signal, amplifying the amplitude of the first signal to cause the resonant signal to have a second amplitude greater than the first, and forming a second signal having a frequency indicative of the location of a read head relative to a platter of a hard disk drive.
Abstract: Bandwidth expansion for audio signals by frequency band translations plus adaptive gains to create higher frequencies; use of a common channel for both stereo channels limits computational complexity. Adaptive cut-off frequency determination by power spectrum curve analysis, and bass expansion by both fundamental frequency illusion and equalization.
Type:
Grant
Filed:
February 28, 2006
Date of Patent:
March 9, 2010
Assignee:
Texas Instruments Incorporated
Inventors:
Ryo Tsutsui, Ivan Setiawan, Yoshihide Iwata
Abstract: A novel hybrid stochastic gradient adaptation apparatus and method for calibrating the gain of an RF or non-RF digitally controlled oscillator (DCO). The adaptation algorithm determines a true stochastic gradient between a forcing function and its corresponding system measure to estimate the system parameters being adapted. A momentum term is generated and injected into the adaptation algorithm in order to stabilize the algorithm by adding inertia against any large transient variations in the input data. In the case of adaptation of DCO gain KDCO, the algorithm determines the stochastic gradient between time varying calibration or actual modulation data and the raw phase error accumulated in an all digital phase locked loop (ADPLL). Two filters preprocess the observable data to limit the bandwidth of the computed stochastic gradient providing a trade-off between sensitivity and settling time.
Abstract: A programmable delay is added to the data and clock data paths in order to cancel the effect of the clock insertion delays. This programmable delay is adjusted dynamically at runtime to optimize the performance of the interface.
Abstract: Digital camera color correction with a linear transformation having coefficients computed from an optimization with preservation of gray levels. This preserves white balance despite differing exposures for images from a target sensor and reference colors.
Abstract: A low-impedance output stage which operates from a low voltage power supply. In an embodiment, the output stage contains an operational amplifier and two PMOS transistors used in a feedback configuration resulting in low output impedance. The output stage may also include a capacitor connected between the output terminal of the output stage and the input of the PMOS transistor providing the output, resulting in an overall output impedance which remains low even at higher frequencies, thus enabling use of the output stage to drive capacitive loads without causing resonance.
Abstract: Devices and methods are presented to fabricate diffusion barrier layers on a substrate. Presently, barrier layers comprising a nitride layer and a pure metal layer are formed using a physical vapor deposition (PVD) process that requires multiple ignition steps, and results in nitride-layer thicknesses of no less than 2 nm. This invention discloses devices and process to produce nitride-layers of less than <1 nm, while allowing for formation of a pure metal layer on the nitride-layer without re-igniting the plasma. To achieve this, the flow of nitrogen gas is cut off either before the plasma is ignited, or before the formation of a continuous-flow plasma. This ensures that a limited number of nitrogen atoms is deposited in conjunction with metal atoms on the substrate, thereby allowing for controlled thickness of the nitride layer.
Type:
Grant
Filed:
December 31, 2007
Date of Patent:
March 9, 2010
Assignee:
Texas Instruments Incorporated
Inventors:
Noel M. Russell, Satyavolu Srinivas Papa Rao, Stephan Grunow
Abstract: Graphic equalizer as a cascade of equalization filters with the gain of each individual filter compensated for the gain leakage from other filters. A linear approximation allows individual filter gains to be set to give desired frequency responses.
Abstract: An on-chip decoupling capacitor (106) and method of fabrication. The decoupling capacitor (106) is integrated at the top metal interconnect level (104) and includes surface protection cladding (109) for the copper metal (104b) of the top metal interconnect.
Type:
Grant
Filed:
October 30, 2003
Date of Patent:
March 9, 2010
Assignee:
Texas Instruments Incorporated
Inventors:
Edmund Burke, Satyavolu S. Papa Rao, Timothy A. Rost
Abstract: Low-leakage level-shifters with reduced leakage are disclosed. In one example, a level-shifter circuit to reduce leakage when there is an invalid supply voltage is described, including a level-shifter configured to shift a voltage of an digital input signal based on a first supply voltage to a digital output signal based on a second supply voltage, comprising a first transistor and a second transistor configured to set the digital output signal based on the digital input signal, a supply detector configured to generate a detection signal based on the first supply voltage, a disabler configured to, based on the detection signal, set the digital output signal of the level-shifter to a predetermined state, and a leakage reducer configured to, based on the detection signal, electrically disconnect the first and second transistors from the level-shifter.
Abstract: Disclosed are methods and devices for providing improved semiconductor packages and POP IC assemblies using the improved packages with reduced warping. According to disclosed embodiments of the inventions, a packaged semiconductor device for use in a POP assembly includes an encapsulated region generally defined by the substrate surface. The encapsulant is provided with contact apertures permitting external communication with contacts on the substrate and coupled to an encapsulated chip. Preferred embodiments of the invention are described in which the contact aperture sidewalls are angled within the range of approximately 10-30 degrees or more from vertical and in which the contact aperture is provided a gas release channel to permit gas to escape during reflow.
Type:
Grant
Filed:
September 1, 2005
Date of Patent:
March 9, 2010
Assignee:
Texas Instruments Incorporated
Inventors:
Mark Allen Gerber, Shawn Martin O'Conner
Abstract: The objective of this invention is to provide a solid-state imaging device and drive method with which sampling before the output values from pixels have reached a constant value can be avoided.
Abstract: A transmitter is for use with a cellular communication network and includes a downlink control information (DCI) configuration unit that designates a DCI format for a downlink transmission selected from a first DCI format intended for a single transport block contiguous resource block transmission and a second DCI format intended for a dual transport block transmission available for spatial multiplexing. The transmitter also includes a retransmission coordination unit configured to facilitate a retransmission for the downlink transmission of a transport block corresponding to the first DCI format using the second DCI format or one of the dual transport blocks corresponding to the second DCI format using the first DCI format, based on a retransmission rule.
Type:
Application
Filed:
September 4, 2009
Publication date:
March 4, 2010
Applicant:
Texas Instruments Incorporated
Inventors:
Eko N. Onggosanusi, Runhua Chen, Anand G. Dabak
Abstract: A polyphase electric energy meter comprises a microcontroller with a front end that converts analog current input signals and analog voltage input signals to digital current and voltage samples for processing by the microcontroller. The front end includes separate input channels, each for one of the current input signals with a sigma-delta modulator followed by a decimation filter. The front end further includes a common input channel for all voltage input signals with a multiplexer, an analog-to-digital converter and a de-multiplexer. The separate input channels and the common input channel provide the digital current and voltage samples for processing by the microcontroller.