Patents Assigned to Tokyo Shibaura Denki Kabushiki Kaisha
  • Patent number: 4707615
    Abstract: A high-resolution image sensor uses integrated arrays of photosensitive elements in connection with a lens system which projects, onto the arrays, an erect, unmagnified, unreversed real image of the object being sensed (such as a line of a document). The arrays are staggered in two or more rows so that a single, large integrated array need not be used, yet the entire width of the document line can be covered by photosensitive elements while a 1:1 ratio is maintained between object size and image size. The real image is produced on the two or more rows of arrays by two or more optical systems which have a large depth-of-focus to allow for some variation in object distance. The sensor has a high image quality and is capable of detecting color.
    Type: Grant
    Filed: March 7, 1986
    Date of Patent: November 17, 1987
    Assignee: Tokyo Shibaura Denki Kabushiki Kaisha
    Inventor: Yasuo Hosaka
  • Patent number: 4707815
    Abstract: An unrecorded portion detecting apparatus for a record player. The apparatus has a device such as light-emitting diode for applying light to disc surface and a pair of light-sensitive devices such as phototransistors for sensing light reflected by the disc surface mounted on the tone arm. The pair of light-sensitive devices are separated from each other along a tracing line of the tone arm. The apparatus further has a circuit for producing a detecting signal at the time when the tone arm detects the unrecorded portion, resulting in an output signal from the leading device of the pair of light-sensitive devices. The circuit includes means for uniforming levels of the output signals of the pair of the light-sensitive devices under the same condition, means for differentiating the uniformed signals by a predetermined extent and means for comparing level relationship between the output signals.
    Type: Grant
    Filed: August 25, 1980
    Date of Patent: November 17, 1987
    Assignee: Tokyo Shibaura Denki Kabushiki Kaisha
    Inventor: Hiroshi Yamasaki
  • Patent number: 4703413
    Abstract: A computer system includes a memory appearing to a user to have representative addresses and non-representative address. The data word is accessed in parallel at the representative address and a data bit of the representative address is fetched from a non-representative address of memory. The computer system is implemented by using the lower three bits of the address from the CPU to identify the location of the bit in the word; the address of the word in memory is the upper bits of the address from the CPU.
    Type: Grant
    Filed: September 19, 1985
    Date of Patent: October 27, 1987
    Assignee: Tokyo Shibaura Denki Kabushiki Kaisha
    Inventor: Hiroshi Hashimoto
  • Patent number: 4701053
    Abstract: In a mark position-detecting apparatus, a rectangular reference mark is performed on a workpiece or photomask. The apparatus includes a movable table for supporting the photomask, a stationary light source for radiating light for forming a light spot on the photomask, a photodetector for detecting a change in light component transmitted through the mask, and a computer control section. The table moves forwardly and reversely in a Y-direction so that the photodetector scans two opposite edges of the reference mark in opposite directions in the Y-direction. The table is then moved forwardly and reversely in a X-direction so that the photodetector scans other two opposite mark edges. The signal detector thus produces edge position data representing the four mark edge scanned. The computer control section computes the coordinates of the mark center based on the edge position data.
    Type: Grant
    Filed: December 19, 1983
    Date of Patent: October 20, 1987
    Assignee: Tokyo Shibaura Denki Kabushiki Kaisha
    Inventor: Osamu Ikenaga
  • Patent number: 4700458
    Abstract: A method for manufacturing thin-film transistor comprises steps of sequentially forming in laminar state a gate film, an insulating film and a conductive film having a transparent electrode film and an amorphous silicon film added with an impurity thereto on the top surface of glass substrate or layer; irradiating ultraviolet ray from the bottom surface side of the substrate to expose negative photoresist film on said conductive film and to etch the same; and forming an amorphous semiconductive film on the structure. In this manner, source and drain electrodes are respectively self-aligned with the gate electrode and contacted therewith through a semiconductive film and a low resistive and semiconductor film.
    Type: Grant
    Filed: September 24, 1985
    Date of Patent: October 20, 1987
    Assignee: Tokyo Shibaura Denki Kabushiki Kaisha
    Inventors: Kouji Suzuki, Mitsushi Ikeda, Toshio Aoki
  • Patent number: 4701665
    Abstract: In the shadow mask of a color cathode-ray tube, the array direction of in-line electron guns is parallel with the horizontal axis, and the radius of curvature along the horizontal axis of the plate portion of the shadow mask is so set as to be greater than that along the vertical axis thereof. The horizontal pitch of the apertures formed in the plate portion of the shadow mask is increased from the center region of the plate portion toward the periphery of the plate portion along the vertical axis.
    Type: Grant
    Filed: March 7, 1986
    Date of Patent: October 20, 1987
    Assignee: Tokyo Shibaura Denki Kabushiki Kaisha
    Inventor: Yoshio Suzuki
  • Patent number: 4698659
    Abstract: An MOS transistor of second conductivity type is provided which is formed in a semiconductor substrate of first conductivity type and includes a first source region of second conductivity type, a first drain region of second conductivity type, and a gate electrode provided on a gate insulation layer. Further, an MOS transistor of first conductivity type is provided which is stacked on the MOS transistor of second conductivity type and includes a second source region, a second drain region and the gate electrode. The first and second source regions are connected to each other through a conductive layer which is selected from a given metal layer and a given metal silicide layer.
    Type: Grant
    Filed: May 16, 1986
    Date of Patent: October 6, 1987
    Assignee: Tokyo Shibaura Denki Kabushiki Kaisha
    Inventor: Yoshihisa Mizutani
  • Patent number: 4697252
    Abstract: A dynamic type semiconductor memory device is disclosed, which comprises an n-type semiconductor layer, at least one memory cell having a capacitor for storing charges of an amount corresponding to a logic value and a first transistor having source and drain regions formed in the surface area of the p-type semiconductor layer and for transferring charges to and from the capacitor, a first drive circuit for applying a voltage to the gate of the first transistor through a word line, a second drive circuit for selectively applying a voltage of one of first and second levels through a bit line and the first transistor to the capacitor, and a bias circuit for applying a voltage to the substrate. The first transistor of the memory device is a p-channel transistor formed in the n-type semiconductor layer which is formed in the surface area of a p-type semiconductor layer. The bias circuit includes a charge pump section for setting the potential of the substrate at a third level lower than the first voltage.
    Type: Grant
    Filed: March 9, 1984
    Date of Patent: September 29, 1987
    Assignee: Tokyo Shibaura Denki Kabushiki Kaisha
    Inventors: Tohru Furuyama, Yukimasa Uchida
  • Patent number: 4696041
    Abstract: An utterance boundary detecting apparatus of this invention includes an acoustic processor for generating speech parameter time sequence data according to an input speech signal. The speech parameter time sequence data generated from the acoustic processor is delivered to a buffer memory and noise level determining circuit. The noise level determining circuit calculates the average value of speech parameter values of a background noise corresponding to a silent period when a speech signal is input as words uttered. The apparatus includes a threshold value calculating circuit for calculating an utterance boundary detection threshold value on the basis of an average value calculated by the noise level determining circuit. An utterance boundary detecting circuit generates utterance boundary data on the basis of the threshold value from the threshold value calculating circuit and speech parameter time sequence data in a buffer memory.
    Type: Grant
    Filed: January 30, 1984
    Date of Patent: September 22, 1987
    Assignee: Tokyo Shibaura Denki Kabushiki Kaisha
    Inventor: Tomio Sakata
  • Patent number: 4695989
    Abstract: An optical disc apparatus is disclosed, which comprises an optical head for obtaining an information signal from an optical disc through photoelectric conversion and an accessing section for moving the optical head to a position corresponding to a desired track of the optical disc. When the optical optical head is moved in a radial direction of the optical disc, the signal obtained therefrom is binarized by a binarization coder to obtain a binary pulse signal. Noise components contained in the binary pulse signal that are introduced from scars or scratches of the optical disc or dust particles attached thereto are removed from the binary pulse signal. Signal components corresponding to the innermost track of the optical disc are detected as a signal representing a reference position of the optical disc. A correction scale value is obtained from the difference between the reference position and an initial position of a scale of a position detector.
    Type: Grant
    Filed: September 29, 1986
    Date of Patent: September 22, 1987
    Assignee: Tokyo Shibaura Denki Kabushiki Kaisha
    Inventor: Katsumi Kimoto
  • Patent number: 4695858
    Abstract: A duplex optical communication module unit is disclosed, which comprises a ceramic substrate and first and second metal shells having respective transparent window members and hermetically bonded to the ceramic substrate so as to define a first and second space, respectively. A light-emitting element is assembled in the first space, and a light-emitting element and a circuit element for amplifying the photocurrent from the light-emitting element are assembled in the second space. Metallization layers are formed on the ceramic substrate over a substantial area thereof, light-receiving and light-transmitting sections being shielded by the metallization layers and metal shells.
    Type: Grant
    Filed: July 15, 1983
    Date of Patent: September 22, 1987
    Assignee: Tokyo Shibaura Denki Kabushiki Kaisha
    Inventors: Hatsuo Takezawa, Kenichi Donuma, Shuhei Katagiri, Shigeyuki Sakura
  • Patent number: 4695871
    Abstract: A light-triggered semiconductor device comprising a light-triggered semiconductor chip housed in an airtight package and a light guide connected to a light-sensitive area of the semiconductor chip, wherein that end face of the light guide which faces the semiconductor chip is chosen to have a larger diameter than the light-sensitive area formed on the main surface of the semiconductor chip, and is connected to the light-sensitive area through an elastic transparent material preliminarily fixed to the light-sensitive area.
    Type: Grant
    Filed: August 26, 1983
    Date of Patent: September 22, 1987
    Assignee: Tokyo Shibaura Denki Kabushiki Kaisha
    Inventors: Yoshiaki Tsunoda, Hideo Matsuda
  • Patent number: 4694963
    Abstract: An apparatus for sorting sheets is disclosed, which comprises a feeder for setting a mixture of different kinds of sheets, the set sheets being fed one by one for sorting, a judging circuit for judging the kind of sheets being transported through the body after having been fed from the feeder, and a stacking section for stacking sorted bills according to the results of the judging circuit. The stacking section includes an upper stacker, a lower stacker, and a reject stacker, sheets of a specified kind being stacked in the upper stacker, sheets incapable of being judged being stacked in the reject stacker, and the other sheets being stacked in the lower stacker.
    Type: Grant
    Filed: July 14, 1986
    Date of Patent: September 22, 1987
    Assignee: Tokyo Shibaura Denki Kabushiki Kaisha
    Inventor: Sumiyoshi Takesako
  • Patent number: 4692785
    Abstract: An integrated circuit device for writing and reading information comprising an array of plural non-volatile memory elements of insulated-gate field effect type formed on a semiconductor substrate of one conductivity type; plural sets of two complementary insulated-gate type field effect transistors of P-channel type and N-channel type formed on the substrate, which transistors constitute a control circuit for the memory elements; and a latch-up suppressant, comprising a long and narrow semiconductor region of the one conductivity type which has an impurity concentration higher than that of the substrate and is formed between the array and the control circuit in a surface region of the substrate, with a predetermined voltage applied directly to the semiconductor region.
    Type: Grant
    Filed: May 13, 1981
    Date of Patent: September 8, 1987
    Assignee: Tokyo Shibaura Denki Kabushiki Kaisha
    Inventor: Masashi Wada
  • Patent number: 4692090
    Abstract: A multistage hydraulic machine includes a water chamber in a bottom ring of the highest-pressure stage. The water chamber supplies cooling water to seal gaps between rotary and stationary elements through a communication passage connected to the water chamber.
    Type: Grant
    Filed: August 8, 1986
    Date of Patent: September 8, 1987
    Assignee: Tokyo Shibaura Denki Kabushiki Kaisha
    Inventor: Shigekatsu Naka
  • Patent number: 4690268
    Abstract: A sheet convey apparatus which conveys a mixture of obverse and reverse-sheets set at an inlet port to a collecting section, comprises a first convey path for conveying obverse-presented bills which are distinguished from reverse-presented bills by a sorting convey path, and a second convey path disposed parallel to the first convey path, for conveying reverse-presented bills which are to be reversed.
    Type: Grant
    Filed: May 16, 1986
    Date of Patent: September 1, 1987
    Assignee: Tokyo Shibaura Denki Kabushiki Kaisha
    Inventor: Akito Ueshin
  • Patent number: 4688578
    Abstract: A probe has a step portion between its upper and lower lateral faces. A water bag has a container portion for containing water therein, and an engaging portion which is integrally formed with the container portion and which has a greater wall thickness than that of the container portion. The engaging portion is put on the upper lateral faces of the probe, with its sealing portion being pressed against the step portion. The press portion of a fitting member is caused to engage with the step portion, with the sealing portion therebetween. In this state, a clamp member clamps the fitting member, so that the sealing portion is held under pressure between the press portion and the step portion. Thus, the sealing portion is pressed against the step portion, and water poured into the water bag through a tube is contained therein in a liquid-tight manner. The probe and the object to be examined are acoustically coupled by means of the water.
    Type: Grant
    Filed: March 16, 1984
    Date of Patent: August 25, 1987
    Assignee: Tokyo Shibaura Denki Kabushiki Kaisha
    Inventors: Masayuki Takano, Kazuhumi Ishiyama
  • Patent number: 4688065
    Abstract: A MOS type semiconductor device with a gate protecting circuit for protecting an internal circuit is disclosed. Distance between the input section diffusion layer in the gate protecting circuit and the diffusion layers in the internal circuit is selected at such values that minority carriers derived from the diffusion layer in the internal circuit are prevented from reaching a depletion layer in the gate protecting circuit which is caused by the impression thereto of a surge voltage, and are also selected to at least ten times a predetermined minimum distance each separating the adjacent diffusion layers of those.
    Type: Grant
    Filed: September 4, 1986
    Date of Patent: August 18, 1987
    Assignee: Tokyo Shibaura Denki Kabushiki Kaisha
    Inventors: Hiroyuki Kinoshita, Michihiro Ono
  • Patent number: 4688032
    Abstract: Document image data stored in an image memory with a large memory capacity capable of storing larger data than the number of picture elements of a display unit is accessed and read out by using a mapping memory which stores the address data to specify the memory locations of picture element data groups in the image memory. The document image data read out are edited, and then are seen as document images by the display unit.
    Type: Grant
    Filed: June 24, 1986
    Date of Patent: August 18, 1987
    Assignee: Tokyo Shibaura Denki Kabushiki Kaisha
    Inventors: Mitsuo Saito, Takeshi Aikawa, Akio Mori
  • Patent number: RE32492
    Abstract: According to the invention, a photosensor array having a plurality of photosensors are formed in horizontal and vertical rows on a semiconductor substrate. Vertical charge transfer electrodes are provided along the vertical rows of photosensors for transferring the charges generated in the photosensors along the vertical direction. Charge mixing means are provided, within the substrate, for mixing the charges generated by the photosensors in successive two horizontal rows of photosensors.
    Type: Grant
    Filed: June 26, 1986
    Date of Patent: September 1, 1987
    Assignee: Tokyo Shibaura Denki Kabushiki Kaisha
    Inventor: Yasuo Takemura