Patents Assigned to TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
  • Publication number: 20230097227
    Abstract: A semiconductor device includes: a semiconductor chip having a bottom surface having a first area and a first side surface; and an electrode provided below the semiconductor chip, the electrode having a first top surface and a second side surface, and the electrode containing an electrically conductive material, wherein the first top surface has a second area larger than the first area, and at least a part of the first top surface is in contact with the bottom surface.
    Type: Application
    Filed: March 9, 2022
    Publication date: March 30, 2023
    Applicants: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventors: Kentaro MORI, Kazushiro NOMURA, Kenichi OHASHI, Soichi YAMASHITA, Aya MURAYOSHI
  • Patent number: 11615981
    Abstract: According to one embodiment, an isolator includes first and second conductive members, and first second, and third insulating members. The first conductive member includes first, second, and third partial regions. The third partial region is between the first and second partial regions. The second conductive member is electrically connected to the first conductive member. The second conductive member includes fourth and fifth partial regions. The fourth partial region is between the third and fifth partial regions. The first insulating member includes first and second insulating regions. The fifth partial region is between the first and second insulating regions. The second insulating member includes third and fourth insulating regions. The fourth partial region is between the third and fourth insulating regions. The third insulating member includes first and second portions.
    Type: Grant
    Filed: March 4, 2021
    Date of Patent: March 28, 2023
    Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventors: Tatsuhiro Oda, Tatsuya Ohguro
  • Patent number: 11615811
    Abstract: A seek operation of a first actuator in a multi-actuator drive is modified, so that one or more disturbance-generating portions of the seek operation do not adversely affect operation of a second actuator in the drive. Radial motion of the aggressor actuator is controlled by limiting a slew rate of the first actuator during one or more portions of the seek operation to be less than or equal to a threshold value. Because slew rate of the first actuator is the rate of change of radial acceleration of the aggressor actuator with respect to time, limiting the slew rate of the first actuator prevents or reduces mechanical disturbances caused by jerk associated with motion of the first actuator.
    Type: Grant
    Filed: August 27, 2021
    Date of Patent: March 28, 2023
    Assignees: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage Corporation
    Inventors: Siri S. Weerasooriya, Richard M. Ehrlich, Thorsten Schmidt
  • Patent number: 11616908
    Abstract: An image processing apparatus according to an embodiment includes a preprocessing circuit and a distortion correction circuit configured to process, in a time division manner, a plurality of images generated by a plurality of image pickup units and an output buffer circuit configured to buffer the processed plurality of images in a unit of a block and add an identification tag including an address and an identification ID to the block.
    Type: Grant
    Filed: March 12, 2021
    Date of Patent: March 28, 2023
    Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventors: Ryuji Hada, Atsushi Masuda
  • Patent number: 11616461
    Abstract: A motor control device according to an embodiment comprises a first signal generator, a second signal generator, a main controller, and a driver. The first signal generator is configured to generate, based on a clock signal indicating a stepping drive cycle of a motor, a first control signal. The second signal generator is configured to generate, based on a command phase indicating a target phase of a rotor of the motor, a second control signal. The main controller is configured to control the first signal generator and the second signal generator to output at least one of the first control signal and the second control signal. The driver is configured to drive the motor based on at least one of the first control signal and the second control signal.
    Type: Grant
    Filed: September 14, 2021
    Date of Patent: March 28, 2023
    Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventors: Hiroshi Ota, Hirofumi Omote
  • Patent number: 11616024
    Abstract: A semiconductor device includes a metal plate; a sidewall member surrounding a periphery of a space above the metal plate; a circuit board provided on the metal plate; a semiconductor chip provided on the circuit board; a first wire connecting the semiconductor chip and an interconnect part of the circuit board; a first resin member covering a bonding portion between the semiconductor chip and the first wire; and a second resin member provided in the space, the second resin member covering an upper surface of the metal plate, the circuit board, the first resin member, and the first wire. A Young's modulus of the first resin member is greater than a Young's modulus of the second resin member. A volume of the second resin member is greater than a volume of the first resin member.
    Type: Grant
    Filed: August 7, 2020
    Date of Patent: March 28, 2023
    Assignees: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage Corporation
    Inventor: Noritoshi Shibata
  • Patent number: 11616494
    Abstract: First and second switches are connected in series between first and second terminals. A third switch is provided between a first node between the first terminal and the first switch, and a first resistive-element. A fourth switch is provided between a second node between the first and second switches, and the reference power-source. A controller switches the first to fourth switches between conduction and non-conduction states. First, third, fifth, and seventh delay-circuits are provided between the first to fourth switches and the controller and delay first, second, third, fourth control signals for switching the first to fourth switches from a conduction state to a non-conduction state, respectively. Second, fourth, sixth, and eighth delay-circuits are provided between the first to fourth switches and the controller and delay the first, second, third, fourth control signals for switching the first to fourth switches to a non-conduction state to a conduction state, respectively.
    Type: Grant
    Filed: February 2, 2022
    Date of Patent: March 28, 2023
    Assignees: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage Corporation
    Inventors: Satoshi Katou, Hideo Arimoto
  • Patent number: 11615808
    Abstract: According to one embodiment, a magnetic head includes first and second magnetic poles, and a stacked body provided between the first and second magnetic poles. The stacked body includes a first magnetic layer, a second magnetic layer provided between the second magnetic pole and the first magnetic layer, a third magnetic layer provided between the second magnetic pole and the second magnetic layer, a first non-magnetic layer provided between the first magnetic layer and the first magnetic pole, a second non-magnetic layer provided between the second and first magnetic layers, a third non-magnetic layer provided between the third and second magnetic layers, and a fourth non-magnetic layer provided between the second magnetic pole and the third magnetic layer. A thickness of the first magnetic layer is thicker than a thickness of the second magnetic layer. A thickness of the third magnetic layer is thicker than the second layer thickness.
    Type: Grant
    Filed: August 9, 2021
    Date of Patent: March 28, 2023
    Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventors: Yuji Nakagawa, Naoyuki Narita, Masayuki Takagishi, Tomoyuki Maeda, Tazumi Nagasawa, Hirofumi Suto
  • Patent number: 11615226
    Abstract: A recording medium includes simulation data input into a computing device executing a simulation of a semiconductor device, wherein the simulation data includes part shape information describing a shape of a part included in a simulation target circuit, model information describing operation and connection information of the simulation target circuit, and symbol information of the part included in the simulation target circuit, and the computing device causes the part shape information, the model information, and the symbol information to correspond to each other to execute the simulation of the semiconductor device.
    Type: Grant
    Filed: September 11, 2020
    Date of Patent: March 28, 2023
    Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventors: Hitoshi Imi, Motochika Okano, Yoshinori Fukuba
  • Publication number: 20230091325
    Abstract: A semiconductor device includes a silicon substrate, a first layer, a second layer, a barrier metal, and a gate pad. The first layer is formed of an oxide film provided on an upper surface of the silicon substrate. The second layer is a layer at least selectively having a projecting and recessed part on an upper surface of the first layer, the projecting and recessed part having a projection and recess deeper than a projection and recess occurring when the layer is formed in a planar shape. The barrier metal is formed on an upper surface of the second layer according to a shape of the projecting and recessed part. The gate pad is in close contact with the silicon substrate via the barrier metal.
    Type: Application
    Filed: March 11, 2022
    Publication date: March 23, 2023
    Applicants: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventors: Emiko INOUE, Yukie NISHIKAWA
  • Publication number: 20230091854
    Abstract: A semiconductor device comprising a DC-DC converter including a primary-side circuit and a secondary-side circuit including a first semiconductor package accommodating a first semiconductor element group including a first semiconductor element and a second semiconductor element. The first semiconductor element and the second semiconductor element are stacked. The first semiconductor element group is a MOSFET, an IGBT, or a diode.
    Type: Application
    Filed: March 3, 2022
    Publication date: March 23, 2023
    Applicants: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventor: Hiroshi YAMAMOTO
  • Publication number: 20230086132
    Abstract: According to one embodiment, electronic circuitry includes: a detection circuit including a diode, a cathode side of the diode being connected to one end of a semiconductor switching element and an anode side of the diode being connected to a first node; a comparator circuit configured to compare a voltage of the first node and a threshold voltage and generate a first signal; a first filter connected between the first node and another end of the semiconductor switching element and configured to suppress the voltage of the first node in a first period based on a control signal indicating turn-on of the semiconductor switching element; and a control circuit configured to determine at least one of the threshold voltage and the first period based on the first signal.
    Type: Application
    Filed: March 4, 2022
    Publication date: March 23, 2023
    Applicants: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventor: Koutaro MIYAZAKI
  • Publication number: 20230092121
    Abstract: According to one embodiment, a semiconductor device includes a lead frame, a semiconductor chip, and a clip member. The semiconductor chip is mounted on the lead frame. The clip member is connected to an electrode of the semiconductor chip via a conductive adhesive agent. At least part of an outer peripheral edge of a connection face of the clip member is located at a position more inside than an outermost peripheral edge of the clip member in plan view.
    Type: Application
    Filed: August 30, 2022
    Publication date: March 23, 2023
    Applicants: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventors: Kakeru YAMAGUCHI, Tetsuya YAMAMOTO
  • Publication number: 20230089737
    Abstract: According to one embodiment, a semiconductor device includes: a substrate that has a first surface extending in a first direction and a second direction; a first metal oxide semiconductor field effect transistor (MOSFET) that is provided on the first surface of the substrate; a support base that is provided above the first surface of the substrate and extends in a third direction intersecting the first direction and the second direction; a light receiving element that is in contact with a second surface of the support base facing the first direction; and a light emitting element that is in contact with a third surface of the light receiving element facing the first direction.
    Type: Application
    Filed: February 17, 2022
    Publication date: March 23, 2023
    Applicants: KABUSHIKI KAISHA TOSHIBA, Toshiba Electronic Devices & Storage Corporation
    Inventors: Jia LIU, Masahiko HORI
  • Publication number: 20230090527
    Abstract: A semiconductor device includes a semiconductor part, first to fourth electrodes, first and second insulating films. The semiconductor part includes a first layer of a first conductivity type and a second layer of a second conductivity type. The first and second electrodes are provided on back and front surfaces of the semiconductor part, respectively. The second layer is provided between the first layer and the second electrode. A plurality of the third electrodes extend into the first layer through the second layer. The fourth electrode extends into the first layer from the front side of the semiconductor part and surrounds the second layer. The first insulating film electrically insulates the third electrode from the semiconductor part. The second insulating film electrically insulates the fourth electrode from the semiconductor part. The second insulating film has a first thickness greater than a second thickness of the first insulating film.
    Type: Application
    Filed: May 25, 2022
    Publication date: March 23, 2023
    Applicants: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventors: Takuo KIKUCHI, Tatsuya NISHIWAKI
  • Publication number: 20230088828
    Abstract: According to one embodiment, a semiconductor device includes: a substrate; a first MOSFET and a second MOSFET that are provided on a first surface of the substrate and have sources commonly coupled; a third MOSFET and a fourth. MOSFET that are provided on the first surface of the substrate and have sources commonly coupled; a light receiver that is provided on the first surface of the substrate and is coupled to the first MOSFET, the second MOSFET, the third MOSFET, and the fourth MOSFET; and a light emitter that is provided on the light receiver.
    Type: Application
    Filed: March 4, 2022
    Publication date: March 23, 2023
    Applicants: KABUSHIKI KAISHA TOSHIBA, Toshiba Electronic Devices & Storage Corporation
    Inventors: Jia LIU, Masahiko HORI
  • Publication number: 20230088579
    Abstract: A semiconductor device includes a semiconductor part, first to fourth electrodes, and insulating films. The semiconductor part is provided between the first and second electrodes. The third and fourth electrodes extend into the semiconductor part from a frond side thereof. The third electrodes are surrounded by the fourth electrode. The insulating films are provided between the semiconductor part and the third electrodes, respectively. The fourth electrode includes first to third portions. The first to third portions extend in first to third directions, respectively, along a back surface of the semiconductor part. The third portion links the first and second portions. The second direction is orthogonal to the first direction. The third direction crosses the first and second directions. The third electrodes are arranged to have a minimum spacing of two adjacent insulating films between two third electrodes adjacent to each other respectively in the first and third directions.
    Type: Application
    Filed: May 25, 2022
    Publication date: March 23, 2023
    Applicants: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventors: Takuo KIKUCHI, Tatsuya NISHIWAKI
  • Publication number: 20230089603
    Abstract: This semiconductor device includes: a bed including a first upper surface having a plurality of first grooves and a first lower surface; a first bonding material provided on the first upper surface and in contact with the first grooves; a semiconductor chip including a second upper surface having a first electrode and a second electrode, and a second lower surface, the semiconductor chip being provided on the first bonding material and having the second lower surface connected to the first bonding material; a second bonding material provided on the first electrode and connected to the first electrode; and a first connector having a first end having a plurality of second grooves and connected to the second bonding material, and a second end.
    Type: Application
    Filed: March 7, 2022
    Publication date: March 23, 2023
    Applicants: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventor: Daisuke Koike
  • Publication number: 20230093365
    Abstract: A semiconductor manufacturing apparatus includes: a first storage container storing a first raw material and having a first container outlet; a reaction chamber; a first flow rate controller adjusting a flow rate of the first raw material transported from the first container outlet of the first storage container to the reaction chamber and having a first inlet and a first outlet; a first pipe connecting the first container outlet of the first storage container and the first inlet of the first flow rate controller to each other and having a first connection portion; a second pipe connecting the first outlet of the first flow rate controller and the reaction chamber to each other and having a second connection portion having a first flow path switching valve; a third pipe connected to the first pipe at the first connection portion and connected to the second pipe at the second connection portion; a first pump having a first intake port connected to a portion of the third pipe connected to the second connection
    Type: Application
    Filed: March 2, 2022
    Publication date: March 23, 2023
    Applicants: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventor: Atsuro INADA
  • Publication number: 20230091870
    Abstract: A semiconductor device includes a first electrode, a second electrode, a semiconductor part located between the first electrode and the second electrode, a third electrode located in the semiconductor part, an insulating film located between the third electrode and the semiconductor part, an insulating member located in the semiconductor part at a position separated from the insulating film, a fourth electrode located in the insulating member, and a compressive stress member located in the fourth electrode. The compressive stress member has compressive stress along a first direction. The first direction is from the first electrode toward the second electrode.
    Type: Application
    Filed: June 7, 2022
    Publication date: March 23, 2023
    Applicants: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventors: Satoshi AKUTSU, Takuo KIKUCHI, Kazuyuki ITO, Nobuhide YAMADA