Patents Assigned to TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
  • Patent number: 11694900
    Abstract: A semiconductor device includes an n-type semiconductor layer; a first metal layer provided on the n-type semiconductor layer, the first metal layer including first atoms capable of being n-type impurities in the n-type semiconductor layer; a second metal layer provided on the first metal layer, the second metal layer including titanium atoms; a third metal layer provided on the second metal layer; and a second atom capable of being a p-type impurity in the n-type semiconductor layer. The second atom and a part of the titanium atoms are included in a vicinity of an interface between the first metal layer and the second metal layer.
    Type: Grant
    Filed: September 29, 2021
    Date of Patent: July 4, 2023
    Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventors: Toshiyuki Nishikawa, Kazuhiko Komatsu, Shinji Nunotani, Yoshiyuki Harada, Hideto Sugawara
  • Patent number: 11695404
    Abstract: According to one embodiment, a semiconductor device includes a first circuit, a first terminal, a second terminal, a conductor and a first switch element serially coupled between the first terminal and the second terminal, wherein the first circuit is configured to turn the first switch element to an OFF state when a first condition is satisfied, and the conductor is configured to physically break when a second condition is satisfied.
    Type: Grant
    Filed: September 14, 2021
    Date of Patent: July 4, 2023
    Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventors: Kentaro Arai, Toshifumi Ishimori, Yutaka Yadoumaru, Masayoshi Takahashi
  • Patent number: 11695392
    Abstract: According to an embodiment, a high frequency integrated circuit includes a signal splitter, an attenuator, a first conductive element, and first to eighth switches. The signal splitter receives a high frequency signal at an input terminal, splits the high frequency signal to two lines, and outputs the signals split into the two lines from a first output terminal and a second output terminal. The attenuator has multiple amounts of attenuation values. In the first conductive element, a first amount of attenuation is set. The high frequency integrated circuit outputs a plurality of output signals having different gain values from the first high frequency output terminal and the second high frequency output terminal, respectively.
    Type: Grant
    Filed: August 27, 2021
    Date of Patent: July 4, 2023
    Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventors: Yuki Kamijyo, Hironori Nagasawa
  • Patent number: 11693100
    Abstract: A light detector according to an embodiment includes a light receiver and a controller. The controller is configured to set first and second light-receiving regions. The first light-receiving region includes first and second pixel regions. The second light-receiving region includes a third pixel region. An area of the third pixel region is larger than a total area of the first and second pixel regions. The light receiver is configured to, when light is applied: cause each of the first and second pixel regions within the first light-receiving region to individually output a signal; and cause the third pixel region within the second light-receiving region to output signals collectively.
    Type: Grant
    Filed: September 10, 2020
    Date of Patent: July 4, 2023
    Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventors: Hiroshi Kubota, Nobu Matsumoto
  • Patent number: 11695391
    Abstract: According to one embodiment, in a biquad filter, an output terminal of a first integrator is connected to an input terminal in a negative pole side of a second integrator, an output terminal of the first integrator is connected to a first input terminal in a negative pole side of an adder through the inversion amplifier, an output terminal of the second integrator is connected to a second input terminal in the negative pole side of the adder, an input terminal to which an input signal is input is connected to a third input terminal in the negative side of the adder, and an output terminal of the adder is connected to an input terminal in a negative pole side of the first integrator.
    Type: Grant
    Filed: September 3, 2021
    Date of Patent: July 4, 2023
    Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventor: Makoto Morita
  • Patent number: 11693114
    Abstract: A distance measuring device according to one embodiment includes a light emitter, a first light receiver, and a second light receiver. The light emitter includes a light source. The light source emits an optical signal. The first light receiver includes a first sensor and a first optical system. The first sensor includes first pixels. The first optical system is configured to guide a reflected light of the optical signal emitted from the light emitter to the first sensor. The second light receiver includes a second sensor and a second optical system. The second sensor includes second pixels. The second optical system is configured to guide the reflected light to the second sensor.
    Type: Grant
    Filed: March 12, 2021
    Date of Patent: July 4, 2023
    Assignees: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage Corporation
    Inventors: Hiroshi Kubota, Nobu Matsumoto
  • Patent number: 11694720
    Abstract: According to one embodiment, a magnetic disk device includes a disk including a zone servo boundary area including a first area of a first servo frequency, a second area of a second servo frequency, and a third area of the first servo frequency, in a servo area, a head, and a controller demodulating first servo data of the first area to derive a position of the head and demodulating first corrected data of the third area to correct the position of the head. The first area, the second area, and the third area are aligned in order in a traveling direction. The first area and the second area are adjacent to each other in a circumferential direction of the disk. The second area and the third area are adjacent to each other in the circumferential direction.
    Type: Grant
    Filed: August 10, 2022
    Date of Patent: July 4, 2023
    Assignees: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage Corporation
    Inventors: Naoki Tagami, Takeyori Hara
  • Patent number: 11688765
    Abstract: According to one embodiment, a semiconductor device includes first and second electrodes, first to fifth semiconductor regions, and a gate electrode. The first semiconductor region is provided on the first electrode, and electrically connected to the first electrode. The second semiconductor region is provided on a part of the first semiconductor region. The third semiconductor region is provided on another part of the first semiconductor region. The third semiconductor region includes first and second regions. The fourth semiconductor region is provided on the second semiconductor region. The fifth semiconductor region is provided on a part of the fourth semiconductor region. The gate electrode faces the fourth semiconductor region with a gate insulating layer interposed between the gate electrode and the fourth semiconductor region. The second electrode is provided on the fourth and fifth semiconductor regions. The second electrode is electrically connected to the fourth and fifth semiconductor regions.
    Type: Grant
    Filed: March 11, 2021
    Date of Patent: June 27, 2023
    Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventor: Yuhki Fujino
  • Patent number: 11688711
    Abstract: A semiconductor device includes a first lead portion and a second lead portion spaced from each other in a first direction. A semiconductor chip is mounted to the first lead portion. A first connector has a first portion contacting a second electrode on the chip and a second portion connected to the second lead portion. A second connector has third portion that contacts the second electrode, but at a position further away than the first portion, and a fourth portion connected to the second portion. At least a part of the second connector overlaps a part of the first connector between the first lead portion and the second lead portion.
    Type: Grant
    Filed: November 1, 2021
    Date of Patent: June 27, 2023
    Assignees: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage Corporation
    Inventor: Yoshiharu Takada
  • Patent number: 11686748
    Abstract: According to an embodiment, a current detecting circuit includes: a normally-OFF type second switching element that is cascode-connected to a normally-ON type first switching element that includes a drain for outputting an output current; a normally-OFF type third switching element that is connected in parallel to the second switching element and whose drain is connected to a variable current source; and a comparison circuit that outputs a detection signal in accordance with a comparison result between a drain voltage of the second switching element and a drain voltage of the third switching element.
    Type: Grant
    Filed: August 2, 2021
    Date of Patent: June 27, 2023
    Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventor: Hideaki Majima
  • Patent number: 11688423
    Abstract: In a multi-actuator drive, the effect of moving a first actuator (the so-called “aggressor actuator”) in on a second actuator (the so-called “victim actuator”) is reduced or compensated for. A victim feedforward signal is added to a microactuator control signal of the victim actuator in response to a voice-coil motor (VCM) control signal that is applied to the aggressor actuator. The feedforward signal is configured to compensate for disturbances to the victim microactuator caused by VCM commands provided to the aggressor actuator. The feedforward signal is based on a transfer function that models commands added to the victim microactuator, which is coupled to the head of the victim actuator, as a function of the aggressor VCM control signal applied to the aggressor actuator.
    Type: Grant
    Filed: December 20, 2021
    Date of Patent: June 27, 2023
    Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventors: Gary W. Calfee, Richard M. Ehrlich, Thorsten Schmidt, Gabor Szita
  • Patent number: 11688803
    Abstract: A semiconductor device includes first and second electrodes; a semiconductor part between the first and second electrodes; a control electrode and a third electrode in a trench between the semiconductor part and the second electrode. The device further includes a first insulating part insulating the control electrode from the semiconductor part; a second insulating part insulating the third electrode from the semiconductor part; and a third insulating part insulating the third electrode from the control electrode. The second insulating part includes first and second insulating films and a portion of a third insulating film. The first insulating film is provided between the semiconductor part and the third electrode. The second insulating film is provided between the first insulating film and the third electrode. The third insulating film includes the portion between the first insulating film and the second insulating film, and another portion inside the third insulating part.
    Type: Grant
    Filed: September 3, 2020
    Date of Patent: June 27, 2023
    Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventors: Kouta Tomita, Hiroaki Katou
  • Patent number: 11688823
    Abstract: A photocoupler of an embodiment includes an input terminal, an output terminal, a first MOSFET, a second MOSFET, a semiconductor light receiving element, a semiconductor light emitting element, and a resin layer. The first MOSFET is joined onto the third lead. The second MOSFET is joined onto the fourth lead. The semiconductor light receiving element is joined to each of the first junction region and the second junction region. The semiconductor light receiving element includes a light receiving region provided in a central part of a surface on opposite side from a surface joined to the first and second MOSFET. The resin layer seals the first and second MOSFETs, the semiconductor light receiving element, the semiconductor light emitting element, an upper surface and a side surface of the input terminal, and an upper surface and a side surface of the output terminal.
    Type: Grant
    Filed: September 6, 2019
    Date of Patent: June 27, 2023
    Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventors: Mami Fujihara, Yoshio Noguchi, Naoya Takai
  • Patent number: 11689195
    Abstract: In general, according to one embodiment, a semiconductor device includes a first terminal, a second terminal and a first circuit. The first circuit includes a first switching element, a second switching element and a first resistor. The gate of the first switching element is coupled between the first node and the second terminal. The first resistor and the second switching element are coupled in series between the first node and the second terminal. The first circuit is configured to change the first switching element and the second switching element from an off state to an on state when supply of the first voltage to the first node is stopped.
    Type: Grant
    Filed: February 22, 2022
    Date of Patent: June 27, 2023
    Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventors: Naoya Yonehara, Shuji Toda, Masatoshi Watanabe, Takaaki Kakumu
  • Patent number: 11688429
    Abstract: According to one embodiment, a disk device includes a housing including a hole, a magnetic disk, a control board closing the hole, and an electronic component. The electronic component is mounted on the control board, and assists a control operation for recording and reproducing information on and from the magnetic disk.
    Type: Grant
    Filed: March 10, 2021
    Date of Patent: June 27, 2023
    Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventors: Taichi Okano, Jia Liu, Nobuhiro Yamamoto, Kota Tokuda
  • Publication number: 20230197810
    Abstract: According to one embodiment, a semiconductor device includes first to third electrodes, a semiconductor member, a first conductive member, a connecting member, a first member, and an insulating member. The semiconductor member includes first to third semiconductor regions. The first semiconductor region is between the first electrode and the third semiconductor region. The first semiconductor region includes first to third partial regions. The second semiconductor region is between the first and third semiconductor regions. The second semiconductor region includes third and fourth semiconductor portions. The third semiconductor region includes first and second semiconductor portions. The second electrode is electrically connected with the third semiconductor region. The third electrode includes a first electrode portion. The first conductive member includes first to third conductive regions. The connecting member is electrically connected with the first conductive member.
    Type: Application
    Filed: June 29, 2022
    Publication date: June 22, 2023
    Applicants: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventors: Shotaro BABA, Hiro GANGI, Hiroaki KATOU, Saya SHIMOMURA, Shingo SATO
  • Publication number: 20230197444
    Abstract: According to one embodiment, a wafer includes a silicon substrate including a first surface, and a nitride semiconductor layer provided on the first surface. The silicon substrate includes a plurality of first regions that can be distinguished from each other in an X-ray image of the wafer. The first regions are separated from an outer edge region of the silicon substrate. One of the first regions includes a plurality of first linear bodies along a first line direction. An other one of the first regions includes a plurality of second linear bodies along a second line direction. The second line direction crosses the first line direction.
    Type: Application
    Filed: August 10, 2022
    Publication date: June 22, 2023
    Applicants: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventors: Jumpei TAJIMA, Hajime NAGO, Toshiki HIKOSAKA, Shinya NUNOUE
  • Patent number: 11681315
    Abstract: A regulator circuit according to one embodiment includes a first transistor, a filter, and a differential amplifier. The first transistor is provided between an input terminal on a power supply side and an output terminal on an output side. The differential amplifier includes an output node connected to the first transistor, and controls the first transistor on the basis of a result of comparison between a reference voltage and a feedback voltage according to an output voltage applied to the output terminal. The filter is connected to a control node that makes a differential pair with the output node, in the differential amplifier.
    Type: Grant
    Filed: June 30, 2022
    Date of Patent: June 20, 2023
    Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventor: Yuichi Sawahara
  • Patent number: 11680964
    Abstract: According to one embodiment, a current detecting circuit includes: a normally-ON type first switching element that includes a drain, a source, and a gate; a normally-OFF type second switching element including a drain that is connected to the source of the first switching element, a source that is connected to the gate of the first switching element, and a gate; and a differential amplification circuit that outputs a voltage according to a voltage between the drain and the source of the second switching element.
    Type: Grant
    Filed: May 13, 2022
    Date of Patent: June 20, 2023
    Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventor: Hideaki Majima
  • Patent number: 11682430
    Abstract: According to one embodiment, a magnetic disk device includes a plurality of magnetic disks, a plurality of magnetic heads provided correspondingly to the plurality of magnetic disks and configured to carry out read/write of data from/to the magnetic disks, and a control section configured to control read/write of the magnetic heads. Each of the plurality of magnetic disks includes a first storage section storing therein control information concerning read/write of the magnetic head. The control section switches the first storage section which is a storage destination of first information that is at least a part of the control information from the magnetic disk to another magnetic disk.
    Type: Grant
    Filed: September 13, 2021
    Date of Patent: June 20, 2023
    Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventors: Osamu Yoshida, Tatsuo Nitta