Patents Assigned to TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
  • Patent number: 11830916
    Abstract: A semiconductor device includes first and second nitride semiconductor layers. The second layer on the first nitride has a first region, a second region, and a third region between the first and second regions. A first gate electrode is in the first region and extends parallel to a surface of a substrate. A first source electrode is in the first region and extends in the first direction. A second gate electrode in the second region and extends in the first direction. A second source electrode is in the second region and extends in the first direction. A drain electrode coupled to a first and a second wiring. The first wiring directly contacts the second nitride semiconductor layer in the first region. The second wiring directly contacts the second nitride semiconductor layer in the second region. An insulation material is in the third region.
    Type: Grant
    Filed: March 2, 2021
    Date of Patent: November 28, 2023
    Assignees: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage Corporation
    Inventors: Akira Yoshioka, Yasuhiro Isobe, Hung Hung, Hitoshi Kobayashi, Tetsuya Ohno, Toru Sugiyama
  • Patent number: 11830790
    Abstract: A semiconductor device according to an embodiment includes: a first trench and a second trench extending in a first direction; a first gate electrode in the first trench; a second gate electrode in the second trench; a first gate wire including a first portion extending in a second direction perpendicular to the first direction and a third portion extending in the second direction; a second gate wire including a first portion extending in the second direction and a third portion extending in the second direction; a first gate electrode pad; and a second gate electrode pad. The first portion of the second gate wire is between the first portion and the third portion of the first gate wire, and the third portion of the first gate wire is between the first portion and the third portion of the second gate wire.
    Type: Grant
    Filed: September 10, 2021
    Date of Patent: November 28, 2023
    Assignees: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage Corporation
    Inventors: Hiroko Itokazu, Tomoko Matsudai, Yoko Iwakaji, Keiko Kawamura
  • Patent number: 11830945
    Abstract: According to one embodiment, a semiconductor device includes a first electrode, a first semiconductor region of a first conductivity type, a second electrode, a gate electrode, second semiconductor regions of a second conductivity type, third semiconductor regions of the first conductivity type, and a third electrode. The second electrode is provided in a plurality in second and third directions. Each second electrode opposes a portion of the first semiconductor region in the second and third directions with an insulating layer interposed. The gate electrode is provided around each second electrode. The first semiconductor region includes first regions provided respectively around the second electrodes and the second region provided around the first regions in the second and third directions. Impurity concentration of the first conductivity type in each of the first regions is higher than impurity concentration of the first conductivity type in the second region.
    Type: Grant
    Filed: March 21, 2022
    Date of Patent: November 28, 2023
    Assignees: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage Corporation
    Inventors: Kentaro Ichinoseki, Tatsuya Nishiwaki, Shingo Sato
  • Patent number: 11830529
    Abstract: According to one embodiment, a disk device includes two magnetic disks opposing each other at intervals of 1.2 to 1.5 mm, and at least two suspension assemblies movable respectively between the two magnetic disks. Each of the suspension assemblies includes a base plate, a load beam extending from the base plate, a tab extending from a distal end of the load beam, a wiring member on the load beam and the base plate, including a gimbal portion, and a magnetic head on the gimbal portion, abutting on a dimple of the load beam via the gimbal portion. The ratio of a distance from a bendable location of the load beam to a center of the dimple with respect to a distance from the center of the dimple to a tip of the tab is 2.8 to 3.8.
    Type: Grant
    Filed: June 10, 2022
    Date of Patent: November 28, 2023
    Assignees: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage Corporation
    Inventor: Manabu Uehara
  • Publication number: 20230378243
    Abstract: An isolator includes a first electrode; a first insulating portion on the first electrode; a second electrode on the first insulating portion; a second insulating portion around the second electrode; and a first dielectric portion on the second electrode and the second insulating portion. The second insulating portion is provided along a first plane perpendicular to a first direction from the first electrode toward the second electrode. The second electrode including a bottom surface facing the first insulating portion, an upper surface facing the first dielectric portion, a first side surface connected to the bottom surface, and a second side surface connected to the upper surface and the first side surface. The upper surface is wider than the bottom surface in a second direction along the first plane. The first side surface is tilted with respect to the bottom surface and the second side surface.
    Type: Application
    Filed: August 3, 2023
    Publication date: November 23, 2023
    Applicants: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage Corporation
    Inventors: Akira ISHIGURO, Ryohei NEGA, Yoshihiko FUJI
  • Patent number: 11823985
    Abstract: A leadframe includes a first frame part and a second frame part. The first frame part includes a bed portion including a first section being thin in a first direction, a first support portion, a first lead portion positioned between the bed portion and the first support portion in a second direction, the first lead portion being connected with the bed portion and the first support portion, a first extension portion being connected to the bed portion, and a second extension portion separated from the first extension portion in a third direction and connected to the bed portion. The second frame part includes a second support portion connected to the first and second extension portions, and a second lead portion connected to the second support portion.
    Type: Grant
    Filed: September 9, 2021
    Date of Patent: November 21, 2023
    Assignees: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage Corporation
    Inventor: Koji Araki
  • Patent number: 11823717
    Abstract: A disk device according to one embodiment includes a magnetic disk, a magnetic head, and a flexible printed circuit board. The flexible printed circuit board is electrically connected to the magnetic head. The flexible printed circuit board includes a first layer, a second layer having conductive property, and a third layer having insulation property. The first layer includes a first surface having insulation property. The second layer overlays the first surface, and includes a first conductor and a second conductor spaced from the first conductor. The third layer covers at least a part of the first surface and at least a part of the second layer. The flexible printed circuit board is provided with a first hole that is located between the first conductor and the second conductor with spacing from the second layer and penetrates the third layer.
    Type: Grant
    Filed: March 8, 2022
    Date of Patent: November 21, 2023
    Assignees: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage Corporation
    Inventors: Kota Tokuda, Yoshihiro Amemiya, Shinra Yamanaka, Nobuhiro Yamamoto, Taichi Okano
  • Patent number: 11824112
    Abstract: A semiconductor device includes a semiconductor part; first and second electrodes respectively on back and front surfaces of the semiconductor part; third and fourth electrodes inside a trench of the semiconductor part, the fourth electrode being provided between the first electrode and the third electrode; a first insulating portion electrically insulating the third electrode from the semiconductor part; a second insulating portion electrically insulating the third electrode from the second electrode; a third insulating portion electrically insulating the fourth electrode from the semiconductor part; a fourth insulating portion electrically insulating the fourth electrode from the third electrode; and a fifth insulating portion including a first portion and a second portion, the first portion being provided inside the fourth electrode, the second portion extending outward of the fourth electrode.
    Type: Grant
    Filed: July 14, 2022
    Date of Patent: November 21, 2023
    Assignees: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage Corporation
    Inventor: Toshifumi Nishiguchi
  • Patent number: 11824056
    Abstract: A semiconductor device includes a semiconductor part, first and second electrodes, a control electrode and a control interconnect. The semiconductor part includes first to sixth layers and is provided between the first and second electrodes. The second layer is provided between the first layer and the second electrode. The third layer is provided between the second layer and the second electrode. The fourth and fifth layers are arranged between the first layer and the first electrode. The second electrode and the control interconnect are arranged on the semiconductor part. The control electrode is provided between the second electrode and the semiconductor part. The sixth layer is provided between the first layer and the control interconnect. The fifth semiconductor layer is provided between the first electrode and the sixth layer. The first semiconductor layer includes a carrier trap provided between the fifth and sixth layers.
    Type: Grant
    Filed: September 10, 2021
    Date of Patent: November 21, 2023
    Assignees: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage Corporation
    Inventors: Ryohei Gejo, Akiyo Minamikawa, Shigeaki Hayase
  • Patent number: 11824134
    Abstract: A semiconductor device includes a light-emitting element, a light-receiving element, a switching element, an input-side terminal, an output-side terminal, and a resin layer. The light-emitting element, the light-receiving element and the switching element are provided at the front side of the resin layer. The light-receiving element and the switching element are arranged in a first direction along the front side of the resin layer. The switching element is electrically connected to the light-receiving element. The light-receiving element is provided between the light-emitting element and the resin layer. The input-side and output-side terminals are provided at the backside of the resin layer. The input-side terminal is electrically connected to the light-emitting element. The output-side terminal is electrically connected to the switching element.
    Type: Grant
    Filed: February 8, 2021
    Date of Patent: November 21, 2023
    Assignees: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage Corporation
    Inventor: Toshihide Osanai
  • Patent number: 11817810
    Abstract: According to one embodiment, a motor driving device includes an output part that supplies an exciting current to an exciting coil, a position detection part that detects a rotational position of a rotor, and a driving control part that produces a driving signal that is based on a detection signal from the position detection part and supplies it to the output part. The position detection part has first, second, and third detection elements that are integrally integrated together with the driving control part and detect rotational positions of the rotor.
    Type: Grant
    Filed: July 20, 2021
    Date of Patent: November 14, 2023
    Assignees: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage Corporation
    Inventor: Shen Wang
  • Patent number: 11817136
    Abstract: According to an embodiment, in a disk device, a first actuator moves a first head with respect to a first surface of a first disk. A controller controls positioning of the first head via the first actuator and controls a write operation to the first disk by the first head. The controller acquires information regarding a state of a vibration source, changes a value of a coefficient for estimating a predicted position of the first head according to the information regarding the state of the vibration source, estimates a predicted position of the first head with the value of the coefficient changed, performs a write operation by the first head in a case where the predicted position estimated is equal to or less than a threshold, and prohibits the write operation by the first head in a case where the predicted position estimated exceeds the threshold.
    Type: Grant
    Filed: August 22, 2022
    Date of Patent: November 14, 2023
    Assignees: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage Corporation
    Inventor: Takeyori Hara
  • Patent number: 11817828
    Abstract: An amplifier circuitry includes a first amplifier, a second amplifier, a voltage generating circuitry, and a control circuitry. The first amplifier circuitry configured to amplify a first signal. The second amplifier circuitry configured to amplify a second signal which forms differential signals together with the first signal. The voltage generating circuitry configured to generate at least one of a first bias voltage to be applied to the first signal and a second bias voltage to be applied to the second signal. The control circuitry configured to control the voltage generation circuitry so as to decrease a difference between a DC component of an output of the first amplifier circuitry and a DC component of an output of the second amplifier circuitry.
    Type: Grant
    Filed: September 4, 2020
    Date of Patent: November 14, 2023
    Assignees: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage Corporation
    Inventor: Tong Wang
  • Patent number: 11817476
    Abstract: A semiconductor device includes a semiconductor layer having a first surface in which a plurality of trenches each extending along a first direction are arranged along a second direction perpendicular to the first direction, a first electrode on a second surface of the semiconductor layer, a second electrode on the first surface of the semiconductor layer, and a control electrode inside at least one of the trenches. The plurality of trenches includes first, second, and third trenches. The first and second trenches are connected to each other via a first connector at an end in the first direction of each of the first and second trenches. The third trench extends beyond the end of each of the first and second trenches along the first direction.
    Type: Grant
    Filed: February 24, 2021
    Date of Patent: November 14, 2023
    Assignees: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage Corporation
    Inventors: Kotaro Zaima, Yukie Nishikawa, Emiko Adachi
  • Patent number: 11817346
    Abstract: An isolator includes a first insulating portion, a first electrode provided in the first insulating portion, a second insulating portion provided on the first insulating portion and the first electrode, a third insulating portion provided on the second insulating portion, and a second electrode provided in the third insulating portion. The second insulating portion includes a plurality of first voids and a second void. The plurality of first voids are arranged in a first direction parallel to an interface between the first insulating portion and the second insulating portion. At least one of the first voids is provided under the second void.
    Type: Grant
    Filed: February 22, 2021
    Date of Patent: November 14, 2023
    Assignees: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage Corporation
    Inventor: Akira Ishiguro
  • Patent number: 11818063
    Abstract: According to one embodiment, a wireless communication device includes a receiver, a controller and a transmitter. The receiver receives a terminal identifier of a first terminal being a target for downlink frequency multiplexing transmission from another wireless communication device, and receives information identifying, of a plurality of frequency components, a first frequency component allocated to the first terminal. The controller selects, of a plurality second terminals belonging to the wireless communication device, a second terminal having a terminal identifier same as that of the first terminal and allocates the first frequency component to the selected second terminal.
    Type: Grant
    Filed: December 20, 2021
    Date of Patent: November 14, 2023
    Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventors: Ryoko Matsuo, Tomoya Tandai
  • Patent number: 11817135
    Abstract: According to one embodiment, a magnetic head includes a main pole, an auxiliary magnetic pole provided with a write gap in the main pole, a spin torque control element provided in the write gap, a bias current control portion which supplies a bias current to the spin torque control element, and a resistance measuring portion which measures a resistance value of the spin torque control element. The absolute value of a difference between a first resistance value when a bias current is applied with a polarity that magnetization of the spin torque control element is reversed and a second resistance value when the bias current is applied to a reversed polarity of the polarity is less than or equal to 4%.
    Type: Grant
    Filed: July 8, 2022
    Date of Patent: November 14, 2023
    Assignees: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage Corporation
    Inventor: Gaku Koizumi
  • Patent number: 11817132
    Abstract: According to one embodiment, a disk device includes a housing with a bottom wall, magnetic disks supported on a hub of a motor, a printed circuit board provided on an outer surface of the bottom wall, and a wiring board attached on the outer surface of the bottom wall. The bottom wall includes a recess formed in the outer surface, a step located on border between the outer surface and the recess, and through holes opened to the recess. The wiring board includes one end portion disposed in the recess and connection pads on the one end portion, connected to lead wires of a coil. An adhesive is filled into the recess and the through holes, and covers the one end and a solder joint and seals the through holes.
    Type: Grant
    Filed: November 19, 2021
    Date of Patent: November 14, 2023
    Assignees: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage Corporation
    Inventors: Manabu Uehara, Yuu Kawai
  • Patent number: 11817123
    Abstract: According to one embodiment, a magnetic disk device including a disk, a head which writes data to the disk and reads data from the disk, and a controller which sets a first DOL for a first sector group and a second DOL for a second sector group to different values, the first sector group including one or more first sectors and a first parity sector, the first sectors which allow an error correction process to be performed for each track based on the first parity sector, and are continuously arranged in a circumferential direction of the disk from the first parity sector, the second sector group including one or more second sectors which allow no error correction process to be performed for each track, and are continuously arranged in the circumferential direction.
    Type: Grant
    Filed: August 15, 2022
    Date of Patent: November 14, 2023
    Assignees: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage Corporation
    Inventor: Nobuhiro Maeto
  • Patent number: 11817133
    Abstract: According to one embodiment, a magnetic disk device incudes a first magnetic disk, a first actuator that reads/writes data from/to the first magnetic disk, a first controller that controls the first actuator, a second magnetic disk, a second actuator that reads/writes data from/to the second magnetic disk, a second controller that controls the second actuator, wherein the first controller executes read/write processing, and the second controller stores trace data of the read/write processing when the first controller executes the read/write processing.
    Type: Grant
    Filed: March 1, 2022
    Date of Patent: November 14, 2023
    Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventors: Kimiyasu Aida, Kazuya Takada