Patents Assigned to TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
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Patent number: 11735215Abstract: A magnetic disk device includes a disk, first and second heads, a motor, and a controller. The disk includes a first surface and a second surface opposite to the first surface. The first head is configured to perform reading and writing with respect to the first surface. The second head is configured to perform reading and writing with respect to the second surface. The motor is configured to move the first and second heads with respect to the first and second surfaces, respectively, along a radial direction of the disk. The controller is configured to alternately activate the first and second heads to perform writing of a plurality of spiral patterns on the first and second surfaces of the disk, respectively, while controlling the motor to move the first and second heads at a predetermined constant speed with respect to the first and second surfaces in the radial direction.Type: GrantFiled: March 3, 2022Date of Patent: August 22, 2023Assignees: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage CorporationInventor: Satoshi Kuwahara
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Patent number: 11736082Abstract: According to one embodiment, a clipping state detecting circuit includes: a zero-cross detection circuit that detects a zero-cross point of an input signal; an output circuit that converts the input signal into a PWM signal; a clip detection circuit that detects a state in which an output of the output circuit is clipped; and a control circuit that determines a state is a clipping state when a clip time of the output of the output circuit satisfies a condition of a threshold value set in advance with respect to a non-clip time.Type: GrantFiled: August 24, 2021Date of Patent: August 22, 2023Assignees: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage CorporationInventor: Takayuki Takida
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Patent number: 11735505Abstract: According to one embodiment, a semiconductor device includes a semiconductor chip, first and second conductive members, a first connection member, and a resin portion. The first conductive member includes first and second portions. The second portion is electrically connected to the semiconductor chip. A direction from the semiconductor chip toward the second portion is aligned with a first direction. A direction from the second portion toward the first portion is aligned with a second direction crossing the first direction. The second conductive member includes a third portion. The first connection member is provided between the first and third portion. The first connection member is conductive. The resin portion includes a first partial region. The first partial region is provided around the first and third portions, and the first connection member. The first portion has a first surface opposing the first connection member and including a recess and a protrusion.Type: GrantFiled: May 10, 2021Date of Patent: August 22, 2023Assignees: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage CorporationInventors: Hidetoshi Kuraya, Satoshi Hattori, Kyo Tanabiki
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Patent number: 11736134Abstract: A digital isolator according to an embodiment includes a first electrode, a first insulating part, a second electrode, a second insulating part, and a first dielectric part. The first insulating part is located under the first electrode. The second electrode is located under the first insulating part. The second insulating part is located around the first electrode along a first plane perpendicular to a first direction. The first direction is from the second electrode toward the first electrode. The first dielectric part is located between the first electrode and the second insulating part in a second direction along the first plane. The first dielectric part contacts the first electrode. A relative dielectric constant of the first dielectric part is greater than a relative dielectric constant of the first insulating part.Type: GrantFiled: November 12, 2021Date of Patent: August 22, 2023Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATIONInventor: Nobuhide Yamada
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Patent number: 11736817Abstract: According to one embodiment, a solid state image capturing device includes a pixel portion in which a plurality of pixels are arranged, a common signal line that transports an output signal from the pixel portion, and an output circuit that amplifies the output signal transported by using the common signal line. The pixel portion is divided into a plurality of pixel groups, the common signal line is divided into a plurality of division lines corresponding to the plurality of pixel groups, and the output circuit receives the output signals transported by using the plurality of division lines.Type: GrantFiled: August 27, 2021Date of Patent: August 22, 2023Assignees: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage CorporationInventor: Kenji Hasegawa
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Patent number: 11728458Abstract: A semiconductor light-emitting device includes a semiconductor substrate and a light-emitting layer on the semiconductor substrate. The light-emitting layer includes at least one quantum well layer and barrier layers alternately stacked. The quantum well layer includes a first semiconductor mixed crystal having a larger lattice constant than a lattice constant of the semiconductor substrate. The barrier layers each includes a second semiconductor mixed crystal having a smaller lattice constant than the lattice constant of the semiconductor substrate. The quantum well layer includes a first strain amount that is a product of the layer thickness thereof and a first strain ratio. The barrier layer each includes a second strain amount that is a product of the layer thickness thereof and a second strain ratio. The quantum well layer and the barrier layers are provided such that the first strain amount is greater than the second strain amount.Type: GrantFiled: August 30, 2021Date of Patent: August 15, 2023Assignees: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage CorporationInventor: Hideto Sugawara
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Patent number: 11728396Abstract: A semiconductor device includes a semiconductor part including a first surface, a second surface, a first region provided between the first surface and the second surface, and a second region provided between the first surface and the second surface; a common electrode provided at the second surface; a first electrode provided on the first surface at the first region; a second electrode provided on the first surface at the second region and separated from the first electrode; a first control electrode provided in the first region; and a second control electrode provided in the second region. A first trench is provided in the common electrode.Type: GrantFiled: September 9, 2020Date of Patent: August 15, 2023Assignees: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage CorporationInventor: Akihiro Tanaka
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Patent number: 11727956Abstract: A disk device includes one or more disks, a base shaft, a bearing shaft, first and second bearing units, first and second actuator assemblies, and a damping member. The bearing shaft has a tubular portion fixed around the base shaft. The first and second bearing units are attached around the bearing shaft and aligned in an axial direction of the bearing shaft. The first and second actuator assemblies are coupled to the first and second bearing units, respectively. The damping member is provided between an outer circumferential surface of the base shaft and an inner circumferential surface of the tubular portion of the bearing shaft.Type: GrantFiled: February 10, 2022Date of Patent: August 15, 2023Assignees: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage CorporationInventors: Makoto Okamoto, Takuma Kido
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Patent number: 11728386Abstract: A semiconductor device of embodiments includes a silicon carbide layer including an element region and a termination region around the element region, the termination region having first straight-line portions extending in a first direction, second straight-line portions extending in a second direction, and corner portions between the first straight-line portions and the second straight-line portions, the termination region including a second-conductivity-type second silicon carbide region having a dot-line shape with first dot portions and first space portions surrounding the element region, an occupation ratio of the first dot portions is larger in the corner portions than in the first straight-line portions, and a second-conductivity-type third silicon carbide region having a dot-line shape with second dot portions and second space portions surrounding the second silicon carbide region, an occupation ratio of the second dot portions is lager in the corner portions than in the first straight-line portions.Type: GrantFiled: July 14, 2021Date of Patent: August 15, 2023Assignees: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage CorporationInventors: Hiroshi Kono, Souzou Kanie, Shigeto Fukatsu, Takuma Suzuki
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Patent number: 11726511Abstract: According to one embodiment, a constant voltage circuit includes: a first gain stage that outputting a first voltage amplifying a difference voltage between a divided voltage of an output voltage and a reference voltage; a second gain stage outputting a second voltage amplifying the first voltage; a second transistor, one end of which is coupled to the input voltage terminal, and other end of which is coupled to an output voltage terminal, controlling the output voltage to be constant in accordance with the second voltage applied to the gate; and a first circuit selecting one of a first operation mode and a second operation mode. When the first operation mode is selected, a first current flows to the first node, and when the second operation mode is selected, a second current flows to the first node.Type: GrantFiled: March 10, 2021Date of Patent: August 15, 2023Assignees: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage CorporationInventor: Akio Ogura
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Patent number: 11728803Abstract: According to one embodiment, a multichannel switch integrated circuit (IC) includes a multichannel switch circuit and a common test terminal. The multichannel switch circuit includes a plurality of switch circuitries. Each of the switch circuitries includes: an output transistor that outputs an output signal through an output terminal; an overcurrent detection circuit that detects a detection current according to a current flowing through the output transistor; and a diode having an anode that receives the detection current. The common test terminal is connected to each channel switch circuitry, connected to the overcurrent detection circuit through the diode, and connected to a cathode of the diode.Type: GrantFiled: January 25, 2022Date of Patent: August 15, 2023Assignees: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage CorporationInventor: Masatoshi Shinohara
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Publication number: 20230253485Abstract: According to one embodiment, a semiconductor device includes first to fourth electrodes, a semiconductor member, and an insulating member. The semiconductor member includes first to sixth semiconductor regions. The third semiconductor region includes first and second partial regions. A part of the fourth semiconductor region is between the second partial and second semiconductor regions. The fifth semiconductor region is between the second partial region and a part of the fourth semiconductor region. The sixth semiconductor region is between the first electrode and the first semiconductor region. The second electrode is electrically connected to the second semiconductor region. The fourth electrode is between the first partial region and the third electrode. A part of the insulating member is provided between the semiconductor member and the third electrode, between the semiconductor member and the fourth electrode, and between the third and fourth electrodes.Type: ApplicationFiled: August 2, 2022Publication date: August 10, 2023Applicants: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATIONInventors: Takahiro KATO, Tatsunori SAKANO, Yusuke KOBAYASHI, Ryohei GEJO
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Patent number: 11720137Abstract: According to an embodiment, a bandgap type reference voltage generation circuit includes a first node that is connected to an output terminal, second and third nodes that are connected to current sources, a fourth node, first and second bipolar junction transistors with bases that are connected to the first node, a third bipolar junction transistor that is provided with an emitter-collector path that is connected between the second node and the fourth node and amplifies an output current of the first bipolar junction transistor, and a fourth bipolar junction transistor that is provided with an emitter-collector path that is connected between the third node and the fourth node and amplifies an output current of the second bipolar junction transistor.Type: GrantFiled: August 4, 2021Date of Patent: August 8, 2023Assignees: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage CorporationInventor: Katsuyuki Ikeuchi
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Patent number: 11721750Abstract: A semiconductor device includes a semiconductor part, first and second electrodes, and a control electrode. The semiconductor part is provided between the first and second electrodes. The semiconductor part includes first to seventh layers. The second of a second conductivity type is provided between the first layer of a first conductivity type and the first electrode. The third and fourth layers of the first conductivity type are arranged along the second layer between the second layer and the first electrode. The fifth layer of the second conductivity type is provided between the second electrode and the first layer. The sixth and seventh layers are arranged along the fifth layer between the first and fifth layers. The sixth and seventh layers include the first-conductivity-type impurities with first and second surface densities, respectively. The first surface density is greater than the second surface density.Type: GrantFiled: August 11, 2021Date of Patent: August 8, 2023Assignees: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage CorporationInventors: Takeshi Suwa, Tomoko Matsudai, Yoko Iwakaji, Hiroko Itokazu
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Patent number: 11721359Abstract: According to one embodiment, a magnetic head includes first and second magnetic poles, and a stacked body provided between the first and second magnetic poles. The stacked body includes a first magnetic layer, a second magnetic layer provided between the first magnetic layer and the second magnetic pole, a first nonmagnetic layer provided between the first and second magnetic layers, a second nonmagnetic layer provided between the second magnetic layer and the second magnetic pole, and a third nonmagnetic layer provided between the first magnetic pole and the first magnetic layer. The first magnetic layer includes a first element including at least one of Fe, Co, or Ni. The second magnetic layer includes (Fe100-xCox)100-yEy. A second element E includes at least one selected from the group consisting of Cr, V, Mn, Yi, and Sc. The first magnetic layer does not include the second element.Type: GrantFiled: January 28, 2022Date of Patent: August 8, 2023Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATIONInventors: Yuji Nakagawa, Naoyuki Narita, Masayuki Takagishi, Tomoyuki Maeda, Tazumi Nagasawa
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Patent number: 11721732Abstract: A semiconductor device includes a semiconductor part, first to third electrodes, and first and second control electrodes. The semiconductor part is provided between the first and second electrodes. On the second electrode side of the semiconductor part, the first control electrode and the third electrode are provided in a first trench, and the second control electrode is provided in a second trench. The first control electrode is provided between the second and third electrode. In a first direction from the first control electrode toward the second control electrode, the first trench has first and second widths. The first width is a combined width of the third electrode and insulating portions provided on both sides of the third electrode. The second width is a combined width of the first control electrode and the gate insulating films on both sides thereof. The first width is greater than the second width.Type: GrantFiled: January 27, 2022Date of Patent: August 8, 2023Assignees: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage CorporationInventor: Masataka Ino
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Publication number: 20230247669Abstract: According to one embodiment, a wireless communication device includes: a receiver that configured to receives a first frame; and a transmitter that configured to transmits a second frame including a first identifier and acknowledgement information on the first frame, the first identifier being extracted from a predetermined field of the first frame and being different from a source address of the first frame.Type: ApplicationFiled: April 10, 2023Publication date: August 3, 2023Applicant: TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATIONInventors: Tomoko ADACHI, Masahiro SEKIYA, Takeshi TOMIZAWA, Daisuke TAKI, Masaaki IKUTA, Tomoya SUZUKI
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Publication number: 20230244959Abstract: According to one embodiment, a data processing device includes a processor. The processor acquires first features corresponding to a first classification label and second features corresponding to a second classification label. The processor selects at least a part of the first features from the first features, and at least a part of the second features from the second features. The processor performs a first operation. In the first operation, a first number of the at least a part of the selected first features is not less than 1.1 times and not more than 2 times a second number of the at least a part of the selected second features. The processor generates a first machine learning model based on first training data based on the at least a part of the selected first and second features.Type: ApplicationFiled: July 13, 2022Publication date: August 3, 2023Applicants: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATIONInventors: Katsuya SUGAWARA, Kenichiro YAMADA, Tomoyuki MAEDA
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Patent number: 11715773Abstract: A semiconductor device includes first to fourth electrodes, a semiconductor portion, and first and second insulating films. The semiconductor portion includes first to third semiconductor layers. The second electrode is in contact with the third semiconductor layer and is spaced from the second semiconductor layer, the third semiconductor layer, and the second electrode. The first insulating film covers the third electrode. The fourth electrode is connected to the second electrode, and is spaced from the first semiconductor layer and the third electrode. The second insulating film is provided on a side surface of the fourth electrode, faces the first semiconductor layer through an air gap, and increases in thickness toward the first direction.Type: GrantFiled: September 10, 2021Date of Patent: August 1, 2023Assignees: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage CorporationInventor: Tsuyoshi Kachi
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Patent number: 11715793Abstract: A semiconductor device includes a semiconductor part, an first electrode, a control electrode and second electrodes. The control electrode and the second electrodes are provided between the semiconductor part and the first electrode, and provided inside trenches, respectively. The second electrodes include first to third ones. The first and second ones of the second electrodes are adjacent to each other with a portion of the semiconductor part interposed. The second electrodes each are electrically isolated from the semiconductor part by a insulating film including first and second insulating portions adjacent to each other. The first insulating portion has a first thickness. The second insulating portion has a second thickness thinner than the first thickness. The first insulating portion is provided between the first and second ones of the second electrodes. The second insulating portion is provided between the first and third ones of the second electrodes.Type: GrantFiled: August 27, 2021Date of Patent: August 1, 2023Assignees: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage CorporationInventors: Hiroaki Katou, Atsuro Inada, Tatsuya Shiraishi, Tatsuya Nishiwaki, Kenya Kobayashi