Abstract: A computer system includes a processor and a processing circuit. The processor has an embedded memory. The processing circuit is arranged to perform a write operation for writing a first write data into the embedded memory included in the processor. The processor is arranged to load and execute a program code to perform a read operation for reading the first write data from the embedded memory included in the processor.

Abstract: An encoding method for a key Trie includes generating a plurality of meta data by applying encoding to a portion of non-leaf nodes of the key Trie, and storing an encoding result of the key Trie into a storage device, wherein the encoding result includes the plurality of meta data corresponding to the portion of non-leaf nodes, respectively.

Abstract: A non-volatile memory apparatus includes an error checking and correcting (ECC) decoding circuit, a first cyclic redundancy check (CRC) circuit, a second CRC circuit, and an interface circuit. The ECC decoding circuit decodes an original codeword to obtain a decoded codeword. The interface circuit receives and provides a first data portion of the decoded codeword to a host. The first CRC circuit performs a first CRC on the first data portion and generates a check status message based on a relationship between a result of the first CRC and a first CRC code of the decoded codeword. The second CRC circuit performs a second CRC on the first data portion to generate a second CRC code. The second CRC circuit determines whether to further change the second CRC code to make the second CRC code not match the first data portion according to the check status message.

Abstract: An authorization method and an authorization system are provided. The authorization method includes displaying, by a service device, authorization information on an e-paper arranged on the service device; obtaining, by a user device, the authorization information from the e-paper; and using, by the user device, the authorization information displayed on the e-paper to perform an authorization operation between the user device and the service device.

Abstract: A data storage system and a global deduplication method thereof are provided. The data storage system includes multiple storage devices and one dispatch device. The dispatch device divides an original data corresponding to a data writing request into at least one data chunk. The dispatch device performs a summary calculation on one data chunk, so as to generate a representative value. The dispatch device performs a first distribution calculation on the representative value, so as to determine a destination location corresponding to the representative value. The dispatch device transmits the data chunk and the representative value to at least one destination storage device among the storage devices through a communication network according to the destination location. The at least one destination storage device checks the representative value, so as to determine whether to store the data chunk in a storage space of the at least one destination storage device.

Abstract: A non-volatile memory (NVM) apparatus and a garbage collection method thereof are provided. The NVM apparatus includes a NVM and a controller. The controller is coupled to the NVM. The controller accesses the NVM according to a logical address of a write command of a host. The controller performs the garbage collection method to release space occupied by invalid data. The garbage collection method includes: grouping a plurality of blocks of the NVM into a plurality of tiers according to hotness of data, moving valid data in one closed source block of a hotter tier among the tiers to one open target block of a cooler tier among the tiers, and erasing the closed source block of the hotter tier to release space.

Abstract: A method for displaying landmark data from a search of a place name keyword, the method includes: inputting the place name keyword to a server to search for a plurality of landmark data, wherein each of the landmark data comprises fields of a landmark name, an objective level category, an address, and an address quoting frequency; sorting the landmark data by an electronic device to a display order, based on a characterized parameter for each of the landmark, wherein the characterized parameter is calculated based on at least a publicity, wherein the publicity is a calculation of the objective level category and the address quoting frequency with respectively weighting to the objective level category and the address quoting frequency; and displaying the landmark data by the electronic device according to the display order.

Abstract: An architecture of a multi-core electronic system is provided. The architecture includes a plurality of first computing cores, a first ring bus, a direct memory access (DMA) engine, and a DMA ring controller. The first computing cores are connected to the first ring bus. The DMA ring controller connects the DMA engine to the first ring bus. The first computing cores communicate with the DMA engine through the first ring bus and make the DMA engine perform a memory operation.

Abstract: A non-volatile memory apparatus includes an error checking and correcting (ECC) decoding circuit, a first cyclic redundancy check (CRC) circuit, a second CRC circuit, and an interface circuit. The ECC decoding circuit decodes an original codeword to obtain a decoded codeword. The interface circuit receives and provides a first data portion of the decoded codeword to a host. The first CRC circuit performs a first CRC on the first data portion and generates a check status message based on a relationship between a result of the first CRC and a first CRC code of the decoded codeword. The second CRC circuit performs a second CRC on the first data portion to generate a second CRC code. The second CRC circuit determines whether to further change the second CRC code to make the second CRC code not match the first data portion according to the check status message.

Abstract: A non-volatile memory (NVM) apparatus and an iteration sorting method thereof are provided. The NVM apparatus performs the iteration sorting method to select one target block from a plurality of blocks of a NVM, and to perform a management operation on the target block. The iteration sorting method includes: selecting a plurality of candidate blocks among the blocks of the NVM to join into a sorting set, sorting all of the candidate blocks in the sorting set according to metadata, picking one candidate block with maximum (or minimum) metadata from the sorting set to serve as the target block, and keeping M candidate blocks in the sorting set and discarding the rest of the candidate blocks from the sorting set.

Abstract: A non-volatile memory apparatus includes an error checking and correcting (ECC) decoding circuit, a main buffer circuit, a multiplexer, and an interface circuit. The ECC decoding circuit decodes an original codeword to obtain a decoded codeword. The main buffer circuit is coupled to the ECC decoding circuit for receiving and storing a first data portion of the decoded codeword. The multiplexer's first input end is coupled to the output end of the main buffer circuit. The second input end of the multiplexer is coupled to the output end of the ECC decoding circuit. The interface circuit is coupled to the output end of the multiplexer and receives the first data portion from the multiplexer to provide the first data portion to a host.

Abstract: A method for detecting conflicts between aircraft flying in controlled airspace. The method determines whether pairs of aircraft flight routes violate a predetermined proximity test. The separation of pairs of aircraft whose flight routes do not violate the proximity test is assured. For pairs of aircraft whose flight routes violate the proximity test, the method calculates the parts of their flight routes that breach the separation threshold, the conflict paths (406, 408). The conflict paths are stored. The method determines the portions of aircraft trajectories corresponding to the conflict paths. The separation of aircraft that have flown past their conflict paths is assured. The separation time and separation altitude of pairs of aircraft that have not flown past their conflict paths are calculated. The separation time and separation altitude are used to determine future circumstances whereby the pairs of aircraft may lose separation.

Abstract: A non-volatile memory (NVM) apparatus and an address classification method thereof are provided. The NVM apparatus includes a NVM and a controller. The controller accesses the NVM in accordance with a write command of a host. The controller may perform the address classification method. The address classification method includes: providing a data look-up table, wherein the data look-up table includes a plurality of data entries, each of the data entries includes a logical address information, a counter value and a timer value; searching the data look-up table based on the logical address of the write command in order to obtain a corresponding counter value and a corresponding timer value; and determining whether the logical address of the write command is a hot data address based on the corresponding counter value and the corresponding timer value.

Abstract: An electronic apparatus and a method of extending peripheral devices are provided. The electronic apparatus includes: a controller; and a plurality of peripheral devices electrically connected to the controller, wherein the plurality of peripheral devices include a plurality of video graphics array display cards, wherein in an initialization phase of the electronic apparatus, the controller allocates input/output resources to a first portion of the video graphics array display cards and does not allocate the input/output resources to a second portion of the video graphics array display cards, wherein the first portion of the video graphics array display cards allocated with the input/output resources is used to display an image in the initialization phase.

Abstract: A method and an apparatus for generating 3D panoramic video are provided. In the method, plural frames are captured from a panoramic video. Each frame is transformed into a polyhedral mapping projection comprising side planes, a top plane and a bottom plane. Displacements of pixels in the side planes are calculated by using the side planes of each frame, and displacements of pixels in the top plane and the bottom plane are calculated by using the displacements of the side planes. Then, the pixels in the side planes, the top plane and the bottom plane of each frame are shifted according the displacements of the polyhedral mapping projection to generate a shifted polyhedral mapping projection. The shifted polyhedral mapping projection is transformed into a shifted frame with 2D space format. The shifted frames and corresponding frames construct 3D images and the 3D images are encoded into a 3D panoramic video.

Abstract: A natural language recognizing apparatus including an input device, a processing device and a storage device is provided. The input device is configured to provide a natural language data. The storage device is configured to store a plurality of program modules. The program modules include a grammar analysis module. The processing device executes the grammar analysis module to analyze the natural language data through a formal grammar model, and generate a plurality of string data. When at least one of the string data conforms to a preset grammar condition, the processing device judges the at least one of the string data is an intention data, and the processing device outputs a corresponding response signal according to the intention data. In addition, a natural language recognizing method is also provided.

Abstract: A system, a control apparatus and a control method for distributed video display are provided. The system includes an image source device configured to provide image data, a plurality of displays, a plurality of display chips respectively coupled to the displays and connected with the video source device through a network, and a control apparatus connected with the image source device and the display chips through the network and configured to transmit a playback signal to each of the display chips to control the display chips to receive the image data from the image source device and convert the received image data into display frames capable of being played by the displays.

Abstract: An architecture of a multi-core electronic system is provided. The architecture includes a plurality of first computing cores, a first ring bus, a direct memory access (DMA) engine, and a DMA ring controller. The first computing cores are connected to the first ring bus. The DMA ring controller connects the DMA engine to the first ring bus. The first computing cores communicate with the DMA engine through the first ring bus and make the DMA engine perform a memory operation.

Abstract: An audio playing apparatus and an audio transmission circuit are provided. The audio playing apparatus includes a first audio connector, a second audio connector, a player, and an audio transmission circuit. The second audio connector has a different interface specification than an interface specification of the first audio connector. The audio transmission circuit is coupled to the first audio connector, the second audio connector and the player. The audio transmission circuit detects a power pin of the first audio connector and a power pin of the second audio connector to obtain a determination result, and selects one of the first audio connector and the second audio connector as a target connector according to the determination result, so as to transmit an audio signal associated with the target connector to the player.