Patents Assigned to VIA Technologies
  • Patent number: 11709609
    Abstract: A data storage system and a global deduplication method thereof are provided. The data storage system includes multiple storage devices and one dispatch device. The dispatch device divides an original data corresponding to a data writing request into at least one data chunk. The dispatch device performs a summary calculation on one data chunk, so as to generate a representative value. The dispatch device performs a first distribution calculation on the representative value, so as to determine a destination location corresponding to the representative value. The dispatch device transmits the data chunk and the representative value to at least one destination storage device among the storage devices through a communication network according to the destination location. The at least one destination storage device checks the representative value, so as to determine whether to store the data chunk in a storage space of the at least one destination storage device.
    Type: Grant
    Filed: March 8, 2021
    Date of Patent: July 25, 2023
    Assignee: VIA Technologies, Inc.
    Inventors: Chin-Yin Tsai, Yi-Lin Lai
  • Patent number: 11710345
    Abstract: A driver login device includes: a network communication unit in communication with the server via a network; an image pickup device capturing a target to obtain a login data; an image processing unit electrically coupled to the image pickup unit, and receiving and processing the login data to obtain a digital data; and a central processing unit electrically coupled to the network communication unit, the image pickup device and the image processing unit. The central processing unit, by way of the network communication unit, receives the data of the driver from the server via the network, controls the image pickup device to capture the target, comparing the digital data with the data of the driver to generate a comparing result, and by way of the network communication unit, transmitting the comparing result back to the server via the network.
    Type: Grant
    Filed: March 8, 2021
    Date of Patent: July 25, 2023
    Assignee: VIA TECHNOLOGIES, INC.
    Inventors: TsungHsien Wu, Hung-Pin Chen, Chia-Wei Huang, Michael Andrew Fox
  • Patent number: 11706030
    Abstract: An authorization method and an authorization system are provided. The authorization method includes displaying, by a service device, authorization information on an e-paper arranged on the service device; obtaining, by a user device, the authorization information from the e-paper; and using, by the user device, the authorization information displayed on the e-paper to perform an authorization operation between the user device and the service device.
    Type: Grant
    Filed: July 31, 2020
    Date of Patent: July 18, 2023
    Assignee: VIA Technologies, Inc.
    Inventor: Yaozhong Xu
  • Patent number: 11627390
    Abstract: An encoding method, playing method and apparatus for image stabilization of panoramic video, and a method for evaluating image stabilization algorithm are provided. The image stabilization method for the panoramic video is applicable to an electronic apparatus including a processor. In the method, a plurality of image frames of a panoramic video is captured, and each image frame is transformed into a plurality of projection frames on a plurality of faces of a cubemap. Then, variations of triaxial displacements and attitude angles between the projection frames transformed onto each of the faces and adjacent in time are calculated. The variations of triaxial displacements and attitude angles are smoothed and recorded as movement information. While playing the panoramic video, the panoramic video is corrected by the movement information and played. Thus, it is possible to reduce the amount of calculation required for the stabilization calculations on the captured video.
    Type: Grant
    Filed: June 10, 2019
    Date of Patent: April 11, 2023
    Assignee: VIA TECHNOLOGIES, INC.
    Inventors: Tsung-Yu Tsai, I-Chih Chen
  • Patent number: 11580668
    Abstract: There is provided an automatic correction method for an onboard camera and an onboard camera device. The automatic correction method includes the following steps: obtaining a lane image with the onboard camera and a current extrinsic parameter matrix, and identifying two lane lines in the lane image; converting the lane image into a top-view lane image, and obtaining two projected lane lines in the top-view lane image for the two lane lines; calculating a plurality of correction parameter matrices corresponding to the current extrinsic parameter matrix according to the two projected lane lines; and correcting the current extrinsic parameter matrix according to the plurality of correction parameter matrices. This can be applied in situations where the vehicle is stationary or travelling for automatic correction on the extrinsic parameter matrix of the onboard camera.
    Type: Grant
    Filed: October 30, 2020
    Date of Patent: February 14, 2023
    Assignee: VIA TECHNOLOGIES, INC.
    Inventor: Meng-Lun Cai
  • Patent number: 11556801
    Abstract: The present disclosure relates to a neural network image identification system and a neural network building system and method used therein. The neural network building method comprises: forming a combination sequence of instruction graphic tags according to a plurality of instruction graphic tags selected by a user and displayed on a screen; combining a plurality of program sets corresponding to the plurality of instruction graphic tags in an order identical to that of contents in the combination sequence of these instruction graphic tags, to generate a neural network program; and checking whether the combination sequence of instruction graphic tags conforms to one or more preset rules before the neural network program is compiled.
    Type: Grant
    Filed: May 4, 2020
    Date of Patent: January 17, 2023
    Assignee: VIA TECHNOLOGIES, INC.
    Inventor: Chunwen Chen
  • Patent number: 11500801
    Abstract: A computing apparatus includes a first processing circuit and a second processing circuit. The first processing circuit includes a programmable logic circuit. The second processing circuit includes a general purpose processor that is used to execute an application program to download a bitstream to the first processing circuit for programming the programmable logic circuit to implement a direct memory access (DMA) engine and at least one physical engine (PE). The DMA engine is used to access a first memory through a DMA manner. The at least one PE is used to read data to be processed from the first memory through the DMA engine. The first processing circuit and the second processing circuit are disposed in one chip.
    Type: Grant
    Filed: March 1, 2021
    Date of Patent: November 15, 2022
    Assignee: VIA Technologies Inc.
    Inventors: Yi-Lin Lai, Jiin Lai, Chin-Yin Tsai
  • Publication number: 20220359364
    Abstract: A package substrate has a substrate surface and a chip region on the substrate surface. The package substrate includes circuit layers, conductive vias, and byte region rows. The circuit layers are sequentially spaced below the substrate surface. Each conductive via is connected to at least two of the circuit layers. The byte region rows are arranged side by side sequentially from an edge of the chip region to a center of the chip region, and each byte region row includes byte regions arranged in a row. Each byte region includes pads located on the circuit layer closest to the substrate surface. The pads of the byte regions of the byte region row closer to the edge of the chip region extend from the chip region to an outside of the chip region through traces of the circuit layer closer to the substrate surface.
    Type: Application
    Filed: March 16, 2022
    Publication date: November 10, 2022
    Applicant: VIA Technologies, Inc.
    Inventors: Wen-Yuan Chang, Yeh-Chi Hsu, Gao-Tian Lin
  • Patent number: 11442882
    Abstract: A bridge circuit includes an NVMe device controller, a network subsystem, and a data transfer circuit. The NVMe device controller is arranged to communicate with a host via a PCIe bus. The network subsystem is arranged to communicate with an NVMe-TCP device via a network. The data transfer circuit is coupled between the NVMe device controller and the network subsystem, and is arranged to deal with data transfer associated with the NVMe-TCP device without intervention of the host.
    Type: Grant
    Filed: April 19, 2021
    Date of Patent: September 13, 2022
    Assignee: VIA Technologies Inc.
    Inventor: Jiin Lai
  • Publication number: 20220269544
    Abstract: A computer system includes a processor and a processing circuit. The processor has an embedded memory. The processing circuit is arranged to perform a write operation for writing a first write data into the embedded memory included in the processor. The processor is arranged to load and execute a program code to perform a read operation for reading the first write data from the embedded memory included in the processor.
    Type: Application
    Filed: June 17, 2021
    Publication date: August 25, 2022
    Applicant: VIA Technologies Inc.
    Inventor: Chun-Hua Tseng
  • Publication number: 20220197884
    Abstract: An encoding method for a key Trie includes generating a plurality of meta data by applying encoding to a portion of non-leaf nodes of the key Trie, and storing an encoding result of the key Trie into a storage device, wherein the encoding result includes the plurality of meta data corresponding to the portion of non-leaf nodes, respectively.
    Type: Application
    Filed: June 30, 2021
    Publication date: June 23, 2022
    Applicant: VIA Technologies Inc.
    Inventor: Peng Zhang
  • Patent number: 11334429
    Abstract: A non-volatile memory apparatus includes an error checking and correcting (ECC) decoding circuit, a first cyclic redundancy check (CRC) circuit, a second CRC circuit, and an interface circuit. The ECC decoding circuit decodes an original codeword to obtain a decoded codeword. The interface circuit receives and provides a first data portion of the decoded codeword to a host. The first CRC circuit performs a first CRC on the first data portion and generates a check status message based on a relationship between a result of the first CRC and a first CRC code of the decoded codeword. The second CRC circuit performs a second CRC on the first data portion to generate a second CRC code. The second CRC circuit determines whether to further change the second CRC code to make the second CRC code not match the first data portion according to the check status message.
    Type: Grant
    Filed: August 5, 2020
    Date of Patent: May 17, 2022
    Assignee: VIA Technologies, Inc.
    Inventors: Yi-Lin Lai, Chen-Te Chen, Ying-Che Chung
  • Patent number: 11249894
    Abstract: A storage device includes a flash memory array and a controller. The flash memory array includes a plurality of blocks. A minimal erase number of blocks have a minimal erase count in the plurality of blocks. When one of the minimal erase number of blocks is erased, the controller subtracts 1 from the minimal erase number.
    Type: Grant
    Filed: June 13, 2018
    Date of Patent: February 15, 2022
    Assignee: VIA TECHNOLOGIES, INC.
    Inventors: Zhongyi Gao, Xiaoyu Yang
  • Patent number: 11216648
    Abstract: A method for facial image recognition is provided. A plurality of original facial images are received. A plurality of standard facial images corresponding to the original facial images are generated through a standard face generation model. A recognition model is trained by using the original facial images and the standard facial images. The recognition model is tested by using the original facial image test set and a standard facial image test set until the recognition model recognizes that the first accuracy rate of the original facial image test set is higher than a first threshold value and the second accuracy rate of the standard facial image test set is higher than a second threshold value. The original facial image test set is composed of the original facial images obtained by sampling, and the standard facial image test set is composed of the standard facial images obtained by sampling.
    Type: Grant
    Filed: March 3, 2020
    Date of Patent: January 4, 2022
    Assignee: VIA TECHNOLOGIES, INC.
    Inventor: Hao Sun
  • Publication number: 20210320800
    Abstract: An authorization method and an authorization system are provided. The authorization method includes displaying, by a service device, authorization information on an e-paper arranged on the service device; obtaining, by a user device, the authorization information from the e-paper; and using, by the user device, the authorization information displayed on the e-paper to perform an authorization operation between the user device and the service device.
    Type: Application
    Filed: July 31, 2020
    Publication date: October 14, 2021
    Applicant: VIA Technologies, Inc.
    Inventor: Yaozhong XU
  • Publication number: 20210303193
    Abstract: A data storage system and a global deduplication method thereof are provided. The data storage system includes multiple storage devices and one dispatch device. The dispatch device divides an original data corresponding to a data writing request into at least one data chunk. The dispatch device performs a summary calculation on one data chunk, so as to generate a representative value. The dispatch device performs a first distribution calculation on the representative value, so as to determine a destination location corresponding to the representative value. The dispatch device transmits the data chunk and the representative value to at least one destination storage device among the storage devices through a communication network according to the destination location. The at least one destination storage device checks the representative value, so as to determine whether to store the data chunk in a storage space of the at least one destination storage device.
    Type: Application
    Filed: March 8, 2021
    Publication date: September 30, 2021
    Applicant: VIA Technologies, Inc.
    Inventors: Chin-Yin Tsai, Yi-Lin Lai
  • Patent number: 11126544
    Abstract: A non-volatile memory (NVM) apparatus and a garbage collection method thereof are provided. The NVM apparatus includes a NVM and a controller. The controller is coupled to the NVM. The controller accesses the NVM according to a logical address of a write command of a host. The controller performs the garbage collection method to release space occupied by invalid data. The garbage collection method includes: grouping a plurality of blocks of the NVM into a plurality of tiers according to hotness of data, moving valid data in one closed source block of a hotter tier among the tiers to one open target block of a cooler tier among the tiers, and erasing the closed source block of the hotter tier to release space.
    Type: Grant
    Filed: December 14, 2016
    Date of Patent: September 21, 2021
    Assignee: VIA Technologies, Inc.
    Inventors: Ying Yu Tai, Jiangli Zhu
  • Patent number: 11093529
    Abstract: A method for displaying landmark data from a search of a place name keyword, the method includes: inputting the place name keyword to a server to search for a plurality of landmark data, wherein each of the landmark data comprises fields of a landmark name, an objective level category, an address, and an address quoting frequency; sorting the landmark data by an electronic device to a display order, based on a characterized parameter for each of the landmark, wherein the characterized parameter is calculated based on at least a publicity, wherein the publicity is a calculation of the objective level category and the address quoting frequency with respectively weighting to the objective level category and the address quoting frequency; and displaying the landmark data by the electronic device according to the display order.
    Type: Grant
    Filed: March 28, 2018
    Date of Patent: August 17, 2021
    Assignee: VIA Technologies, Inc.
    Inventors: Guo-Feng Zhang, Yi-Fei Zhu
  • Patent number: 11010312
    Abstract: A security system and a security method of stored data are provided. In the security system and the security method, a central processing unit performs hashing operation on a seed code to generate a data access code, which is then compared with a password stored in a storage device. If there is no password in the storage device, the data access code is written into the storage device as the password. On the other hand, if the data access code does not match the password, the storage device denies the access request from the central processing unit.
    Type: Grant
    Filed: January 4, 2019
    Date of Patent: May 18, 2021
    Assignee: VIA TECHNOLOGIES, INC.
    Inventors: Nan Hui Li, Neng-An Kuo
  • Patent number: D967228
    Type: Grant
    Filed: November 21, 2019
    Date of Patent: October 18, 2022
    Assignee: VIA TECHNOLOGIES, INC.
    Inventor: Chih-Wei Huang