Abstract: A power semiconductor device comprises a semiconductor layer structure having a wide band-gap drift region having a first conductivity type, a gate trench having first and second opposed sidewalls that extend in a first direction in an upper portion of the semiconductor layer structure, first and second well regions having a second conductivity type in the upper portion of the semiconductor layer structure, the first well region comprising part of the first sidewall and the second well region comprising part of the second sidewall. A deep shielding region having the second conductivity type is provided underneath the gate trench, and a plurality of deep shielding connection patterns that have the second conductivity type are provided that electrically connect the deep shielding region to the first and second well regions. The deep shielding connection patterns are spaced apart from each other along the first direction.

Abstract: RF transistor amplifiers an RF transistor amplifier die having a semiconductor layer structure, an interconnect structure having first and second opposing sides, wherein the first side of the interconnect structure is adjacent a surface of the RF transistor amplifier die such that the interconnect structure and the RF transistor amplifier die are in a stacked arrangement, and one or more circuit elements on the first and/or second side of the interconnect structure.

Abstract: Power semiconductor devices comprise a gate pad, a plurality of gate fingers, and a first gate resistor and a first switch that are coupled between the gate pad and the gate fingers.

Abstract: Semiconductor devices include a silicon carbide drift region having an upper portion and a lower portion. A first contact is on the upper portion of the drift region and a second contact is on the lower portion of the drift region. The drift region includes a superjunction structure that includes a p-n junction that is formed at an angle of between 10° and 30° from a plane that is normal to a top surface of the drift region. The p-n junction extends within +/?1.5° of a crystallographic axis of the silicon carbide material forming the drift region.

Abstract: A gallium nitride-based RF transistor amplifier comprises a semiconductor layer structure comprising a barrier layer on a channel layer, first and second source/drain regions in the semiconductor layer structure, first and second source/drain contacts on the respective first and second source/drain regions, and a longitudinally-extending gate finger that is between the first and second source/drain contacts. The first and second source/drain contacts each has an inner sidewall that faces the gate finger and an opposed outer sidewall. The first source/drain region extends a first distance from a lower edge of the inner sidewall of the first source/drain contact towards the second source/drain region along a transverse axis that extends parallel to a plane defined by the upper surface of the semiconductor layer structure, and extends a second, smaller distance from a lower edge of the outer sidewall of the first source/drain contact away from the second source/drain region.

Abstract: A transistor comprising an active region having a channel layer, with source and drain electrodes formed in contact with the active region and a gate formed between the source and drain electrodes and in contact with the active region. A spacer layer is on at least part of the surface of the plurality of active region between the gate and the drain electrode and between the gate and the source electrode. A field plate is on the spacer layer and extends on the spacer and over the active region toward the drain electrode. The field plate also extends on the spacer layer over the active region and toward the source electrode. At least one conductive path electrically connects the field plate to the source electrode or the gate.

Abstract: Packaged RF transistor amplifiers are provided that include a flat no-lead overmold package that includes a die pad, a plurality of terminal pads and an overmold encapsulation that at least partially covers the die pad and the terminal pads and an RF transistor amplifier die mounted on the die pad and at least partially covered by the overmold encapsulation. These packaged RF transistor amplifiers may have an output power density of at least 3.0 W/mm2.

Abstract: A power semiconductor device comprises a semiconductor layer structure comprising a drift region that comprises a wide band-gap semiconductor material and has a first conductivity type, a first gate structure and an adjacent second gate structure in an upper portion of the semiconductor layer structure, a deep shielding region in the drift region, and a connection region protruding upwardly from the deep shielding region and separating the first gate structure and the second gate structure from each other. The deep shielding region extends from underneath the first gate structure to underneath the second gate structure, and the deep shielding region has a second conductivity type that is different from the first conductivity type.

Abstract: An integrated circuit device includes a radio frequency transistor amplifier die having a first surface, a second surface, a semiconductor layer structure that is between the first and second surfaces and includes a plurality of transistor cells adjacent the first surface, and terminals coupled to the transistor cells. At least one passive electronic component is provided on the second surface of the die and is electrically connected to at least one of the terminals, for example, by at least one conductive via. One or more conductive pillar structures may protrude from the first surface of the die to provide electrical connections to one or more of the terminals.

Abstract: A transistor includes a substrate, a drift layer on the substrate, and a junction implant in the drift layer opposite the substrate. The junction implant includes a body well and a source well within the body well. A source contact is in electrical contact with the source well and the body well. A drain contact is in electrical contact with the substrate. A gate insulator is on the drift layer and over a portion of the body well and the source well. A gate contact is on the gate insulator. A softness of a body diode between the source contact and the drain contact is greater than 0.5. By providing the transistor such that the softness factor of the body diode is greater than 0.5, the switching performance of the body diode and thus switching losses of the transistor when used in a bidirectional conduction application will be significantly reduced.

Abstract: A power semiconductor device includes a semiconductor layer structure comprising a drift region of a first conductivity type and a well region of a second conductivity type, a plurality of gate trenches including respective gate insulating layers and gate electrodes therein extending into the drift region, respective shielding patterns of the second conductivity type in respective portions of the drift region adjacent the gate trenches, and respective conduction enhancing regions of the first conductivity type in the respective portions of the drift region. The drift region comprises a first concentration of dopants of the first conductivity type, and the respective conduction enhancing regions comprise a second concentration of the dopants of the first conductivity type that is higher than the first concentration. Related devices and fabrication methods are also discussed.

Abstract: Pursuant to some embodiments of the present invention, transistor devices are provided that include a semiconductor structure, a drain finger extending on the semiconductor structure in a first direction, and a drain interconnect extending in the first direction and configured to be coupled to a drain signal at an interior position of the drain interconnect, where the drain interconnect is connected to the drain finger at a position offset from the interior position of the drain interconnect.

Abstract: A transistor device includes a semiconductor layer, source and drain contacts on the semiconductor layer, a gate contact on the semiconductor layer between the source and drain contacts, and a field plate over the semiconductor layer between the gate contact and the drain contact. The transistor device includes a first electrical connection between the field plate and the source contact that is outside an active region of the transistor device, and a second electrical connection between the field plate and the source contact.

Abstract: A method of packaging a radio frequency (RF) transistor device includes attaching one or more electronic devices to a carrier substrate, applying an encapsulant over at least one of the one or more electronic devices, and providing a protective structure on the carrier substrate over the one or more electronic devices. A packaged RF transistor device includes a carrier substrate, one or more electronic devices attached to the carrier substrate, an encapsulant material over at least one of the one or more electronic devices and extending onto the carrier substrate, and a protective structure on the carrier substrate over the one or more electronic devices and the encapsulant material.

Abstract: A multi-cell transistor includes a semiconductor structure, a plurality of unit cell transistors that are electrically connected in parallel, each unit cell transistor extending in a first direction in the semiconductor structure, wherein the unit cell transistors are spaced apart from each other along a second direction, and an isolation structure that is positioned between a first group of the unit cell transistors and a second group of the unit cell transistors and that extends above the semiconductor structure.

Abstract: A semiconductor device includes a semiconductor layer structure comprising a source/drain region, a gate dielectric layer on the semiconductor layer structure, and a gate electrode on the gate dielectric layer. The source/drain region comprises a first portion comprising a first dopant concentration and a second portion comprising a second dopant concentration. The second portion is closer to a center of the gate electrode than the first portion.

Abstract: A semiconductor device includes a semiconductor layer structure, a gate insulating pattern on the semiconductor layer structure, a gate electrode on the gate insulating pattern, and an interface layer between the gate insulating pattern and the semiconductor layer structure, the interface layer having a first segment and a second segment with a gap therebetween.

Abstract: A packaged electronic circuit includes a substrate having an upper surface, a first metal layer on the upper surface of the substrate, a first polymer layer on the first metal layer opposite the substrate, a second metal layer on the first polymer layer opposite the first metal layer, a dielectric layer on the first polymer layer and at least a portion of the second metal layer and a second polymer layer on the dielectric layer.

Abstract: RF transistor amplifiers are provided that include a submount and an RF transistor amplifier die that is mounted on top of the submount. A multi-layer encapsulation is formed that at least partially covers the RF transistor amplifier die. The multi-layer encapsulation includes a first dielectric layer and a first conductive layer, where the first dielectric layer is between a top surface of the RF transistor amplifier die and the first conductive layer.

Abstract: A transistor amplifier includes a group III-nitride based amplifier die including a gate terminal, a drain terminal, and a source terminal on a first surface of the amplifier die and an interconnect structure electrically bonded to the gate terminal, drain terminal and source terminal of the amplifier die on the first surface of the amplifier die and electrically bonded to an input path and output path of the transistor amplifier.