Patents Examined by Aaron D Ho
  • Patent number: 11422947
    Abstract: A page directory entry cache (PDEC) can be checked to potentially rule out one or more possible page sizes for a translation lookaside buffer (TLB) lookup. Information gained from the PDEC lookup can reduce the number of TLB checks required to conclusively determine if the TLB lookup is a hit or a miss.
    Type: Grant
    Filed: August 12, 2020
    Date of Patent: August 23, 2022
    Assignee: International Business Machines Corporation
    Inventors: David Campbell, Jake Truelove, Charles D. Wait, Jon K. Kriegel
  • Patent number: 11409664
    Abstract: A method and system of managing memory, the method including receiving a request for storage space in the memory system; obtaining a timestamp for a new Logical Unit Number (LUN); allocating a range of logical blocks to the new LUN in accordance with its requested size, the range of logical blocks including a starting logical block and a number of blocks; assigning the timestamp to the new LUN as the LUN creation timestamp; and saving the LUN creation timestamp with other metadata identifying the new LUN and the allocated logical blocks. Methods and system for deleting LUNs and using a deletion timestamp are disclosed as is a process to format a LUN.
    Type: Grant
    Filed: May 8, 2020
    Date of Patent: August 9, 2022
    Assignee: International Business Machines Corporation
    Inventors: Scott Alan Bauman, Daniel Frank Moertl, Robert Edward Galbraith
  • Patent number: 11403226
    Abstract: A cache system, having: a first cache set; a second cache set; and a logic circuit coupled to a processor to control the caches based on at least respective first and second registers. When a connection to an address bus receives a memory address from the processor, the logic circuit is configured to: generate a set index from at least the address; and determine whether the generated set index matches with a content stored in the first register or with a content stored in the second register. And, the logic circuit is configured to implement a command via the first cache set in response to the generated set index matching with the content stored in the first register and via the second cache set in response to the generated set index matching with the content stored in the second register.
    Type: Grant
    Filed: June 25, 2021
    Date of Patent: August 2, 2022
    Assignee: Micron Technology, Inc.
    Inventor: Steven Jeffrey Wallach
  • Patent number: 11372581
    Abstract: An information processing apparatus includes a control unit to execute a program, a first storage unit, a second storage unit, and an output unit. The first storage unit stores a first program to be executed by the control unit. The second storage unit stores a second program to be executed by the control unit. The output unit receives, from the control unit, a read command for reading the second program from the second storage unit. The output unit output, to the second storage unit, a corresponding command corresponding to the received read command and corresponding to an operation mode having been set to the output unit. Before transmitting, to the output unit, the read command for reading the second program from the second storage unit, the control unit sets the operation mode of the output unit according to the first program stored in the first storage unit.
    Type: Grant
    Filed: September 16, 2019
    Date of Patent: June 28, 2022
    Assignee: Canon Kabushiki Kaisha
    Inventor: Junichi Goda
  • Patent number: 11327783
    Abstract: Systems and methods for supporting asynchronous management of unencrypted memory pages of a virtual machine (VM) are disclosed. In one implementation, a processing device may receive, at a destination hypervisor of a host machine as part of a migration process of a VM, two copies of a memory page of the VM, the two copies comprising: a decrypted copy of the memory page, and an unencrypted copy of the memory page. The processing device may also cause the VM to execute a VM resume code, wherein executing the VM resume code comprises: determining whether the memory page is unencrypted based on a page table of the VM. Responsive to determining that the memory page is unencrypted, the processing device may copy the unencrypted copy of the memory page to a guest memory address.
    Type: Grant
    Filed: April 29, 2020
    Date of Patent: May 10, 2022
    Assignee: Red Hat, Inc.
    Inventor: Michael Tsirkin
  • Patent number: 11327781
    Abstract: Zero copy message reception for guests is disclosed. For example, a host has a memory, a device with access to device memory addresses, a processor, and a supervisor. An application with access to application memory addresses (AMA) executes on the host. An AMA is mapped to a page table entry (PTE). The application shares access to a first page of memory addressed by the AMA with the device to store data received by the device for the first application, where the first page is mapped as a device memory address of the plurality of device memory addresses. The application later sends a request to disconnect from the device. The supervisor is configured to copy contents of the first page to a second page in the memory after receiving the request to disconnect, and then update the PTE to address the second page instead of the first page.
    Type: Grant
    Filed: May 28, 2019
    Date of Patent: May 10, 2022
    Assignee: Red Hat, Inc.
    Inventor: Michael Tsirkin
  • Patent number: 11301156
    Abstract: A method, computer program product, and computing system for defining a vVol NVMe subsystem for a plurality of vVol NVMe namespaces within a storage system; and enabling an Asymmetric Namespace Access (ANA) group that aggregates two or more vVol NVMe namespaces defined within the plurality of vVol NVMe namespaces and communicates ANA group information in-band, thus eliminating the need for out-of-band communication of vVol protocol endpoint information.
    Type: Grant
    Filed: November 1, 2019
    Date of Patent: April 12, 2022
    Assignee: EMC IP HOLDING COMPANY, LLC
    Inventors: Dmitry Tylik, Mukesh Gupta, David L. Black
  • Patent number: 11288208
    Abstract: An approach is described that provides access to a named data element in a Coordination Namespace that is stored in a memory that is distributed amongst a set of nodes. A request of a name corresponding to the named data element is received from a requesting process and the approach responsively searches for the name in the Coordination Namespace. In response to determining an absence of data corresponding to the named data element, a pending state is indicated to the requesting process. In response to determining that the data corresponding to the named data element exists, a successful state is returned to the requesting process. In one embodiment, the successful state also includes providing the requesting process with access to the data corresponding to the named data element.
    Type: Grant
    Filed: December 12, 2018
    Date of Patent: March 29, 2022
    Assignee: International Business Machines Corporation
    Inventors: Ravi Nair, Charles R. Johns, James A. Kahle, Changhoan Kim, Constantinos Evangelinos, Patrick D. Siegl
  • Patent number: 11256445
    Abstract: A virtual disk file format conversion method and an apparatus that relate to the field of virtualization technologies and to resolve a service interruption caused by offline conversion of a virtual machine disk image file format when a virtual machine is migrated between different types of VMMs. The method and apparatus include establishing a mapping table between a virtual address of a virtual machine (VM) disk image file and a physical address of a disk image file that is compatible with a virtual machine monitor (VMM), converting, according to the mapping table, the virtual address used when a user performs reading/writing on the VM disk image file, into the physical address mapped to the virtual address, and performing data reading/writing on the VM disk image file based on the physical address.
    Type: Grant
    Filed: September 30, 2019
    Date of Patent: February 22, 2022
    Assignee: HUAWEI TECHNOLOGIES CO., LTD.
    Inventors: Tianyu Wo, Junbin Kang, Xin Bai
  • Patent number: 11256618
    Abstract: A storage apparatus managing method applied to a first storage apparatus and a second storage apparatus coupled to the electronic apparatus is disclosed. The first storage apparatus includes a local registering region and a global registering region. The storage apparatus managing method includes: when the global registering region does not have a target data unit, reading the target data unit from the local registering region or from the second storage apparatus; and copying the target data unit to the global registering region. When the target data unit is copied to the global registering region, the target data unit is copied to a global registering buffer region, or otherwise in response to the global registering buffer region not having enough space, the target data unit is copied to a global registering file region.
    Type: Grant
    Filed: July 7, 2020
    Date of Patent: February 22, 2022
    Assignee: Silicon Motion, Inc.
    Inventor: Chao-Yu Lin
  • Patent number: 11249920
    Abstract: Disclosed are a non-volatile memory device and a method of operating the non-volatile memory device. A non-volatile memory device in which m logical pages are stored in a single physical page includes: a plurality of registers configured to be included in a flash translation layer (FTL) and to store at least part of the data of a write command received from a file system; and a controller configured to control operations of the plurality of registers based on the write command; wherein each of the plurality of registers is further configured to have a storage space associated with the size of the m logical pages; and wherein the controller is further configured to program the data of the write command into the non-volatile memory device and to store the data of the write command in the plurality of registers.
    Type: Grant
    Filed: November 1, 2019
    Date of Patent: February 15, 2022
    Assignee: KNU-INDUSTRY COOPERATION FOUNDATION
    Inventors: Seok Bin Seo, Wan Il Kim, Jin Young Kim, Se Jin Kwon
  • Patent number: 11237964
    Abstract: Techniques for processing data include: receiving a hierarchical structure of metadata (MD) pages for a logical device; and performing processing to copy data of the logical device from a source system to a target system. The first processing includes: determining a sequence of the MD pages in accordance with a depth first traversal of the hierarchical structure; defining a cache management policy in accordance with the sequence that indicates when to load the MD pages into a cache and when to remove the MD pages from the cache; loading MD pages into, and removing MD pages from, the cache in accordance with the cache management policy; and copying data pages stored at logical addresses of the logical device in an order in which the logical addresses are accessed using MD pages stored in the cache at various points in time in accordance with the cache management policy.
    Type: Grant
    Filed: April 30, 2019
    Date of Patent: February 1, 2022
    Assignee: EMC IP Holding Company LLC
    Inventors: Anton Kucherov, David Meiri
  • Patent number: 11226750
    Abstract: Flexible deprovisioning of distributed storage is disclosed. For example, an orchestrator executes on a processor to measure a current storage demand factor based on a current count of service guests and a storage capacity of a plurality of storage nodes. A projected storage demand factor is calculated by (i) adjusting the current count of service guests with a timing factor resulting in a projected count, and (ii) combining the projected count with a storage class associated with the service guests. The orchestrator determines that the projected storage demand factor is lower than the current storage demand factor, and in response requests termination of a first storage node of the plurality of storage nodes based on the first storage node lacking an active communication session with the service guests. Cancel termination of the first storage node based on an association between the first storage node and a second storage node.
    Type: Grant
    Filed: August 10, 2020
    Date of Patent: January 18, 2022
    Assignee: Red Hat, Inc.
    Inventors: Huamin Chen, Steven Travis Nielsen, Sage Austin Weil
  • Patent number: 11221785
    Abstract: Example distributed storage systems, replication state engines, and methods manage replication state for guaranteed replication between data stores. An object data store may store data objects that have been determined for deletion and rendered inaccessible to a client application. A replication state may be queried for deleted data objects and, if the replication state indicates that replication to another object data store is incomplete, physical deletion may be delayed until the replication state indicates that replication is complete and the data object may be physically deleted.
    Type: Grant
    Filed: December 3, 2019
    Date of Patent: January 11, 2022
    Assignee: Western Digital Technologies, Inc.
    Inventors: Thomas Demoor, Carl D'Halluin
  • Patent number: 11216190
    Abstract: A system and method for managing input output queue pairs. In some embodiments, the method includes calculating a system utilization ratio, the system utilization ratio being a ratio of: an arrival rate of input output requests, to a service rate; determining whether: the system utilization ratio has exceeded a first threshold utilization during a time period exceeding a first threshold length, and adding a new queue pair is expected to improve system performance; and in response to determining: that the system utilization ratio has exceeded the first threshold utilization during a time period exceeding the first threshold length, and that adding a new queue pair is expected to improve system performance: adding a new queue pair.
    Type: Grant
    Filed: August 9, 2019
    Date of Patent: January 4, 2022
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Zhengyu Yang, Nithya Ramakrishnan, Allen Russell Andrews, Sudheendra G. Sampath, T. David Evans, Clay Mayers
  • Patent number: 11205483
    Abstract: A memory system includes: a plurality of dies including a plurality of memory blocks; and a memory controller for outputting a normal program command when a die including a selected memory block is a normal die having an electrical characteristic higher than or equal to a reference value in a program operation, and outputting a partial program command and a partial erase command when the die including the selected memory block is a low status die having an electrical characteristic lower than the reference value.
    Type: Grant
    Filed: November 8, 2019
    Date of Patent: December 21, 2021
    Assignee: SK hynix Inc.
    Inventors: Hee Youl Lee, Ji Ho Park
  • Patent number: 11204880
    Abstract: Systems and methods for managing content in a flash memory. Systems and methods for implementing hash tables in a flash memory are disclosed. A hash table may include a flat array or an array of buckets that are each associated with a linked list. Adding or removing entries from the hash table or from the linked list are achieved by performing an overwrite operation where possible to pointers affected by the table operation.
    Type: Grant
    Filed: August 5, 2020
    Date of Patent: December 21, 2021
    Assignee: EMC IP HOLDING COMPANY LLC
    Inventors: Grant R. Wallace, Philip N. Shilane
  • Patent number: 11200003
    Abstract: The present disclosure generally presents a method and apparatus to provide a bounded latency, where a device would report “non-service” of a command at the defined system level timeout or earlier if the device was unable to successfully return the data to the host.
    Type: Grant
    Filed: July 9, 2020
    Date of Patent: December 14, 2021
    Assignee: WESTERN DIGITAL TECHNOLOGIES, INC.
    Inventors: Neil Hutchison, Peter Grayson, Xinde Hu, Daniel L. Helmick, Rodney Brittner
  • Patent number: 11194495
    Abstract: A technique performs best-effort deduplication. The technique involves activating a front-end log deduplication service that is configured and operative to perform deduplication operations on data in front-end log-based storage prior to that data reaching back-end storage that is different from the front-end log-based storage. The technique further involves, after the front-end log deduplication service is activated, receiving new data in the front-end log-based storage. The technique further involves, providing the front-end log deduplication service to perform a data deduplication operation on the new data while the new data resides within the front-end log-based storage. The technique further involves, after the data deduplication operation is performed on the new data, updating the back-end storage to indicate storage of the new data within the back-end storage.
    Type: Grant
    Filed: April 27, 2017
    Date of Patent: December 7, 2021
    Assignee: EMC IP Holding Company LLC
    Inventor: Nickolay Alexandrovich Dalmatov
  • Patent number: 11194725
    Abstract: A cache management system includes a sequentiality determination process configured to determine sequentiality profiles of a workload of IO traces as the workload dynamically changes over time. A learning process is trained to learn a correlation between workload sequentiality and cache pollution, and the trained learning process is used to predict cache pollution before the cache starts to experience symptoms of excessive pollution. The predicted pollution value is used by a cache policy adjustment process to change the prefetch policy applied to the cache, to proactively control the manner in which prefetching is used to write data to the cache. Selection of the cache policy is implemented on a per-LUN basis, so that cache performance for each LUN is individually managed by the cache management system.
    Type: Grant
    Filed: November 15, 2019
    Date of Patent: December 7, 2021
    Assignee: Dell Products, L.P.
    Inventors: Rômulo Teixeira de Abreu Pinho, Hugo de Oliveira Barbalho, Vinicius Michel Gottin, Roberto Nery Stelling Neto, Alex Laier Bordignon, Daniel Sadoc Menasché